Patents by Inventor Chen Fan

Chen Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12237325
    Abstract: A method of forming stacked vertical field effect devices is provided. The method includes forming a layer stack on a substrate, wherein the layer stack includes a first spacer layer on the substrate, a first protective liner on the first spacer layer, a first gap layer on the first protective liner, a second protective liner on the first gap layer, a second spacer layer on the second protective liner, a sacrificial layer on the second spacer layer, a third spacer layer on the sacrificial layer, a third protective liner on the third spacer layer, a second gap layer on the third protective liner, a fourth protective liner on the second gap layer, and a fourth spacer layer on the fourth protective liner. The method further includes forming channels through the layer stack, a liner layer on the sidewalls of the channels, and a vertical pillar in the channels.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: February 25, 2025
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Huimei Zhou, Su Chen Fan, Shogo Mochizuki, Peng Xu, Nicolas J. Loubet
  • Patent number: 12236169
    Abstract: The present application provides a digital twin utility tunnel system based on a reduced-order simulation model and a real-time calibration algorithm. The system includes a big data aggregation unit and a real-time simulation deduction unit. The big data aggregation unit is configured to collect static attribute data and real-time dynamic data. The real-time dynamic data includes fixed monitoring data and mobile monitoring data. The fixed monitoring data is collected by gas sensors fixedly installed in the utility tunnel, and the mobile monitoring data is collected by mobile sensors in the utility tunnel. The real-time simulation deduction unit includes a forward prediction module and an inversion calibration module.
    Type: Grant
    Filed: July 2, 2024
    Date of Patent: February 25, 2025
    Assignee: China University of Mining and Technology-Beijing
    Inventors: Jiansong Wu, Jitao Cai, Xinge Han, Chen Fan, Jian Li, Feng Kong
  • Patent number: 12230578
    Abstract: A semiconductor chiplet device includes a package substrate, an interposer layer, a first die and a second die. The first die includes a first interface, and the second die includes a second interface. A first side of the interposer layer is configured to arrange the first die and the second die. The first die and the second die perform a data transmission through the first interface, the interposer layer and the second interface. The package substrate is arranged on a second side of the interposer layer, and includes a decoupling capacitor. The decoupling capacitor is arranged between the first interface and the second interface, or arranged in a vertical projection area of the first interface and the second interface on the package substrate.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: February 18, 2025
    Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sheng-Fan Yang, Chih-Chiang Hung, Chen Lee, Yuan-Hung Lin
  • Publication number: 20250052853
    Abstract: The present disclosure relates to an electronic device and a method for positioning. An electronic device used with a base station is disclosed, comprising a processing circuit configured to: cause a first set of intelligent surfaces to reflect a set of first reflected beams to be used for a first beam scanning with a user equipment (UE); cause a second set of intelligent surfaces to reflect a set of second reflected beams to be used for a second beam scanning with the UE, wherein the second set of intelligent surfaces is selected from the first set of intelligent surfaces, and a beam width for the set of second reflected beams is smaller than a beam width for the set of first reflected beams; and determine a position of the UE, based at least in part on a result of the second beam scanning.
    Type: Application
    Filed: January 18, 2023
    Publication date: February 13, 2025
    Applicant: Sony Group Corporation
    Inventors: Wei XU, Yurong QIAN, Tingting FAN, Chen SUN
  • Publication number: 20250041387
    Abstract: Disclosed in the present invention is an application of lysine (K)-specific demethylase 6B (KDM6B) in regulating and controlling the function of a mesenchymal stem cell. WDR5 is a co-binding protein for negatively regulating and controlling the functions of KDM6B and the MLL1. WDR5 can form a protein complex with KDM6B to inhibit the function of KDM6B, such that expression and functions of genes are regulated and controlled by regulating and controlling the methylation state of downstream senescence and osteogenesis related genes and gene promoter region histone, and finally the effects of regulating stem cell senescence and differentiation functions and bone/tooth tissue repair and regeneration functions are achieved. For a KDM6B and WDR5 binding region sequence, small-molecule polypeptide is researched, developed, and utilized, and the function of the mesenchymal stem cell is regulated by regulating and controlling the binding of a KDM6B/WDR5 complex.
    Type: Application
    Filed: November 30, 2021
    Publication date: February 6, 2025
    Applicant: BEIJING STOMATOLOGICAL HOSPITAL, CAPITAL MEDICAL UNIVERSITY
    Inventors: Zhipeng FAN, Chen ZHANG, Yu JIANG, Lujue LONG, Yangyang CAO
  • Publication number: 20250048127
    Abstract: An electronic device includes a processing circuit configured to: measure the channel quality of multiple beams of a mobile large intelligent surface (LIS) and the channel quality of multiple beams of one or more candidate fixed LISs; and determine a fixed LIS, a service beam of the fixed LIS, and a service beam of the mobile LIS according to a measurement result, so as to provide service for the electronic device by the service beam of the fixed LIS and the service beam of the mobile LIS. According to the electronic device, the wireless communication method, and the computer-readable storage medium of the present disclosure, the advantages of the fixed LIS and the mobile LIS can be combined, and the fixed LIS and the mobile LIS can jointly provide service for a user equipment, so as to improve the communication quality of the user equipment.
    Type: Application
    Filed: January 5, 2023
    Publication date: February 6, 2025
    Applicant: Sony Group Corporation
    Inventors: Wei XU, Yuwei GAO, Tingting FAN, Chen SUN
  • Publication number: 20250019129
    Abstract: A sealing structure includes a box body and a cover body. The box body includes a plurality of side walls respectively including a plurality of outer and inner portions, an annular groove formed on the inner portions, and an annular protrusion portion. Each outer portion has a level difference with the corresponding inner portion. Any two adjacent ones of the side walls form a corner portion. An outer surface of each corner portion forms a sharp corner. The annular groove is arc-shaped at a position corresponding to each corner portion. Each corner portion includes a hollowed-out area. The cover body includes a main body in a polygonal shape with sharp corners, an annular protrusion portion protruding from the main body, and an annular groove. The annular protrusion portions extend into the annular grooves, so that the cover body is sealedly joined to the box body.
    Type: Application
    Filed: July 11, 2024
    Publication date: January 16, 2025
    Applicant: Lite-On Technology Corporation
    Inventors: Yun Hao Fan, Chia Tsang Hsu, Wan-Chen Chen, Ying Hsien Chen, Shuo-Jen Shieh
  • Publication number: 20250013800
    Abstract: The present application provides a digital twin utility tunnel system based on a reduced-order simulation model and a real-time calibration algorithm. The system includes a big data aggregation unit and a real-time simulation deduction unit. The big data aggregation unit is configured to collect static attribute data and real-time dynamic data. The real-time dynamic data includes fixed monitoring data and mobile monitoring data. The fixed monitoring data is collected by gas sensors fixedly installed in the utility tunnel, and the mobile monitoring data is collected by mobile sensors in the utility tunnel. The real-time simulation deduction unit includes a forward prediction module and an inversion calibration module.
    Type: Application
    Filed: July 2, 2024
    Publication date: January 9, 2025
    Inventors: Jiansong Wu, Jitao Cai, Xinge Han, Chen Fan, Jian Li, Feng Kong
  • Patent number: 12191388
    Abstract: Techniques for area scaling of contacts in VTFET devices are provided. In one aspect, a VTFET device includes: a fin(s); a bottom source/drain region at a base of the fin(s); a gate stack alongside the fin(s); a top source/drain region present at a top of the fin(s); a bottom source/drain contact to the bottom source/drain region; and a gate contact to the gate stack, wherein the bottom source drain and gate contacts each includes a top portion having a width W1CONTACT over a bottom portion having a width W2CONTACT, wherein W2CONTACT<W1CONTACT, and wherein a sidewall along the top portion is discontinuous with a sidewall along the bottom portion. The bottom portion having the width W2CONTACT is present alongside the gate stack and the top source/drain region. A method of forming a VTFET device is also provided.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: January 7, 2025
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yann Mignot, Su Chen Fan, Jing Guo, Lijuan Zou
  • Patent number: 12113013
    Abstract: A device includes: a first dielectric material; a first metal line in the first dielectric material; a second dielectric material disposed on the first dielectric material and the first metal line; a second metal line in the second dielectric material; and a plurality of metal vias disposed on a same level and connecting the first metal line and the second metal line, wherein the plurality of metal vias comprise a first top via and a bottom via having different sidewall profile angles.
    Type: Grant
    Filed: September 24, 2021
    Date of Patent: October 8, 2024
    Assignee: International Business Machines Corporation
    Inventors: Hsueh-Chung Chen, Yann Mignot, Su Chen Fan, Mary Claire Silvestre, Chi-Chun Liu, Junli Wang
  • Publication number: 20240334623
    Abstract: This disclosure is directed to a case of an electronic device having a box, an elastic arm, a first fastening structure, a second fastening structure, and a magnet. The box has a first housing and a second housing closed with the first housing. The elastic arm is arranged in the first housing, the elastic arm is located at one side of the first housing, and at least a portion of the elastic arm is extended beyond an edge of the first housing. The first fastening structure is disposed on the elastic arm and located beyond the edge of the first housing. The second fastening structure is arranged on an internal surface at one side of the second housing, and the first fastening structure and the second fastening structure are buckled with each other. The magnet is arranged on the spring arm.
    Type: Application
    Filed: June 9, 2023
    Publication date: October 3, 2024
    Inventor: Chen-Fan LIN
  • Patent number: 12107147
    Abstract: Semiconductor devices and methods of forming the same include forming dummy gate spacers in a trench in a semiconductor substrate. A dummy gate is formed in the trench. An exposed dummy gate spacer is replaced with a sacrificial spacer. A cap layer is formed over the dummy gate. The cap layer is etched to expose the dummy gate. The sacrificial spacer is replaced with an isolation dielectric spacer. The dummy gate is replaced with a conductor.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: October 1, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Huimei Zhou, Kangguo Cheng, Su Chen Fan, Miaomiao Wang
  • Publication number: 20240282380
    Abstract: An operation method for a memory device is provided. A memory block of the memory device includes an array of memory cells including cell strings and cell pages. Serially numbered and arranged bit lines are connected to the cell strings, respectively. Serially numbered and arranged word lines are connected to the cell pages, respectively. The operation method includes: performing a batch writing to each of the cell pages, such that the memory cells in each cell page are respectively grouped as an earlier written memory cell or a later written memory cell, depending on the connected bit line is either even-numbered or odd-numbered. Each cell page has a respective write sequence. In terms of write sequence, each cell page is identical with one of 2 nearest cell pages, and opposite to the other of the 2 nearest cell pages.
    Type: Application
    Filed: May 3, 2023
    Publication date: August 22, 2024
    Applicant: Winbond Electronics Corp.
    Inventors: Yi-Chen Fan, Chieh-Yen Wang
  • Patent number: 12066491
    Abstract: A device and method for detecting an inter-turn electromagnetic pulse vibration wave characteristic of a turbogenerator rotor winding are provided. A signal source and a time sequence control circuit generate a high-potential abrupt electric field; circularly polarized electromagnetic waves generated by a parasitic inductive power supply and symmetrically deflecting by 180° are respectively coupled to a positive electrode and a negative electrode clockwise or counter-clockwise; a first turn on the positive electrode and a first turn on the negative electrode are mutually induced; as time goes by, energy is returned to the parasitic inductive power supply, and is sequentially conducted to a second turn; the parasitic inductive power supply and the second turn further start feeding back energy to the first turn in circular polarization; all turns sequentially perform feedback and superposition one another stage by stage; and all coupling turns show sinusoidal waves with a same time constant.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: August 20, 2024
    Assignee: HANGZHOU HENUOVA TECHNOLOGY CO., LTD.
    Inventors: Yuewu Zhang, Kunpeng Tian, Qianyi Zhang, Weihua Zha, Hong Liu, Xiaohui Cao, Xueliang Wang, Dongbing Liu, Jiamin Li, Chicheng Liu, Zhen Lyu, Chen Fan, Miaoye Li, Wen Wei, Zirui Wang
  • Publication number: 20240255573
    Abstract: A device and method for detecting an inter-turn electromagnetic pulse vibration wave characteristic of a turbogenerator rotor winding are provided. A signal source and a time sequence control circuit generate a high-potential abrupt electric field; circularly polarized electromagnetic waves generated by a parasitic inductive power supply and symmetrically deflecting by 180° are respectively coupled to a positive electrode and a negative electrode clockwise or counter-clockwise; a first turn on the positive electrode and a first turn on the negative electrode are mutually induced; as time goes by, energy is returned to the parasitic inductive power supply, and is sequentially conducted to a second turn; the parasitic inductive power supply and the second turn further start feeding back energy to the first turn in circular polarization; all turns sequentially perform feedback and superposition one another stage by stage; and all coupling turns show sinusoidal waves with a same time constant.
    Type: Application
    Filed: April 15, 2022
    Publication date: August 1, 2024
    Applicant: HANGZHOU HENUOVA TECHNOLOGY CO., LTD.
    Inventors: Yuewu ZHANG, Kunpeng TIAN, Qianyi ZHANG, Weihua ZHA, Hong LIU, Xiaohui CAO, Xueliang WANG, Dongbing LIU, Jiamin LI, Chicheng LIU, Zhen LYU, Chen FAN, Miaoye LI, Wen WEI, Zirui WANG
  • Publication number: 20240203984
    Abstract: Semiconductor devices and methods of forming the same include a lower semiconductor device over a substrate, the lower semiconductor device having a first width. An upper semiconductor device is over the lower semiconductor device. The upper semiconductor device has a second width smaller than the first width. A dielectric structure is over the lower semiconductor device and has a first sidewall that faces the upper semiconductor device and a second sidewall that aligns vertically with a sidewall of the lower semiconductor device.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 20, 2024
    Inventors: Su Chen Fan, Indira Seshadri, Jay William Strane, Stuart Sieg
  • Publication number: 20240178292
    Abstract: A semiconductor structure is presented including semiconductor layers of a first nanosheet stack, semiconductor layers of a second nanosheet stack formed over and having a stepped nanosheet formation with respect to the semiconductor layers of the first nanosheet stack, a first epitaxial growth formed adjacent the semiconductor layers of the first nanosheet stack, and a second epitaxial growth formed adjacent the semiconductor layers of the second nanosheet stack such that the second epitaxial growth has a stepped formation with respect to the first epitaxial growth. The second epitaxial growth has a volume greater than a volume of the first epitaxial growth.
    Type: Application
    Filed: November 28, 2022
    Publication date: May 30, 2024
    Inventors: Indira Seshadri, Su Chen Fan, Jay William Strane, Stuart Sieg, Shogo Mochizuki
  • Publication number: 20240162319
    Abstract: Embodiments of the invention include a stacked device having a first epitaxial region and a second epitaxial region vertically displaced from the first epitaxial region. The first epitaxial region comprising an asymmetric profile with a horizontal protrusion.
    Type: Application
    Filed: November 14, 2022
    Publication date: May 16, 2024
    Inventors: Su Chen Fan, Albert M. Young, Ruilong Xie, Prabudhya Roy Chowdhury, Jay William Strane
  • Publication number: 20240145473
    Abstract: A semiconductor device includes a first transistor and a first gate electrically coupled to the first transistor. A second transistor is positioned on top of the first transistor. A second gate is electrically coupled to the second transistor. A dielectric isolation layer is positioned between the first gate and the second gate. A first conductive contact is electrically coupled to the first gate. A second conductive contact is electrically coupled to the second gate. A control of the first gate through the first conductive contact is independent of a control of the second gate through the second conductive contact.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 2, 2024
    Inventors: Tsung-Sheng Kang, Su Chen Fan, Jingyun Zhang, Ruqiang Bao, Son Nguyen
  • Patent number: D1061751
    Type: Grant
    Filed: July 17, 2024
    Date of Patent: February 11, 2025
    Assignee: SHENZHEN YILE DYNAMIC TECHNOLOGY CO., LTD
    Inventors: Jianfeng Lin, Jinsong Fan, Chen Huang