Abstract: In a method of manufacturing a semiconductor device, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. A source/drain region of the fin structure, which is not covered by the sacrificial gate structure, is etched, thereby forming a source/drain space. The first semiconductor layers are laterally etched through the source/drain space. An inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers. A source/drain epitaxial layer is formed in the source/drain space to cover the inner spacer. A lateral end of each of the first semiconductor layers has a V-shape cross section after the first semiconductor layers are laterally etched.

Abstract: An illuminator is provided, comprising a support frame arranged symmetrically around an optical axis of an optical sensor. The illuminator includes at least one light bar connected to the support frame. At least one light source is connected to the support frame, wherein each of the at least one light source is configured to direct light towards one of the opposing ends of one of the at least one light bar. The illuminator further includes a peripheral cover configured to receive light emitted from the front face of each of the at least one light bar. The peripheral cover is further configured to emit dark field illumination at a low incident angle with respect to a plane perpendicular to the optical axis and to emit bright field illumination at a high incident angle with respect to the plane perpendicular to the optical axis.

Abstract: An indicia-reading module is capable of integration into the smallest face of thin-profile smart device. The module employs chip-on-board packaging and a customized sensor enclosure to eliminate the stack-up height found in conventional packaging. The module also employs a customized frame to reduce volume by integrating circuit subassembly circuit boards into a unique architecture and by serving as the lenses for the illuminator and the aimer, thereby eliminating the need for any extra lenses or holders.

Abstract: A mounting rack with circuit includes a leadframe, a molding seat and a circuit layer. The leadframe comprises a plurality of electrodes. The molding seat is arranged on the leadframe and has a cup body to expose backsides of the electrodes and a cup opening to expose front sides of the electrodes. The circuit layer is arranged on the cup body and at least comprises two conductive parts, two electrical-connection parts and two soldering pads, wherein the two electrical-connection parts are arranged on the cup opening, one end of each of the two electrical-connection parts is electrically connected to one end of a respective one of the two conductive parts, the two soldering pads are arranged on bottom of the cup body, each of the two soldering pads is electrically connected to the other end of a respective one of the two conductive parts.

Abstract: A method for making a carbon nanotube film includes providing an original carbon nanotube film and an angle control unit. The original carbon nanotube film includes a plurality of carbon nanotubes joined end-to-end by van der Waals force, and the angle control unit defines a through hole. A first end of the original carbon nanotube film is converged to form a carbon nanotube wire structure and a carbon nanotube triangle structure having an open angle adjacent to the carbon nanotube wire structure. The carbon nanotube wire structure is passed through the through hole of the angle control unit. The carbon nanotube triangle structure is cut. The carbon nanotube film is also provided.

Abstract: Provided herein is an image focusing adjustment method, system, and module. A first image of a reference object is received in response to an input signal when the image focusing adjustment module is operating in a first state. The first image of the reference object is analyzed, based on which a plurality of adjustments to the image focusing adjustment module is controlled. The plurality of adjustments, performed by a plurality of actuators controlled by control module, include rotating a lens barrel assembly relative to a neck member along a first axis that causes a translational adjustment of the lens barrel assembly, rotating the neck member relative to a top member around the first axis that causes a rotational adjustment of the lens barrel assembly, and positioning a tilt adjustment member that causes tilt adjustment of the top member relative to a frame member along a second axis.

Abstract: A fin structure is on a substrate. The fin structure includes an epitaxial region having an upper surface and an under-surface. A contact structure on the epitaxial region includes an upper contact portion and a lower contact portion. The upper contact portion includes a metal layer over the upper surface and a barrier layer over the metal layer. The lower contact portion includes a metal-insulator-semiconductor (MIS) contact along the under-surface. The MIS contact includes a dielectric layer on the under-surface and the barrier layer on the dielectric layer.

Abstract: An optical dimensioning system includes light emitting assemblies configured to project a predetermined pattern on an object. The optical dimensioning system further includes an imaging assembly configured to sense light scattered and/or reflected of the object, and to capture an image of the object while the pattern is projected. A processing assembly, in the optical dimensioning system, is configured to analyze the image of the object to determine one or more dimension parameters of the object.

Abstract: A system and method for utilizing metadata of a client computer in form of transactions and/or software operations (e.g., actions) in an enterprise system hosted by a host entity, such as in a cloud environment for testing the software operations is disclosed. The host entity stores metadata (e.g., response time, delay, processing time, usage) about the transactions in a database for the client computer system's actions. The host entity then uses the stored metadata to automatically generate a test script based on actual user interactions with the software operations of the enterprise resource planning system for specific data range and environment in order to test functionality of a plurality of software operations in the enterprise resource planning systems being operated by users of the client computers.

Abstract: In a method of manufacturing a semiconductor device, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. A source/drain region of the fin structure, which is not covered by the sacrificial gate structure, is etched, thereby forming a source/drain space. The first semiconductor layers are laterally etched through the source/drain space. An inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers. A source/drain epitaxial layer is formed in the source/drain space to cover the inner spacer. A lateral end of each of the first semiconductor layers has a V-shape cross section after the first semiconductor layers are laterally etched.

Abstract: In a method of manufacturing a semiconductor device, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. A source/drain region of the fin structure, which is not covered by the sacrificial gate structure, is etched, thereby forming a source/drain space. The first semiconductor layers are laterally etched through the source/drain space. An inner spacer made of a dielectric material is formed on an end of each of the etched first semiconductor layers. A source/drain epitaxial layer is formed in the source/drain space to cover the inner spacer. A lateral end of each of the first semiconductor layers has a V-shape cross section after the first semiconductor layers are laterally etched.

Abstract: An aimer pattern projector assembly (200, 300) includes an LED light source (212, 312), an LED aperture plate (204, 304), and a projector lens (206, 306) disposed in front of and coaxial with the LED aperture plate (204, 304) and the LED light source (212, 312). The LED light source (212, 312), aperture plate (204, 304), and projector lens (206, 306) each have a central opening configured to accommodate and coaxially align with a line of sight of an imaging lens. The LED light source (212, 312) can include two or more LEDs operably coupled to a PCB. A coaxial aimer imager assembly (100) can include an imaging lens-sensor module (102) and the aimer pattern projector assembly. A method for scanning includes generating a combined aimer pattern coaxially aligned with a line of sight of an image of the object.

Abstract: A pixel circuit includes a first switch, a storage circuit, a second switch, and a liquid crystal capacitor. The first node of the first switch is configured to receive a data signal, and the second node of the first switch is coupled with a first node point. The storage circuit is coupled with the first node point, and configured to receive a common voltage. The first node of the second switch is coupled with the storage circuit, and the second node of the second switch is configured to receive a boost signal. The liquid crystal capacitor is coupled between the first node point and the storage circuit. In response to the first switch is conducted, the second switch is conducted, or in response to the second switch is conducted, the first switch is conducted.

Abstract: A method for forming a semiconductor structure includes receiving a substrate including a dielectric structure; forming a first recess in the substrate; forming a dielectric spacer over a sidewall of the first recess; forming a first semiconductor layer to fill the first recess; removing the dielectric structure to form a second recess over the substrate; and forming a second semiconductor layer to fill the second recess. The dielectric spacer is sandwiched between the first semiconductor layer and the second semiconductor layer.

Abstract: A communication method applied to an communication device comprising M first type antenna following a first communication standard and N second type antennas following a second communication standard, M and N are positive integers. The communication method comprises: (a) measuring usage time of the second type antennas; and (b) controlling a number of the antennas that the communication device use according to the usage time of the second type antennas.

Abstract: Nanowire devices and fin devices are formed in a first region and a second region of a substrate. To form the devices, alternating layers of a first material and a second material are formed, inner spacers are formed adjacent to the layers of the first material, and then the layers of the first material are removed to form nanowires without removing the layers of the first material within the second region. Gate structures of gate dielectrics and gate electrodes are formed within the first region and the second region in order to form the nanowire devices in the first region and the fin devices in the second region.

Abstract: A system for reconstructing a three-dimensional (3D) model of a scene including a point cloud having points identified by 3D coordinates includes at least one sensor to acquire a set of images of the scene from different poses defining viewpoints of the images and a memory to store the set of images and the 3D model of the scene. The system also includes a processor operatively connected to the memory and coupled with stored instructions to transform the images from the set of images to produce a set of virtual images of the scene viewed from virtual viewpoints; compare at least some features from the images and the virtual images to determine the viewpoint of each image in the set of images; and update 3D coordinates of at least one point in the model of the scene to match coordinates of intersections of ray back-projections from pixels of at least two images corresponding to the point according to the viewpoints of the two images.

Abstract: A fin structure is on a substrate. The fin structure includes an epitaxial region having an upper surface and an under-surface. A contact structure on the epitaxial region includes an upper contact portion and a lower contact portion. The upper contact portion includes a metal layer over the upper surface and a barrier layer over the metal layer. The lower contact portion includes a metal-insulator-semiconductor (MIS) contact along the under-surface. The MIS contact includes a dielectric layer on the under-surface and the barrier layer on the dielectric layer.

Abstract: A voltage regulator circuit includes a first transistor, an inductor, and a diode. The inductor connects to the diode at a switch node. The voltage converter produces an output voltage that is larger than an input voltage. The first transistor has on and off states and electrically couples a node to ground when in the on state. An error amplifier circuit generates an error signal based on a difference between a reference voltage and a voltage indicative of the output voltage. The error signal causes the first transistor to transition from the on to the off state. An adaptive off-time generator circuit couples to the input voltage node, and generates a signal to cause the first transistor to transition from the off to the on state. The time the first transistor is in the off state is inversely proportional to the time the first transistor is in the on state.

Abstract: A control circuit includes a switching circuit and a select circuit. The switching circuit is configured to receive a scan signal, a first switching signal, and a second switching signal, and output the first switching signal and the second switching signal according to the scan signal. The select circuit is configured to receive a first supply voltage, a second supply voltage, the first switching signal, and the second switching signal, and selectively output the first supply voltage or the second supply voltage to a target electrode according to the first switching signal and the second switching signal.