Abstract: Improved methods for forming gate isolation structures between portions of gate electrodes and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a channel structure over a substrate; forming a first isolation structure extending in a direction parallel to the channel structure; forming a dummy gate structure over the channel structure and the first isolation structure; depositing a hard mask layer over the dummy gate structure; etching the hard mask layer to form a first opening through the hard mask layer over the first isolation structure; conformally depositing a first dielectric layer over the hard mask layer, in the first opening, and over the dummy gate structure; etching the first dielectric layer to extend the first opening and expose the dummy gate structure; and etching the dummy gate structure to extend the first opening and expose the first isolation structure.

Abstract: A method includes forming a metal seed layer on a dielectric layer, and forming a patterned mask over the metal seed layer. An opening in the patterned mask is over a first portion of the dielectric layer, and the patterned mask overlaps a second portion of the dielectric layer. The method further includes plating a metal region in the opening, removing the patterned mask to expose portions of the metal seed layer, etching the exposed portions of the metal seed layer, performing a plasma treatment on a surface of the second portion of the dielectric layer, and performing an etching process on the surface of the second portion of the dielectric layer.

Abstract: A ceiling fan blade assembly structure includes a blade holder, multiple fan blades, and multiple locking assemblies. Multiple fan blade assembly portions are disposed at an outer side of the blade holder. Each fan blade assembly portion includes two first side plates parallel to each other, a first radial positioning portion, and two first vertical positioning portions disposed on the two first side plates. Each fan blade has a fan blade connection portion that includes two second side plates, a second radial positioning portion, and two second vertical positioning portions. The second and the first radial positioning portions are engaged with each other, and the two second and first vertical positioning portions are engaged with each other. Accordingly, the fan blade connection portion is preliminarily positioned on the fan blade assembly portion. Through the locking assembly, the first and the second radial positioning portions are locked together.

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.

Abstract: A device includes first and second gate structures respectively extending across the first and second fins, and a gate isolation plug between a longitudinal end of the first gate structure and a longitudinal end of the second gate structure. The gate isolation plug comprises a first dielectric layer and a second dielectric layer over the first dielectric layer. The first dielectric layer has an upper portion and a lower portion below the upper portion. The upper portion has a thickness smaller than a thickness of the lower portion of the first dielectric layer.

Abstract: A substrate structure is provided, in which an insulating protection layer is formed on a substrate body having a plurality of electrical contact pads, and the insulating protection layer has a plurality of openings corresponding to the plurality of exposed electrical contact pads, and the insulating protection layer is formed with a hollow portion surrounding a partial edge of at least one of the electrical contact pads at at least one of the openings, so as to reduce the barrier of the insulating protection layer.

Abstract: A semiconductor structure includes a substrate, and an active device and a passive device over the substrate. The active device is disposed in a first region of the substrate, and the passive device is disposed in a second region of the substrate. The semiconductor structure further includes a shielding structure and a passivation layer. The shielding structure includes a barrier layer and a ceiling layer. The barrier layer is on the passive device and the active device, and the ceiling layer is on the barrier layer. The passivation layer is under the barrier layer and covers a top surface of the passive device. An air cavity is defined by sidewalls of the barrier layer, a bottom surface of the ceiling layer, and the substrate.

Abstract: A magnetic device includes a magnetic core and at least two windings. The magnetic core includes an annular main body and a hollow portion. Each of the at least two windings includes a coil with a plurality of turns. Each turn of the coil penetrates through the hollow portion and is disposed around the annular main body. The at least two windings are disposed around the annular main body to form at least three winding regions. Each of the winding regions except a winding region which is last formed has at least three winding layers stacked up one by one. The number of the winding layers of the winding regions except the winding region which is last formed is odd and greater than or equal to three.

Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.

Abstract: A method includes etching a gate stack in a wafer to form a trench, depositing a silicon nitride liner extending into the trench, and depositing a silicon oxide layer. The process of depositing the silicon oxide layer includes performing a treatment process on the wafer using a process gas including nitrogen and hydrogen, and performing a soaking process on the wafer using a silicon precursor.

Abstract: A portable electronic device and a one-hand touch operation method thereof are provided. A touch operation performed on a touch screen is detected. When a shift amount of the touch operation in a first direction is greater than a first threshold, whether to activate a one-hand mode is determined according to a shift amount of the touch operation in a second direction. When the one-hand mode is activated, the operation interface image is zoomed out or shifted, and displayed in a one-hand mode interface display region.

Abstract: Disclosed is an Object Recognition Warehousing Method for STORE or FETCH an object through a pretrained Object Recognition Model (ORM). Image of an object is taken by an image sensor for Object Recognition, and system automatically provides options of classification and labelling A physical object without package is recognized for STORE according to the present invention.

Abstract: A vacuum arc thruster with multi-layer insulation includes a housing, an anode unit and a cathode unit spaced apart from each other in the housing, and an insulator disposed between the anode unit and the cathode unit. The insulator includes a plurality of fuel layers and a plurality of insulating layers. Each insulating layer is located between every two adjacent fuel layers. Accordingly, a multiple-layer design is formed by arranging the fuel layers and the insulating layers which are made of different materials in an alternating manner, thereby attaining the maximum field emission effect, increasing the stability and efficacy of operating the vacuum arc thruster, and prolonging the service life of the thruster.

Abstract: The present invention generally relates to a hydroponic culture medium and a hydroponic planting system, more particularly to a Houttuynia cordata hydroponic culture medium, a Houttuynia cordata hydroponic planting system, Houttuynia cordata extracts, a method, and applications thereof.

Abstract: A method includes encapsulating a device in an encapsulating material, planarizing the encapsulating material and the device, and forming a conductive feature over the encapsulating material and the device. The formation of the conductive feature includes depositing a first conductive material to from a first seed layer, depositing a second conductive material different from the first conductive material over the first seed layer to form a second seed layer, plating a metal region over the second seed layer, performing a first etching on the second seed layer, performing a second etching on the first seed layer, and after the first seed layer is etched, performing a third etching on the second seed layer and the metal region.

Abstract: An electronic package is provided and includes a substrate structure, an electronic element disposed on the substrate structure and an encapsulation layer encapsulating the electronic element, where at least one functional circuit is formed on a surface of a substrate body of the substrate structure, and a wire having a smaller width is arranged on a boundary line at a junction between an encapsulation area and a peripheral area, so that when a mold for forming the encapsulation layer is formed to cover the substrate structure, the mold will create a gap around the wire to serve as an exhaust passage. Therefore, when the encapsulation layer is formed, the exhaust passage can be used to exhaust air, so as to avoid problems such as the occurrence of voids or overflows of the encapsulation layer.

Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.

Abstract: A semiconductor structure includes a substrate, and an active device and a passive device over the substrate. The active device is disposed in a first region of the substrate, and the passive device is disposed in a second region of the substrate. The semiconductor structure further includes a shielding structure and a passivation layer. The shielding structure includes a barrier layer and a ceiling layer. The barrier layer is on the passive device and the active device, and the ceiling layer is on the barrier layer. The passivation layer is under the barrier layer and covers a top surface of the passive device. An air cavity is defined by sidewalls of the barrier layer, a bottom surface of the ceiling layer, and the substrate.

Abstract: A method includes forming a metal seed layer on a dielectric layer, and forming a patterned mask over the metal seed layer. An opening in the patterned mask is over a first portion of the dielectric layer, and the patterned mask overlaps a second portion of the dielectric layer. The method further includes plating a metal region in the opening, removing the patterned mask to expose portions of the metal seed layer, etching the exposed portions of the metal seed layer, performing a plasma treatment on a surface of the second portion of the dielectric layer, and performing an etching process on the surface of the second portion of the dielectric layer.