Patents by Inventor Chen Hsu

Chen Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12295191
    Abstract: A light emitting-diode (LED) display device is provided. The display device comprises plural pixels arranged in array and each pixel includes at least one LED chip. The LED chip is disposed at a cavity of a black matrix (BM) layer and electrical connected to a transistor of a circuit substrate, wherein the transistor is below the BM layer.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: May 6, 2025
    Assignee: VISIONLABS CORPORATION
    Inventors: Hung-Cheng Lin, Hung-Kuang Hsu, Hua-Chen Hsu
  • Publication number: 20250136956
    Abstract: The present disclosure provides an enzyme composition and a preparation method therefor and a use thereof. The enzyme composition includes an enzyme, an enzyme stabilizer, and a filler. The specific enzyme stabilizer and filler are added, so that the enzyme composition can be preserved at room temperature after lyophilization and can maintain good stability and activity. Therefore, the product has improved adaptability to an ambient temperature, and is suitable for large-scale production. The enzyme composition is applied to target nucleic acid detection to maintain high sensitivity and detection stability.
    Type: Application
    Filed: January 30, 2022
    Publication date: May 1, 2025
    Inventors: Danny Sheng Wu YEUNG, Wu-Po MA, Chia-Chen HSU
  • Patent number: 12287387
    Abstract: A method of using non-contrast magnetic resonance angiography (NC-MRA) to generate pelvic veins images and measure rate of blood flow includes the ordered steps of: (a) performing a non-contrast magnetic resonance scan in cooperation with an electrocardiogram monitor and a respiration monitor; (b) obtaining two-dimensional images of kidney veins, lower cavity veins, common iliac veins, and external iliac veins using use balanced turbo field echo wave sequence; (c) obtaining three-dimensional images of common cardinal veins of the abdominal cavity using fast spin-echo short tau inversion recovery wave sequence and using sample signals from the electrocardiogram monitor during myocardial contractility; and (d) using quantification phase-contrast analysis to measure blood flowing through the transverse sections of the veins in a two-dimensional scan.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: April 29, 2025
    Assignee: Chang Gung Memorial Hospital, Chiayi
    Inventors: Chien-Wei Chen, Yao-Kuang Huang, Chung-Yuan Lee, Yeh-Giin Ngo, Yin-Chen Hsu
  • Patent number: 12287195
    Abstract: A coater cup deformation testing device includes a supporting board, a first plate and a second plate. The first plate is located on a first side surface of the supporting board. The first plate is circular and has a first diameter. The second plate is located on the first plate or on a second side surface of the supporting board. The second side surface is opposite to the first side surface. The second plate is circular and has a second diameter less than the first diameter. An area of each of the first and second plates is less than an area of the supporting board. A projection of each of the first and second plates on the supporting board is formed within the supporting board.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: April 29, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Li-Chung Chen, Cheng Liu, Chuan-Chen Hsu
  • Patent number: 12287560
    Abstract: A light source module, which includes a heat sink, a laser assembly, a circuit board assembly, a conductive material, and multiple lock members, is provided. The circuit board assembly includes a circuit board, which has an accommodating opening that corresponds to a beam emitter of the laser assembly. The lock members respectively pass through third lock holes of the circuit board assembly, second lock holes of the laser assembly, and first lock holes of the heat sink in sequence, thereby locking the circuit board assembly and the laser assembly on the heat sink. The accommodating opening of the circuit board exposes the beam emitter, and the conductive material connects two conductive pads of the laser assembly to two corresponding electroplated through holes, thereby enabling the laser assembly to be electrically connected to the circuit board assembly. A projector including the light source module is also provided.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: April 29, 2025
    Assignee: Coretronic Corporation
    Inventor: Kun-Chen Hsu
  • Patent number: 12288716
    Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening.
    Type: Grant
    Filed: April 29, 2024
    Date of Patent: April 29, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20250129345
    Abstract: The present invention provides an enzyme composition and a preparation method therefor and a use thereof. The enzyme composition includes an enzyme, an enzyme stabilizer, a filler, and a primer designed for a target nucleic acid. The enzyme composition can be preserved at room temperature and maintain good stability and activity, thereby improving adaptability of the enzyme composition to an ambient temperature. In addition, the enzyme is integrated with the primer, so that the enzyme composition is used in PCR detection, especially in LAMP nucleic acid amplification, a time for preparing a reaction system is shortened, and an operation procedure is simplified. Therefore, the enzyme composition is suitable for large-scale production. The enzyme composition is applied to target nucleic acid detection to maintain high sensitivity and detection stability.
    Type: Application
    Filed: January 30, 2022
    Publication date: April 24, 2025
    Inventors: Danny Sheng Wu Yeung, Wu-Po Ma, Chia-Chen HSU, Ming-Shan TSAI
  • Publication number: 20250131731
    Abstract: An electronic device for assisting driver in recording images is introduced. In the electronic device, a panoramic camera unit is installed on a transportation vehicle to capture an initial video. A positioning unit detects a real-time location of the transportation vehicle. A database stores scenic spot information including multiple scenic spot locations. An intelligence processing unit receives the initial video and uses artificial intelligence to identify a user's image and an image of the scenic spot to be locked at the scenic spot location. The intelligence processing unit receives the real-time location and determines the direction of travel. The intelligence processing unit reads the scenic spot information and determines a viewing range of the transportation vehicle entering the scenic spot location based on the real-time location and the direction of travel to capture a time period within the viewing range from the initial video and crop a recorded video.
    Type: Application
    Filed: September 20, 2024
    Publication date: April 24, 2025
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: WEN-TING TSAI, LI-TING HUANG, FU-CHEN HSU, YANG-ZHENG OU, WEI-JUN WANG, MING-HSIEN WU
  • Publication number: 20250122367
    Abstract: A polymer composite for preparing a low dielectric resin composition having a dielectric loss tangent (Df) that is less than or equal to 0.00200 is provided. The polymer composite includes a first styrene-based copolymer having a weight average molecular weight that is lower than 20,000 g/mol and a second styrene-based copolymer having a weight average molecular weight that is higher than 20,000 g/mol, wherein the weight ratio of the first styrene-based copolymer to the second styrene-based copolymer is from 5/95 to 95/5.
    Type: Application
    Filed: October 10, 2024
    Publication date: April 17, 2025
    Inventors: Chi-Jui HSIEH, Tz-Jie JU, Yi-Hsuan TANG, Chiung Chi LIN, Hung Lin CHEN, Chi Yi LIU, Hsiao-Chu LIN, Ka Chun AU-YEUNG, Wei-Liang LEE, Yu-Chen HSU, Ming-Hung LIAO, Chien-Han CHEN, Yu-Tien CHEN, Yu-Pin LIN, Gang-Lun FAN
  • Publication number: 20250107744
    Abstract: A device for assessing early dementia by testing gripping strength comprises a main member, a sensing member, and a control system. The main member has a display portion and a gripping portion. The sensing member is connected to the gripping portion to be pressed by a subject to generate a sensing signal. The control system is provided in the main member and having a control unit, a timer, a grip sensing module, and a determining module. The timer records a pressing time of the subject. The grip sensing module receives the sensing signal from the sensing members and generates a gripping strength signal according to the sensing signals. The determining module receives the pressing time and the gripping strength signal, and generates an assessing result by comparing the gripping strength signal with a gripping strength threshold and comparing the pressing time with a time threshold.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 3, 2025
    Inventors: YEN PO HUANG, ZONG MIN YANG, JUI CHEN HSU
  • Publication number: 20250113496
    Abstract: Various embodiments of the present application are directed towards an integrated chip (IC). The IC comprises a trench capacitor overlying a substrate. The trench capacitor comprises a plurality of capacitor electrode structures, a plurality of warping reduction structures, and a plurality of capacitor dielectric structures. The plurality of capacitor electrode structures, the plurality of warping reduction structures, and the plurality of capacitor dielectric structures are alternatingly stacked and define a trench segment that extends vertically into the substrate. The plurality of capacitor electrode structures comprise a metal component and a nitrogen component. The plurality of warping reduction structures comprise the metal component, the nitrogen component, and an oxygen component.
    Type: Application
    Filed: December 9, 2024
    Publication date: April 3, 2025
    Inventors: Ting-Chen Hsu, Hsin-Li Cheng, Jyun-Ying Lin, Yingkit Felix Tsui, Shu-Hui Su, Shi-Min Wu
  • Publication number: 20250101151
    Abstract: A hydrocarbon resin polymer including a repeating unit (A) is derived from dicyclopentadiene (DCPD). The hydrocarbon resin polymer has a fluorine substituent, and the content of the fluorine substituent is 100 to 4500 ppm based on the total weight of the hydrocarbon resin polymer. A manufacturing method of the above hydrocarbon resin polymer. The manufacturing method includes polymerizing a mixture in the presence of a fluorine-containing compound, wherein the fluorine-containing compound is a boron trifluoride complex and the mixture includes a dicyclopentadiene. A substrate structure includes a resin layer, and a conductive layer disposed on the resin layer. The resin layer is formed from a resin composition including the above hydrocarbon resin polymer using a cross-linking process.
    Type: Application
    Filed: September 25, 2024
    Publication date: March 27, 2025
    Inventors: Chien-Han CHEN, Wei-Liang LEE, Ming-Hung LIAO, Yu-Tien CHEN, Yu-Chen HSU, Ka Chun AU-YEUNG, Chiung-Yao HUANG, Tzu-Yin HUANG, Yi-Hsuan TANG
  • Patent number: 12252783
    Abstract: Low-flow tungsten chemical vapor deposition (CVD) techniques described herein provide substantially uniform deposition of tungsten on a semiconductor substrate. In some implementations, a flow of a processing vapor is provided to a CVD processing chamber such that a flow rate of tungsten hexafluoride in the processing vapor results in the tungsten layer being grown at a slower rate than a higher flow rate of the tungsten hexafluoride to promote substantially uniform growth of the tungsten layer. In this way, the low-flow tungsten CVD techniques may be used to achieve similar surface uniformity performance to an atomic layer deposition (ALD) while being a faster deposition process relative to ALD (e.g., due to the lower deposition rate and large quantity of alternating processing cycles of ALD). This reduces the likelihood of defect formation in the tungsten layer while increasing the throughput of semiconductor device processing for the semiconductor substrate (and other semiconductor substrates).
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pin-Wen Chen, Yuan-Chen Hsu, Ken-Yu Chang
  • Publication number: 20250087550
    Abstract: A semiconductor package includes a circuit substrate, a die, a frame structure, and a heat sink lid. The die is disposed on the circuit substrate and electrically connected with the circuit substrate. The die includes two first dies disposed side by side and separate from each other with a gap between two facing sidewalls of the two first dies. The frame structure is disposed on the circuit substrate and surrounding the die. The heat sink lid is disposed on the die and the frame structure. The head sink lid has a slit that penetrates through the heat sink lid in a thickness direction and exposes the gap between the two facing sidewalls of the two first dies.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Lai, Chien-Chia Chiu, Chen-Hua Yu, Der-Chyang Yeh, Cheng-Hsien Hsieh, Li-Han Hsu, Tsung-Shu Lin, Wei-Cheng Wu, Yu-Chen Hsu
  • Publication number: 20250066286
    Abstract: Described herein are methods of making (Z)-endoxifen, a salt thereof, crystalline forms of endoxifen, and compositions comprising them. Also described herein are crystalline forms of (Z)-endoxifen. A method of making (Z)-endoxifen may include one or more enrichment steps to enrich the amount of (Z)-endoxifen present in a composition. Enrichment may include one or more steps of crystallization, recrystallization, or fractional recrystallization to reduce the level of one or more impurities in the composition. These methods may be industrially scalable. Also described herein are compositions enriched for (Z)-endoxifen produced by the methods described herein.
    Type: Application
    Filed: January 11, 2023
    Publication date: February 27, 2025
    Inventors: Steven C. Quay, Yao-Lin SUN, Wei-Jen LO, Kun-Chih HUNG, Chia-Chen HSU
  • Publication number: 20250066582
    Abstract: A resin composition includes 100 parts by weight of hydrocarbon resin polymers and 0.01 to 50 parts by weight of divinyl aromatic compound. A substrate structure includes a resin layer and a conductive layer disposed on the resin layer, wherein the resin layer is formed from the resin composition. A manufacturing method of the resin composition includes the following steps: providing a mixture, wherein the mixture includes a monovinyl aromatic compound and a divinyl aromatic compound, and optionally includes a bridged ring compound; polymerizing the mixture to form a crude composition; and purifying the crude composition to prepare the resin composition.
    Type: Application
    Filed: August 22, 2024
    Publication date: February 27, 2025
    Inventors: Yi-Hsuan TANG, Chien-Han CHEN, Wei-Liang LEE, Ming-Hung LIAO, Yu-Tien CHEN, Yu-Chen HSU, Tzu-Yuan SHIH, Ka Chun AU-YEUNG
  • Publication number: 20250063743
    Abstract: Some implementations described herein provide techniques and apparatuses for an integrated circuit device including a trench capacitor structure that has a merged region. A material filling the merged region is different than a material that is included in electrode layers of the trench capacitor structure. Furthermore, the material filling the merged region includes a coefficient of thermal expansion and a modulus of elasticity that, in combination with the architecture of the trench capacitor structure, reduce thermally induced stresses and/or strains within the integrated circuit device relative to another integrated circuit device having a trench capacitor structure including a merged region and electrode layers of a same material.
    Type: Application
    Filed: August 15, 2023
    Publication date: February 20, 2025
    Inventors: Shu-Hui SU, Hsin-Li CHENG, YingKit Felix TSUI, Tuo-Hsin CHIEN, Jyun-Ying LIN, Shi-Min WU, Yu-Chi CHANG, Ting-Chen HSU
  • Publication number: 20250063744
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a substrate comprising first opposing sidewalls defining a first trench and second opposing sidewalls defining a second trench laterally offset from the first trench. A stack of layers comprises a plurality of conductive layers and a plurality of dielectric layers alternatingly stacked with the conductive layers. The stack of layers comprises a first segment in the first trench and a second segment in the second trench. A first lateral distance between the first segment and the second segment aligned with a first surface of the substrate is greater than a second lateral distance between the first segment and the second segment below the first surface of the substrate.
    Type: Application
    Filed: November 7, 2024
    Publication date: February 20, 2025
    Inventors: Hsin-Li Cheng, Jyun-Ying Lin, Alexander Kalnitsky, Shih-Fen Huang, Shu-Hui Su, Ting-Chen Hsu, Tuo-Hsin Chien, Felix Ying-Kit Tsui, Shi-Min Wu, Yu-Chi Chang
  • Publication number: 20250040299
    Abstract: A diode array includes a substrate and a plurality of light emitting diodes disposed on the substrate and arranged in an array. Each of the light emitting diodes includes a stack of functional layers includes a first semiconductor layer, a second semiconductor layer, and a light emitting layer located between the first semiconductor layer and the second semiconductor layer. At least one of the light emitting diodes includes a first current limiting region covering at least a portion of the first semiconductor layer, the light emitting layer or the second semiconductor layer; a first electrode electrically connected to the first semiconductor layer; and a second electrode electrically connected to the second semiconductor layer, wherein the first electrode and the second electrode are disposed at the same side of the first semiconductor layer.
    Type: Application
    Filed: September 27, 2024
    Publication date: January 30, 2025
    Inventors: HUNG-CHENG LIN, HUA-CHEN HSU, HUNG-KUANG HSU
  • Patent number: 12199139
    Abstract: Various embodiments of the present application are directed towards an integrated chip (IC). The IC comprises a trench capacitor overlying a substrate. The trench capacitor comprises a plurality of capacitor electrode structures, a plurality of warping reduction structures, and a plurality of capacitor dielectric structures. The plurality of capacitor electrode structures, the plurality of warping reduction structures, and the plurality of capacitor dielectric structures are alternatingly stacked and define a trench segment that extends vertically into the substrate. The plurality of capacitor electrode structures comprise a metal component and a nitrogen component. The plurality of warping reduction structures comprise the metal component, the nitrogen component, and an oxygen component.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: January 14, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Chen Hsu, Hsin-Li Cheng, Jyun-Ying Lin, Yingkit Felix Tsui, Shu-Hui Su, Shi-Min Wu