Patents by Inventor Chen Hung Huang

Chen Hung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942433
    Abstract: In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Jen-Fu Liu, Ming Hung Tseng, Tsung-Hsien Chiang, Yen-Liang Lin, Tzu-Sung Huang
  • Publication number: 20240096830
    Abstract: A method includes forming a first sealing layer at a first edge region of a first wafer; and bonding the first wafer to a second wafer to form a wafer stack. At a time after the bonding, the first sealing layer is between the first edge region of the first wafer and a second edge region of the second wafer, with the first edge region and the second edge region comprising bevels. An edge trimming process is then performed on the wafer stack. After the edge trimming process, the second edge region of the second wafer is at least partially removed, and a portion of the first sealing layer is left as a part of the wafer stack. An interconnect structure is formed as a part of the second wafer. The interconnect structure includes redistribution lines electrically connected to integrated circuit devices in the second wafer.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 21, 2024
    Inventors: Yu-Yi Huang, Yu-Hung Lin, Wei-Ming Wang, Chen Chen, Shih-Peng Tai, Kuo-Chung Yee
  • Publication number: 20240088204
    Abstract: Semiconductor structures and methods are provided. An exemplary method includes depositing a first conductive material layer over a substrate, patterning the first conductive material layer to form a first conductor plate over the substrate, forming a first high-K dielectric layer over the first conductor plate, forming a second high-K dielectric layer on the first high-K dielectric layer, forming a third high-K dielectric layer on the second high-K dielectric layer, and forming a second conductor plate over the third high-K dielectric layer and vertically overlapped with the first conductor plate, where a composition of the first high-K dielectric layer is the same as a composition of the third high-K dielectric layer and is different from a composition of the second high-K dielectric layer.
    Type: Application
    Filed: March 22, 2023
    Publication date: March 14, 2024
    Inventors: Li Chung Yu, Shin-Hung Tsai, Cheng-Hao Hou, Hsiang-Ku Shen, Chen-Chiu Huang, Dian-Hau Chen
  • Patent number: 9214732
    Abstract: A modified PIFA antenna is designed for wireless local area network (WLAN) applications. The modified PIFA antenna is configured to resist detuning effects caused by use of various cable lengths and is adapted for use in the 2.4 GHz operation band. A slot extends between the ground and feed portions of the antenna for slightly increasing frequency bandwidth of the antenna.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: December 15, 2015
    Assignee: TAOGIAS GROUP HOLDINGS LIMITED
    Inventors: Chen Hung Huang, Ronan Quinlan
  • Publication number: 20140218260
    Abstract: A modified PIFA antenna is designed for wireless local area network (WLAN) applications. The modified PIFA antenna is configured to resist detuning effects caused by use of various cable lengths and is adapted for use in the 2.4 GHz operation band. A slot extends between the ground and feed portions of the antenna for slightly increasing frequency bandwidth of the antenna.
    Type: Application
    Filed: November 26, 2013
    Publication date: August 7, 2014
    Inventors: Chen Hung Huang, Ronan Quinlan
  • Patent number: 8334720
    Abstract: An electronic apparatus for providing supply voltage to a first external device with a predetermined pin assignment specification is provided. The electronic apparatus includes a connection interface and a voltage supplier. The connection interface includes a first pin and a second pin. The voltage supplier provides a detection voltage signal to the first pin and determines whether to provide the supply voltage according to whether the second pin is at a first level in response to the detection voltage signal. When the second pin is at the first level in response to the detection voltage signal, the voltage supplier provides the supply voltage to the first pin.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: December 18, 2012
    Assignee: Delta Electronics, Inc.
    Inventors: Yi An Chen, Rong Haw Chen, Sheng Fu Cheng, Chen Hung Huang
  • Publication number: 20110267135
    Abstract: An electronic apparatus for providing supply voltage to a first external device with a predetermined pin assignment specification is provided. The electronic apparatus includes a connection interface and a voltage supplier. The connection interface includes a first pin and a second pin. The voltage supplier provides a detection voltage signal to the first pin and determines whether to provide the supply voltage according to whether the second pin is at a first level in response to the detection voltage signal. When the second pin is at the first level in response to the detection voltage signal, the voltage supplier provides the supply voltage to the first pin.
    Type: Application
    Filed: November 24, 2010
    Publication date: November 3, 2011
    Inventors: Yi An CHEN, Rong Haw Chen, Sheng Fu Cheng, Chen Hung Huang
  • Publication number: 20060033989
    Abstract: A method and system for visually representing a Pareto frontier includes performing two or more optimizations from different initial points to obtain optimal values for each of two or more objective functions. A minimum value and a maximum value are identified from the optimal values for each of the objective functions to establish a range for each of the objective functions. Each of the ranges is divided into a first number of bins for each of the objective functions and a determination is made about which of the objective functions will be placed on which of at least two axes. Indices of the bins are plotted along the determined of the at least two axes for each of the objective functions. The plotted indices represent the Pareto frontier for the objective functions along the at least two axes are output.
    Type: Application
    Filed: August 15, 2005
    Publication date: February 16, 2006
    Inventors: Kevin Chugh, Christina Bloebaum, Gautam Agrawal, Kemper Lewis, Chen-Hung Huang, Sumeet Parashar
  • Publication number: 20040159686
    Abstract: A garment hanger has a hanger body, a clasp and at least one engaging element. The hanger body has a plurality of first rounded teeth formed respectively along sides thereof, with a constant clearance between adjacent teeth. Each of the first rounded teeth has a top larger than its bottom to form a small mouth between the tops of two adjacent teeth. A hooked neck is connected to a roof of the hanger body. A pair of round notches is respectively disposed on exterior edges of a hook portion of the hooked neck in a symmetrical manner. The clasp has a protruding button and a tab at opposite ends. The protruding button and the tab respectively engage with the notches of the hooked neck. The engaging element has second rounded teeth properly spaced on one side thereof to respectively fit in clearances formed by the adjacent first teeth.
    Type: Application
    Filed: February 17, 2003
    Publication date: August 19, 2004
    Inventor: Chen Hung Huang
  • Publication number: 20040062784
    Abstract: An ant proof device includes an annular grooved body and a talcum powder product. The annular grooved body has a bottom face, an inner circumferential wall and an outer circumferential wall that form a receptacle. The nontoxic talcum powder product is contained in the receptacle for preventing ants from crawling through the annular grooved body. The talcum powder product is not volatile so that it is unnecessary to frequently supplement the talcum powder product. Also, children or pets will not accidentally get toxic. Its structure is simple and can be manufactured at low cost. A dustproof lid can be used with the ant proof device to prevent dust or water from dropping onto the surface of the talcum powder product.
    Type: Application
    Filed: September 23, 2003
    Publication date: April 1, 2004
    Inventor: Chen-Hung Huang
  • Publication number: 20020106157
    Abstract: A method of making an optical waveguide fiber grating substrate comprising the steps of: providing a plurality of tungstenoxide particles and a plurality of zirconiumoxide particles; mixing and grinding the tungstenoxide particles and the zirconiumoxide particles; pressing the mixed and ground particles into a plane green body; and sintering the green body into a sintered body, the green body being loaded with a carrier plate and covered with a cover plate.
    Type: Application
    Filed: August 28, 2001
    Publication date: August 8, 2002
    Inventors: Chieh Hu, Shu-Mei Yang, Jyh-Chen Chen, Jui-Ping Weng, Chen-Hung Huang