Abstract: A display substrate and a display device are provided. The display substrate includes a drive structure layer (131) and a light emitting structure layer that are stacked sequentially on a base substrate (121); the light emitting structure layer includes an anode layer, a pixel definition layer (171), a light emitting functional layer (181) and a cathode layer (191) that are disposed sequentially in a direction away from the base substrate (121); the anode layer includes multiple anodes (24), the pixel definition layer (171) is disposed on a side of the multiple anodes (24) facing away from the base substrate (121) and is provided with multiple pixel openings (172), the pixel openings (172) expose the anodes (24), the light emitting functional layer (181) and the cathode layer (191) are stacked sequentially on a side of the anodes (24) facing away from the base substrate (121).

Abstract: A display panel and a manufacturing method thereof. The display panel includes: a base substrate; and sub-pixels on the base substrate. Each sub-pixel includes: a light-emitting unit having first and second electrodes and a light-emitting layer; an encapsulation layer covering the light-emitting unit; a color filter on a side of the encapsulation layer away from the base substrate; and a micro lens on a side of the color filter away from the base substrate. A surface of the micro lens on a side away from the base substrate includes a central part and an edge part surrounding the central part, the central part is a flat surface parallel to the base substrate, the edge part is a curved surface protruding from an inside of the micro lens to an outside of the micro lens, and a roughness of the central part is greater than that of the edge part.

Abstract: Provided are a mask plate, a display substrate, a display panel and a display device. In the mask plate, an orthographic projection of at least one compensation light-shielding portion on a first base substrate is located between those of two adjacent light shielding portions. An orthographic projection of at least one compensation light-shielding portion in a second direction overlaps at least partially with that of a first width gradient portion of an ith light shielding portion in two adjacent light shielding portions, and an orthographic projection of the compensation light-shielding portion in a first direction overlaps at least partially with an orthographic projection of a first corner portion of a jth light shielding portion in the two adjacent light shielding portions. A corner of the first corner portion of the ith light shielding portion is oriented toward the jth light shielding portion.

Abstract: At least one surface of a cell body of a photovoltaic cell includes a first area and a second area; the first area is configured as a textured structure; the second area is configured as a plurality of pits having a projection size of 0.5 to 100 microns on the surface of the cell body.

Abstract: A communication method and a related apparatus, the method including receiving, by a first apparatus, at least one quantization threshold from a second apparatus, performing, by the first apparatus, quantization on related information of a first model of the first apparatus based on the at least one quantization threshold, and sending, by the first apparatus, first information to the second apparatus, wherein the first information indicates quantized related information of the first model.

Abstract: There is provided a display substrate and a display device. The display substrate includes a first metal layer, a first insulating layer, a metal oxide layer, a second insulating layer and a second metal layer which are stacked; wherein the metal oxide layer comprises a first pattern, a second pattern and a capacitance pattern, the first metal layer comprises a first electrode plate, there is at least a first overlapping region between the first electrode plate and the capacitance pattern to form a first storage capacitor, the second metal layer comprises a second electrode plate, there is at least a second overlapping region between the second electrode plate on the base substrate and the capacitance pattern to form a second storage capacitor, and the first electrode plate and the second electrode plate have same potential.

Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, a gate scan driving circuit, a light-emitting control scan driving circuit, a first power line, a first planarization layer, a second planarization layer and a first shielding layer, a second shielding layer and a plurality of touch traces. The first planarization layer and the second planarization layer further include an open slot. An orthographic projection of at least part of the touch traces on the base substrate falls into the open slot. In an area of the open slot, an orthographic projection of the second shielding layer on the base substrate overlaps with an orthographic projection of a part of the touch traces on the base substrate.

Abstract: A display panel and a manufacture method thereof, and a display apparatus are provided. The display panel has a display region and a border region that surrounds the display region and includes a peripheral circuit region and a peripheral region; the peripheral circuit region is between the display region and the peripheral region. At least a part of a barrier structure of the display panel is in the peripheral circuit region, and the barrier structure includes an organic barrier layer including an opening passing through the organic barrier layer and an inorganic barrier layer covering the organic barrier layer and filling the opening; an extension direction of the opening is same as that of an edge, close to the opening, of the display panel; the peripheral circuit is in the peripheral circuit region.

Abstract: A display panel and a display device, in which the display panel includes an array substrate; a light-emitting layer located on a side of the array substrate and comprising a plurality of light-emitting units that include a plurality of light-emitting unit groups, each of the light-emitting unit groups emitting light of a single color and including at least one light-emitting structure arranged in a first direction; an isolation structure located on a side of the array substrate and comprising an isolation opening, the light-emitting unit is arranged in the isolation opening; and a touch layer comprising touch traces that are arranged on a side of the isolation structure facing away from the array substrate.

Abstract: This application relates to the field of wireless communications technologies, and discloses an encoding method and apparatus, to improve accuracy of reliability calculation and ordering for polarized channels. The method includes: obtaining a first sequence used to encode K to-be-encoded bits, where the first sequence includes sequence numbers of N polarized channels, the first sequence is same as a second sequence or a subset of the second sequence, the second sequence comprises sequence numbers of Nmax polarized channels, and the second sequence is the sequence shown in Sequence Q11 or Table Q11, K is a positive integer, N is a positive integer power of 2, n is equal to or greater than 5, K?N, Nmax=1024; selecting sequence numbers of K polarized channels from the first sequence; and performing polar code encoding on K the to-be-encoded bits based on the selected sequence numbers of the K polarized channels.

Abstract: A display substrate, including: a first base substrate, including a display region and a peripheral region surrounding the display region; at least one common voltage line in the display region, each being configured with at least one conductive connection region; a first passivation layer on a side of the common voltage line away from the first base substrate; a common electrode on a side of the first passivation layer away from the first base substrate; a second passivation layer on a side of the common electrode away from the first base substrate; a pixel electrode on a side of the second passivation layer away from the first base substrate; and a first conductive connection electrode in the corresponding conductive connection region and in the same layer as the pixel electrode, where the common electrode is electrically connected to the common voltage line through the first conductive connection electrode.

Abstract: Provided is a tandem photovoltaic device comprising: a top cell, a bottom cell, and a first light-trapping structure, in stacking, wherein a band-gap width of the top cell is larger than that of the bottom cell; and at least one of a second light-trapping structure located on a side of a shading surface of the bottom cell and a third light-trapping structure located on a side of a phototropic surface of the top cell; the three light-trapping structures are selected from metal or semiconductor material, and localized surface plasmons generated by the three light-trapping structures correspond to different peaks of light-wave response; and the three light-trapping structures form microstructures on a first cross section, average sizes d1, d2 and d3 of projections of the microstructures and average distances w1, w2 and w3 between the microstructures have relationships: 2 ? ( w ? 1 w ? 2 ) 2 · d ? 2 d ? 1 ? 16 , and / or ? 2 ? ( w ? 3 w ? 1 ) 2 · d ? 1 d ? 3 ? 16.

Abstract: A display device and a manufacturing method thereof are disclosed. The display device includes a base substrate and at least one pixel circuit provided on the base substrate, and the pixel circuit includes a driving transistor, a first transistor, and a second transistor; the driving transistor includes a control electrode, a first electrode, and a second electrode; the first transistor includes a first active region, the second transistor includes a second active region, the driving transistor includes a fourth active region, at least one of a doping concentration of the first active region and a doping concentration of the second active region is greater than a doping concentration of the fourth active region.

Abstract: A method includes: obtaining first semantic information corresponding to data; converting the first semantic information into second semantic information, where the second semantic information belongs to common semantic information, and the common semantic information is a unified description of same semantics that is provided by different devices; and sending the second semantic information. Based on the method provided in this application, when a semantic extraction model of a transmit device and a semantic understanding model of a receive device are not jointly trained, accuracy of semantic communication between the transmit device and the receive device may be ensured by converting local semantic information into common semantic information.

Abstract: Sensing devices as well as methods of making and using the same. The sensing devices may include a pedestal (360,66,760) having a sensing element assembly (302) associated therewith and a port assembly (370,406,770) configured to mate with the pedestal (360,66,760). The port assembly (370,406,770) may include an axial passage (522) having a top portion (363) including an undercut feature (521,621,721) positioned to engage with a welded portion.

Abstract: A scheduling method, scheduling algorithm training method, related system, and storage medium are provided including the scheduling method being applied to a scheduling control system, which includes K network devices, and K is an integer greater than 1. The method further includes a first network device that obtains target state information of a first area, where the target state information includes network state information and user data packet cache information. The first network device generates first scheduling information based on the target state information of the first area and a first target sub-policy network, where the first target sub-policy network is a target sub-policy network that is in K target sub-policy networks and that corresponds to the first network device. The first network device delivers the first scheduling information to a terminal in the first area.

Abstract: Provided is an array substrate. The array substrate includes a substrate, comprising a display region and a peripheral region surrounding the display region, the peripheral region at least including a gate-driver-on-array (GOA) region extending in a first direction; a plurality of thin film transistors, the plurality of thin film transistors being disposed at least in the GOA region; and a plurality of first patterns, wherein the plurality of first patterns are disposed at least on one side of the GOA region, the plurality of first patterns are spaced apart from the GOA region in the first direction, and a plurality of first patterns disposed on a same side of the GOA region are arranged in an array.

Abstract: A display substrate is provided to include: a first base substrate including a sealing region and a display port region, wherein at least one first connection region and at least one second connection region are in the display port region, a first overlapping region is formed between the second and first connection regions; first and second connection terminals in the first and second connection regions, respectively; and a planarization layer including at least one first trench and at least one second trench corresponding to the first and second connection regions therein, respectively; orthographic projections of bottoms of first and second trenches on the first base substrate cover corresponding first and second connection regions, respectively; the planarization layer includes: a first pattern corresponding to the first overlapping region; orthographic projections of the first pattern and its corresponding first overlapping region on the first base substrate overlap with each other.

Abstract: The present disclosure relates to a display panel and a display apparatus. The display panel includes an array substrate, a color filter substrate, a driving chip, and a backlight structure; where the driving chip is electrically connected to the array substrate and is configured to control a voltage signal on the array substrate, the driving chip is disposed at an inner side of the array substrate, and the color filter substrate is located between the array substrate and the backlight structure. In the above structure, the array substrate may be covered on the outer side of the color filter substrate and the driving chip, thereby achieving the protection of the structure at an inner side of the array substrate.

Abstract: A thin film transistor, a shift register unit, a gate driving circuit and a display panel are provided. The M source branches and the N drain branches extend along a first direction and are arranged at intervals; in each of the P source-drain units, the M source branches and the N drain branches are alternately arranged, and M is greater than or equal to N; a semiconductor layer includes sub-channel regions between one drain branch and one source branch adjacent to each other; a sum of widths of the sub-channel regions of the P source-drain units in the first direction is W, and an average length of the sub-channel regions of the P source-drain units in a direction perpendicular to the first direction is L; 12?W/L?400, P, M and N are integers greater than or equal to 1, and P×N?4.