Patents by Inventor Chen-Yi Lee

Chen-Yi Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210233809
    Abstract: The present disclosure describes a method for forming a capping layer within a low-k layer of a metallization layer to prevent damage to the low-k layer from subsequent processing operations. The method includes forming, on a substrate, a metallization layer having conductive structures in a low-k dielectric. The method further includes forming a capping layer on the conductive structures, where forming the capping layer includes exposing the metallization layer to a first plasma process to form a nitrogen-rich protective layer below a top surface of the low-k dielectric, releasing a precursor on the metallization layer to cover top surfaces of the conductive structures with precursor molecules, and treating the precursor molecules with a second plasma process to dissociate the precursor molecules and form the capping layer. Additionally, the method includes forming an etch stop layer to cover the capping layer and top surfaces of the low-k dielectric.
    Type: Application
    Filed: August 12, 2020
    Publication date: July 29, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Yi LEE, Chia-Lin HSU
  • Patent number: 11069573
    Abstract: An embodiment is a package including a first package component. The first package component including a first die attached to a first side of a first interconnect structure, a molding material surrounding the first die, and a second interconnect structure over the molding material and the first die, a first side of the second interconnect structure coupled to the first die with first electrical connectors. The first package component further includes a plurality of through molding vias (TMVs) extending through the molding material, the plurality of TMVs coupling the first interconnect structure to the second interconnect structure, and a second die attached to a second side of the second interconnect structure with second electrical connectors, the second side of the second interconnect structure being opposite the first side of the second interconnect structure.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: July 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Kuo-Chung Yee, Mirng-Ji Lii, Chien-Hsun Lee, Jiun Yi Wu
  • Patent number: 11063206
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first liner on the MTJ; forming a second liner on the first liner; forming an inter-metal dielectric (IMD) layer on the MTJ, and forming a metal interconnection in the IMD layer, the second liner, and the first liner to electrically connect the MTJ. Preferably, the first liner and the second liner are made of different materials.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: July 13, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 10753956
    Abstract: A motion detecting device includes an accelerometer configured to generate gravitational acceleration readings associated respectively with consecutive time segments, an angular acceleration sensor and configured to generate angular acceleration readings, and a processor operable in one of a standby mode and an active mode. When operated in the standby mode, the processor activates the accelerometer, deactivates the angular acceleration sensor, and determines whether the user is in a substantial moving state. When determined that the user is in the substantial moving state, the processor switches to the active mode to activate both the accelerometer and said angular acceleration sensor, in order to determine the motion of the user.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: August 25, 2020
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Kelvin Yi-Tse Lai, Yu-Lin Tsai, Chen-Yi Lee
  • Publication number: 20200229719
    Abstract: A physiological sensing method and a device using the same is disclosed. The two sides of the device are respectively provided with an installed component. The device is arranged on the wrist of a user through the installed components. At least two physiological sensors, arranged in row on the installed component, generate and transmit original physiological signals to a controller. The controller filters out the original physiological signals to generate two basic energy values, multiplies the two basic physiological parameters by the two basic energy values to generate two basic estimation parameters, and substitutes the two basic energy values into a standard physiological value equation to generate a standard physiological value.
    Type: Application
    Filed: June 14, 2019
    Publication date: July 23, 2020
    Inventors: CHEN-YI LEE, EUGENE LEE, TSU JUI HSU
  • Publication number: 20200209139
    Abstract: A device and method for detecting particles by using electrical impedance measurement, in particular, relating to an improved electrical impedance measurement microfluidic chip and an improved particle detection method. The device comprises a sample injection part, a main channel (4) and an electrical impedance detection part. By means of said device and method, the present invention can accurately distinguish, detect and count different particles.
    Type: Application
    Filed: August 30, 2018
    Publication date: July 2, 2020
    Inventors: Chen-Yi Lee, Chao-Hong Chen, Chun-Kai Chiang, Yi Lu
  • Publication number: 20200086320
    Abstract: A particulate matter detection device and a detection method, in particular, a detection device and detection method based on a dielectrophoresis and electrical impedance measurement technology is provided, and more in particular, an electrical impedance detection device utilizing a microfluidic chip, and an application thereof for detecting target particles are provided. The device comprises a sample introducing part, a main channel (3), a dielectrophoresis electric field generating part, and an electrical impedance measurement part. By using the dielectrophoresis electric field generating part to selectively control target cells, detection or counting is performed on a sample flexibly and precisely without the use of labels and antibodies.
    Type: Application
    Filed: August 30, 2018
    Publication date: March 19, 2020
    Inventors: Chen-Yi Lee, Chao-Hong Chen, Jyun-Hong Wang, Yi Lu
  • Patent number: 10326586
    Abstract: An encryption/decryption apparatus and a power analysis protecting method thereof are provided. The encryption/decryption apparatus adapted to perform encryption/decryption operation on digital data includes a data encryption/decryption unit, a random number generator, and a power analysis protecting circuit. The data encryption/decryption unit receives the digital data and performs an encryption/decryption operation on the digital data. The random number generator is used to generate random number data, the random number data has N bits, and N is a positive integer. The power analysis protecting circuit generates M kinds of power signals having different levels according to each bit data of the random number data when the random number data is received by the power analysis protecting circuit, and M is equal to the Nth power of 2.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: June 18, 2019
    Assignee: Winbond Electronics Corp.
    Inventors: Chun-Yuan Yu, Szu-Chi Chung, Sung-Shine Lee, Hsie-Chia Chang, Chen-Yi Lee
  • Patent number: 10319719
    Abstract: A semiconductor device includes a first a first transistor configured to operate at a first threshold voltage level. The first transistor includes a first gate structure and a first drain terminal electrically coupled to the first gate structure. The semiconductor device also includes a second transistor configured to operate at a second threshold voltage level different from the first threshold voltage level. The second transistor includes a second source terminal and a second gate structure electrically coupled to the first gate structure. The first gate structure and the second gate structure comprise a first component in common, and the second gate structure further includes at least one extra component disposed over the first component. The number of the at least one extra component is determined by a desired voltage difference between the first threshold voltage level and the second threshold voltage level.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: June 11, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Chen-Yi Lee, Shih-Fen Huang, Pei-Lun Wang, Dah-Chuen Ho, Yu-Chang Jong, Mohammad Al-Shyoukh, Alexander Kalnitsky
  • Patent number: 10277392
    Abstract: A cracking method for cracking a secret key of an encrypting device includes: building up a leakage model for the encrypting device; performing a mathematical calculation on the leakage model, according to a plurality of sets of input data, to generate a mathematical model; generating a plurality of sets of hypothesized keys; generating a plurality of sets of simulation data corresponding to the hypothesized keys using the mathematical model; providing the input data for the encrypting device and detecting a plurality of sets of leakage data generated by the encrypting device; performing the mathematical calculation on the leakage data to generate calculated data; determining a correlation between each of the simulation data and the calculated data; and determining one of the hypothesized keys to be consistent with the secret key according to the correlation.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: April 30, 2019
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Sung-Shine Lee, Szu-Chi Chung, Chun-Yuan Yu, Hsi-Chia Chang, Chen-Yi Lee
  • Publication number: 20190080226
    Abstract: A method of designing a neural network system includes the following steps. Firstly, a neural network system is defined. The neural network system includes an original weight group containing plural neuron connection weights. Then, a training phase is performed to acquire values of the plural neuron connection weights in the original weight group. Then, the plural neuron connection weights into first-portion neuron connection weights and second-portion neuron connection weights according to a threshold value, wherein absolute values of the first-portion neuron connection weights are lower than the threshold value. Then, the values of the first-portion neuron connection weights are modified to zero. Then, a modified weight group is generated. The zero-modified first-portion neuron connection weights and the second-portion neuron connection weights are combined as the modified weight group.
    Type: Application
    Filed: December 5, 2017
    Publication date: March 14, 2019
    Inventors: Chen-Yi Lee, Wan-Ju Yu
  • Publication number: 20170353295
    Abstract: A cracking method for cracking a secret key of an encrypting device includes: building up a leakage model for the encrypting device; performing a mathematical calculation on the leakage model, according to a plurality of sets of input data, to generate a mathematical model; generating a plurality of sets of hypothesized keys; generating a plurality of sets of simulation data corresponding to the hypothesized keys using the mathematical model; providing the input data for the encrypting device and detecting a plurality of sets of leakage data generated by the encrypting device; performing the mathematical calculation on the leakage data to generate calculated data; determining a correlation between each of the simulation data and the calculated data; and determining one of the hypothesized keys to be consistent with the secret key according to the correlation.
    Type: Application
    Filed: May 17, 2017
    Publication date: December 7, 2017
    Inventors: Sung-Shine LEE, Szu-Chi CHUNG, Chun-Yuan YU, Hsi-Chia CHANG, Chen-Yi LEE
  • Publication number: 20170343573
    Abstract: A motion detecting device includes an accelerometer configured to generate gravitational acceleration readings associated respectively with consecutive time segments, an angular acceleration sensor and configured to generate angular acceleration readings, and a processor operable in one of a standby mode and an active mode. When operated in the standby mode, the processor activates the accelerometer, deactivates the angular acceleration sensor, and determines whether the user is in a substantial moving state. When determined that the user is in the substantial moving state, the processor switches to the active mode to activate both the accelerometer and said angular acceleration sensor, in order to determine the motion of the user.
    Type: Application
    Filed: May 22, 2017
    Publication date: November 30, 2017
    Inventors: Kelvin Yi-Tse LAI, Yu-Lin TSAI, Chen-Yi LEE
  • Publication number: 20170302435
    Abstract: An encryption/decryption apparatus and a power analysis protecting method thereof are provided. The encryption/decryption apparatus adapted to perform encryption/decryption operation on digital data includes a data encryption/decryption unit, a random number generator, and a power analysis protecting circuit. The data encryption/decryption unit receives the digital data and performs an encryption/decryption operation on the digital data. The random number generator is used to generate random number data, the random number data has N bits, and N is a positive integer. The power analysis protecting circuit generates M kinds of power signals having different levels according to each bit data of the random number data when the random number data is received by the power analysis protecting circuit, and M is equal to the Nth power of 2.
    Type: Application
    Filed: March 13, 2017
    Publication date: October 19, 2017
    Applicant: Winbond Electronics Corp.
    Inventors: Chun-Yuan Yu, Szu-Chi Chung, Sung-Shine Lee, Hsie-Chia Chang, Chen-Yi Lee
  • Publication number: 20170243865
    Abstract: A semiconductor device includes a first a first transistor configured to operate at a first threshold voltage level. The first transistor includes a first gate structure and a first drain terminal electrically coupled to the first gate structure. The semiconductor device also includes a second transistor configured to operate at a second threshold voltage level different from the first threshold voltage level, The second transistor includes a second source terminal and a second gate structure electrically coupled to the first gate structure. The first gate structure and the second gate structure comprise a first component in common, and the second gate structure further includes at least one extra component disposed over the first component. The number of the at least one extra component is determined by a desired voltage difference between the first threshold voltage level and the second threshold voltage level.
    Type: Application
    Filed: May 8, 2017
    Publication date: August 24, 2017
    Inventors: CHEN-YI LEE, SHIH-FEN HUANG, PEI-LUN WANG, DAH-CHUEN HO, YU-CHANG JONG, MOHAMMAD AL-SHYOUKH, ALEXANDER KALNITSKY
  • Patent number: 9735042
    Abstract: A semiconductor structure includes a semiconductor substrate having a first portion and a second portion. A first Fin field-effect transistor (FinFET) is formed over the first portion of the semiconductor substrate, wherein the first FinFET includes a first fin having a first fin height. A second FinFET is formed over the second portion of the semiconductor substrate, wherein the second FinFET includes a second fin having a second fin height different from the first fin height. A top surface of the first fin is substantially level with a top surface of the second fin. A punch-through stopper is underlying and adjoining the first FinFET, wherein the punch-through stopper isolates the first fin from the first portion of the semiconductor substrate.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: August 15, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Ting Hung, Cheng-Hung Chang, Chen-Yi Lee, Chen-Nan Yeh, Chen-Hua Yu
  • Publication number: 20170154882
    Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a first transistor configured to include a first threshold voltage level. The first transistor includes a gate structure. The gate structure includes a first component including a first conductive type. A second transistor configures to include a second threshold voltage level different from the first threshold voltage level. The second transistor includes a gate structure. The gate structure includes a second component including the first conductive type. At least one extra component is disposed over the second component. The least one extra component includes a second conductive type opposite to the first conductive type. The first transistor and the second transistor are coupled such that the number of the least one extra component is determined by a desired voltage difference between the first threshold voltage level and the second threshold voltage level.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 1, 2017
    Inventors: CHEN-YI LEE, SHIH-FEN HUANG, PEI-LUN WANG, DAH-CHUEN HO, YU-CHANG JONG, MOHAMMAD AL-SHYOUKH, ALEXANDER KALNITSKY
  • Patent number: 9666574
    Abstract: Some embodiments of the present disclosure provide a semiconductor device. The semiconductor device includes a first transistor configured to include a first threshold voltage level. The first transistor includes a gate structure. The gate structure includes a first component including a first conductive type. A second transistor configures to include a second threshold voltage level different from the first threshold voltage level. The second transistor includes a gate structure. The gate structure includes a second component including the first conductive type. At least one extra component is disposed over the second component. The least one extra component includes a second conductive type opposite to the first conductive type. The first transistor and the second transistor are coupled such that the number of the least one extra component is determined by a desired voltage difference between the first threshold voltage level and the second threshold voltage level.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: May 30, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chen-Yi Lee, Shih-Fen Huang, Pei-Lun Wang, Dah-Chuen Ho, Yu-Chang Jong, Mohammad Al-Shyoukh, Alexander Kalnitsky
  • Patent number: 9573129
    Abstract: A sensing system includes a processing unit and sensor chip. The sensor chip includes a microelectrode array, a droplet space over the microelectrode array, and a plurality of control units coupled together in a daisy-chain configuration. Each of the control units is coupled to a respective one of the microelectrodes of the microelectrode array. The control units are controlled by the processing unit to drive movement of a droplet in the droplet space, and to inspect the droplet via the microelectrodes.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: February 21, 2017
    Assignee: National Chiao Tung University
    Inventors: Chen-Yi Lee, Kelvin Yi-Tse Lai, Yu-Tao Yang
  • Publication number: 20170043159
    Abstract: Provided are a closed-loop stimulating apparatus and a stimulating method thereof, where the method includes: determining a physiological status variation of a user receiving a stimulating signal according to an electrocardiogram signal of the user, and generating the stimulating signal according to a variation of the electrocardiogram signal relative to electrocardiogram history data of the user.
    Type: Application
    Filed: September 18, 2015
    Publication date: February 16, 2017
    Inventor: Chen-Yi Lee