Patents by Inventor Chen-Yu Chang
Chen-Yu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11968512Abstract: In an example, a speaker device may include a first transducer and a second transducer. The first transducer may include a first diaphragm, a first magnetic circuit, and a first voice coil disposed in a magnetic gap of the first magnetic circuit to cause vibration of the first diaphragm. The second transducer may include a second diaphragm, a second magnet circuit, and a second voice coil disposed in a magnetic gap of the second magnetic circuit to cause vibration of the second diaphragm. Further, the speaker device may include a magnetic plate having a first surface coupled to the first transducer and a second surface coupled to the second transducer. The first surface is opposite to the second surface.Type: GrantFiled: June 22, 2022Date of Patent: April 23, 2024Assignee: Hewlett-Packard Development Company, L.P.Inventors: Yen-Hsin Ho, Yi-Ying Lai, Chen-Hui Hu, Chen-Yu Chang
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Patent number: 11967615Abstract: Embodiments of the present invention are directed to dual threshold voltage (VT) channel devices and their methods of fabrication. In an example, a semiconductor device includes a gate stack disposed on a substrate, the substrate having a first lattice constant. A source region and a drain region are formed on opposite sides of the gate electrode. A channel region is disposed beneath the gate stack and between the source region and the drain region. The source region is disposed in a first recess having a first depth and the drain region disposed in a second recess having a second depth. The first recess is deeper than the second recess. A semiconductor material having a second lattice constant different than the first lattice constant is disposed in the first recess and the second recess.Type: GrantFiled: December 23, 2015Date of Patent: April 23, 2024Assignee: Intel CorporationInventors: Hsu-Yu Chang, Neville L. Dias, Walid M. Hafez, Chia-Hong Jan, Roman W. Olac-Vaw, Chen-Guan Lee
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Publication number: 20240127988Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.Type: ApplicationFiled: March 2, 2023Publication date: April 18, 2024Inventors: HSIU-CHE YEN, YUNG-HSIEN CHANG, CHENG-YU TUNG, Chia-Yuan Lee, CHEN-NAN LIU, Yao-Te Chang, FU-HUA CHU
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Publication number: 20240127989Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.Type: ApplicationFiled: January 25, 2023Publication date: April 18, 2024Inventors: CHIA-YUAN LEE, CHENG-YU TUNG, HSIU-CHE YEN, CHEN-NAN LIU, YUNG-HSIEN CHANG, YAO-TE CHANG, FU-HUA CHU
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Publication number: 20240096705Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.Type: ApplicationFiled: November 30, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuei-Yu Kao, Chen-Yui Yang, Hsien-Chung Huang, Chao-Cheng Chen, Shih-Yao Lin, Chih-Chung Chiu, Chih-Han Lin, Chen-Ping Chen, Ke-Chia Tseng, Ming-Ching Chang
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Publication number: 20240090564Abstract: Features relating to a vaporizer body are provided. The vaporizer body may include an outer shell that includes an inner region defined by an outer shell sidewall. A support structure is configured to fit within the inner region of the outer shell. The support structure includes a storage region defined by a top support structure, a bottom support structure, a bottom cap, and a gasket. An integrated board assembly is configured to fit within the storage region of the support structure. The integrated board assembly may include a printed circuit board assembly formed of multiple layers that form a rigid structure and that include an inner, flexible layer. A first antenna is integrated at a proximal end of the flexible layer, and a second antenna is integrated at a distal end of the flexible layer.Type: ApplicationFiled: April 24, 2023Publication date: March 21, 2024Inventors: Joshua Fu, Christopher Loental, Marko Markovic, Alexander Weiss, Alexander Ringrose, David Carlberg, Robyn Nariyoshi, Devin Spratt, Nicholas J. Hatton, Yen Jen Chang, Chen Yu Li, Barry Tseng, Prince Wang, Thomas Germann, Andreas Schaefer
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Publication number: 20240099154Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.Type: ApplicationFiled: November 21, 2023Publication date: March 21, 2024Applicant: UNITED MICROELECTRONICS CORPInventors: Hui-Lin Wang, Si-Han Tsai, Dong-Ming Wu, Chen-Yi Weng, Ching-Hua Hsu, Ju-Chun Fan, Yi-Yu Lin, Che-Wei Chang, Po-Kai Hsu, Jing-Yin Jhang
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Patent number: 11917923Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.Type: GrantFiled: April 28, 2021Date of Patent: February 27, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Ching-Hua Hsu, Si-Han Tsai, Shun-Yu Huang, Chen-Yi Weng, Ju-Chun Fan, Che-Wei Chang, Yi-Yu Lin, Po-Kai Hsu, Jing-Yin Jhang, Ya-Jyuan Hung
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Publication number: 20230421961Abstract: In an example, a speaker device may include a first transducer and a second transducer. The first transducer may include a first diaphragm, a first magnetic circuit, and a first voice coil disposed in a magnetic gap of the first magnetic circuit to cause vibration of the first diaphragm. The second transducer may include a second diaphragm, a second magnet circuit, and a second voice coil disposed in a magnetic gap of the second magnetic circuit to cause vibration of the second diaphragm. Further, the speaker device may include a magnetic plate having a first surface coupled to the first transducer and a second surface coupled to the second transducer. The first surface is opposite to the second surface.Type: ApplicationFiled: June 22, 2022Publication date: December 28, 2023Inventors: Yen-Hsin HO, Yi-Ying LAI, Chen-Hui HU, Chen-Yu CHANG
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Publication number: 20230359592Abstract: In an approach, a processor obtains a configuration file of a distributed file system federation, the configuration file comprising a list of a plurality of subclusters within the distributed file system federation and migration trigger factors for the plurality of subclusters. A processor determines a list of one or more source subclusters and a list of to-be-migrated directories in the one or more source subclusters based on a scanning result of the plurality of subclusters and the migration trigger factors in the configuration file. A processor generates a migration plan to migrate the to-be-migrated directories from the one or more source subclusters to one or more target subclusters in the distributed file system federation.Type: ApplicationFiled: May 6, 2022Publication date: November 9, 2023Inventors: Jun Guo, Xiang Yu Yang, Deng Xin Luo, Na Liu, Chen Yu Chang, Qin Dong Yin
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Publication number: 20230237827Abstract: An example operation may include one or more of generating a plurality of bounding boxes at a plurality of content areas in an image corresponding to a plurality of pieces of text within the image, converting the plurality of bounding boxes into a plurality of bounding box vectors based on attributes of the plurality of bounding boxes, training a machine learning model to transform a bounding box into a location in vector space based on the plurality of bounding box vectors, and storing the trained machine learning model in memory.Type: ApplicationFiled: January 27, 2022Publication date: July 27, 2023Inventors: Zhong Fang Yuan, Tong Liu, Pitipong Jun Sen Lin, Elaine Marie Branagh, Chen Yu Chang
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Patent number: 11675978Abstract: An approach is provided for improving a named entity recognition. Using a multi-label classification in a neural network, a sub-entity is identified in an original sentence. First and second labels are determined indicating first and second candidate types of the sub-entity. First and second replacement sentences are generated. The first replacement sentence replaces the sub-entity in the original sentence with a first sub-entity of the first candidate type. The second replacement sentence replaces the sub-entity in the original sentence with a second sub-entity of the second candidate type. First and second confidence scores for the first and second replacement sentences are determined. Based on the first confidence score exceeding the second confidence score by more than a threshold amount, the neural network is retrained by selecting the first instead of the second candidate type as the sub-entity type.Type: GrantFiled: January 6, 2021Date of Patent: June 13, 2023Assignee: International Business Machines CorporationInventors: Zhong Fang Yuan, Tong Liu, Bin Shang, Chen Yu Chang, Na Liu
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Publication number: 20220215173Abstract: An approach is provided for improving a named entity recognition. Using a multi-label classification in a neural network, a sub-entity is identified in an original sentence. First and second labels are determined indicating first and second candidate types of the sub-entity. First and second replacement sentences are generated. The first replacement sentence replaces the sub-entity in the original sentence with a first sub-entity of the first candidate type. The second replacement sentence replaces the sub-entity in the original sentence with a second sub-entity of the second candidate type. First and second confidence scores for the first and second replacement sentences are determined. Based on the first confidence score exceeding the second confidence score by more than a threshold amount, the neural network is retrained by selecting the first instead of the second candidate type as the sub-entity type.Type: ApplicationFiled: January 6, 2021Publication date: July 7, 2022Inventors: Zhong Fang Yuan, Tong Liu, Bin Shang, Chen Yu Chang, Na Liu
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Publication number: 20220172106Abstract: One or more computer processors extract respective features for each inter-modal sample in an inter-modal dataset, for each intra-modal sample in an intra-modal dataset, and a subsequent sample, wherein the inter-modal dataset and the intra-modal dataset are contained in a multi-modal training dataset. The one or more computer processors estimate an inter-modal label utilizing inter-modal label transformation of a subsequent sample. The one or more computer processors estimate an intra-modal label utilizing intra-modal label transformation of the subsequent sample. The one or more computer processors label the subsequent sample with a cross-modal label by combining the estimated inter-modal label and the estimated intra-modal label.Type: ApplicationFiled: December 1, 2020Publication date: June 2, 2022Inventors: Bin Shang, Xue Ying Zhang, YANG LIANG, Na Liu, Chen Yu Chang, Fei Qi
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Patent number: 8775735Abstract: A storage system includes a redundant array of independent disks (RAID), a file subsystem, and a multiple device control unit. The RAID includes a plurality of disks and a bitmap. The file subsystem is used for executing a write command and a trim command. The multiple device control unit does not execute a first synchronization operation on the plurality of disks during the RAID is built, does not execute a second synchronization operation on expansion capacity of the plurality of disks during the RAID is expanded, executes a third synchronization operation on at least one added disk according to the blocks of the plurality of disks occupied by the data during the RAID is reshaped, and/or executes a corresponding operation on at least one added disk according to the blocks of the plurality of disks occupied by the data during the RAID is recovered.Type: GrantFiled: March 22, 2012Date of Patent: July 8, 2014Assignee: Synology IncorporatedInventors: Chen-Yu Chang, Tun-Hong Tu
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Publication number: 20130254480Abstract: A storage system includes a redundant array of independent disks (RAID), a file subsystem, and a multiple device control unit. The RAID includes a plurality of disks and a bitmap. The file subsystem is used for executing a write command and a trim command. The multiple device control unit does not execute a first synchronization operation on the plurality of disks during the RAID is built, does not execute a second synchronization operation on expansion capacity of the plurality of disks during the RAID is expanded, executes a third synchronization operation on at least one added disk according to the blocks of the plurality of disks occupied by the data during the RAID is reshaped, and/or executes a corresponding operation on at least one added disk according to the blocks of the plurality of disks occupied by the data during the RAID is recovered.Type: ApplicationFiled: March 22, 2012Publication date: September 26, 2013Applicant: SYNOLOGY INCORPORATEDInventors: Chen-Yu Chang, Tun-Hong Tu
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Patent number: 8522058Abstract: A computer system with power source control and a power source control method are presented. The computer system at least includes a first storage unit and a second storage unit, and the first storage unit stores a system program required by the computer system in basic operation. A switch is disposed on a power supply path between a power supply module and the second storage unit, such that the power supply module provides an electric power for the second storage unit to operate through the switch. When the second storage unit is in an idle state, the switch is used to cut off the power supply to the second storage unit, so as to effectively reduce the power consumption of the computer system.Type: GrantFiled: October 15, 2009Date of Patent: August 27, 2013Assignee: MSI Computer (SHENZHEN) Co., Ltd.Inventors: Chen-Yu Chang, Chun-Chieh Chien, Wei Hao Chen, Ruei-Chang Hsu, Tsung-Hai Hsu
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Patent number: 8082119Abstract: A method for controlling mask fabrication is provided, wherein the method uses statistical process control analysis. A manufacturing model is defined. A process run of a mask is performed as defined by the manufacturing model. A fault detection analysis is performed to reduce a bias in the manufacturing model. A fine-tuning signal is generated in response to a result of the fault detection analysis. The process run operation is adjusted according to the fine-tuning signal.Type: GrantFiled: July 18, 2007Date of Patent: December 20, 2011Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yuh-Fong Hwang, Chen-Yu Chang, Chiech-Yi Kuo, Wen-Yao Chen
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Publication number: 20100281276Abstract: A computer system with power source control and a power source control method are presented. The computer system at least includes a first storage unit and a second storage unit, and the first storage unit stores a system program required by the computer system in basic operation. A switch is disposed on a power supply path between a power supply module and the second storage unit, such that the power supply module provides an electric power for the second storage unit to operate through the switch. When the second storage unit is in an idle state, the switch is used to cut off the power supply to the second storage unit, so as to effectively reduce the power consumption of the computer system.Type: ApplicationFiled: October 15, 2009Publication date: November 4, 2010Applicant: MICRO-STAR INTERNATIONA'L CO., LTD.Inventors: Chen Yu Chang, Chun Chieh Chien, Wei Hao Chen, Ruei Chang Hsu, Tsung Hai Hsu
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Publication number: 20080015818Abstract: A mask fabrication system. The mask fabrication system contains a processing tool, a metrology tool, and a controller. The processing tool processes a mask. The metrology tool inspects the mask to obtain an inspection result. The controller generates a manufacturing model of the processing tool and calibrates the manufacturing model according to a device data, a material data, and the inspection result of the mask.Type: ApplicationFiled: July 18, 2007Publication date: January 17, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yuh-Fong Hwang, Chen-Yu Chang, Chiech-Yi Kuo, Wen-Yao Chen