Abstract: A computer system with power source control and a power source control method are presented. The computer system at least includes a first storage unit and a second storage unit, and the first storage unit stores a system program required by the computer system in basic operation. A switch is disposed on a power supply path between a power supply module and the second storage unit, such that the power supply module provides an electric power for the second storage unit to operate through the switch. When the second storage unit is in an idle state, the switch is used to cut off the power supply to the second storage unit, so as to effectively reduce the power consumption of the computer system.

Abstract: A mask fabrication system. The mask fabrication system contains a processing tool, a metrology tool, and a controller. The processing tool processes a mask. The metrology tool inspects the mask to obtain an inspection result. The controller generates a manufacturing model of the processing tool and calibrates the manufacturing model according to a device data, a material data, and the inspection result of the mask.

Abstract: A mask fabrication system. The mask fabrication system contains a processing tool, a metrology tool, and a controller. The processing tool processes a mask. The metrology tool inspects the mask to obtain an inspection result. The controller generates a manufacturing model of the processing tool and calibrates the manufacturing model according to a device data, a material data, and the inspection result of the mask.

Abstract: An interface panel structure used in an electric machine; comprises a fixed seat with a fixed seat with a holding element and sliding rails and a movable sliding seat installed therein. Fixing holes for accepting the holding element and sliding grooves operated in cooperation with the sliding rails are disposed in the sliding seat. In addition, a guide rod is installed in the sliding seat for touching off the holding the holding element to separate it from the fixing hole. When the holding element and the fixing hole are engaged, the sliding seat with interface outlets disposed at the front face thereof is hidden in the fixed seat fixed in the electric machine. And, there is no need to open holes on the surface of the electric machine by means of the interface panel structure.

Abstract: A mask fabrication system. The mask fabrication system contains a processing tool, a metrology tool, and a controller. The processing tool processes a mask. The metrology tool inspects the mask to obtain an inspection result. The controller generates a manufacturing model of the processing tool and calibrates the manufacturing model according to a device data, a material data, and the inspection result of the mask.

Abstract: In this invention a coating of unexposed photoresist is used to protect from semiconductor processing the area immediately above a zero layer alignment mark used for a wafer stepper alignment. The entire surface of a wafer is coated with photoresist and all shot sites on the surface of a wafer including those containing the zero layer alignment marks are exposed with circuit patterns. Before the exposed areas of photoresist are removed, a protective coating of unexposed photoresist is applied to the surface of the wafer immediately above the alignment marks but within the boundaries of the shot site. The wafer is processed in the areas outside of the protective coating of photoresist including the shot site containing alignment marks. The area under the protective coating is not processed. This maintains a clear and concise view of the alignment marks. The area beyond the protective coating is processed along with the other shot sites.

Abstract: An advanced process control method using time interval between lots of a particular product to control the weighting of feedback data is described. A plurality of products are fabricated wherein the products are tracked by the process control method based on product type, for example. Variation in a parameter is detected. The adjustment speed of a process recipe is determined based on a time interval weighting wherein the time interval is defined as the time between processing of lots of the same product type. The process recipe is updated at the determined adjustment speed to decrease variation of the parameter.

Abstract: A memory interface control circuit. The SDRAM slot is for a SDRAM and is coupled to a memory control chip. The SDRAM slot comprises a floating pin responding to a ground pad of the SDRAM. The DDR-RAM slot is for a DDR-RAM and is coupled to the memory control chip. The voltage switching circuit includes an input terminal coupled to the floating pin and provides power to the SDRAM or the DDR-RAM according to the voltage level of the floating pin. The terminal circuit includes a plurality of transistors, a first terminal coupled to a reference voltage, a second terminal coupled to a terminal resistor and a control terminal coupled to the floating pin. The voltage switching circuit selectively provides power, and the terminal is switched according to the voltage level of the floating pin.

Abstract: In this invention a coating of unexposed photoresist is used to protect from semiconductor processing the area immediately above a zero layer alignment mark used for a wafer stepper alignment. The entire surface of a wafer is coated with photoresist and all shot sites on the surface of a wafer including those containing the zero layer alignment marks are exposed with circuit patterns. Before the exposed areas of photoresist are removed, a protective coating of unexposed photoresist is applied to the surface of the wafer immediately above the alignment marks but within the boundaries of the shot site. The wafer is processed in the areas outside of the protective coating of photoresist including the shot site containing alignment marks. The area under the protective coating is not processed. This maintains a clear and concise view of the alignment marks. The area beyond the protective coating is processed along with the other shot sites.

Abstract: A method that teaches the formation of deep trenches within the surface of a semiconductor wafer, these deep trenches are used to separate the wafer into individual chips by applying stress to the wafer. The formation of the deep trenches uses exposing a thick layer of photoresist followed by etching. The etching is a two step etch, a stabilization etch and a main etch. The stress used to separate the wafer into individual chips can be invoked by applying physical force to the wafer.

Abstract: In this invention a coating of unexposed photoresist is used to protect from semiconductor processing the area immediately above a zero layer alignment mark used for a wafer stepper alignment. The entire surface of a wafer is coated with photoresist and all shot sites on the surface of a wafer including those containing the zero layer alignment marks are exposed with circuit patterns. Before the exposed areas of photoresist are removed, a protective coating of unexposed photoresist is applied to the surface of the wafer immediately above the alignment marks but within the boundaries of the shot site. The wafer is processed in the areas outside of the protective coating of photoresist including the shot site containing alignment marks. The area under the protective coating is not processed. This maintains a clear and concise view of the alignment marks. The area beyond the protective coating is processed along with the other shot sites.

Abstract: A CPU plug-and-play method includes driving the I/O chip of a computer to generate two reset signals when the computer is booted to respectively reset the ISA and PCI buses of the computer main board, at the same time issuing a CPU control signal to a system logic chip of the computer to gain control of the CPU working frequency setting operation, and transmitting a selected working frequency set by the user via system firmware to a multiple frequency factor control circuit through a universal bus. The multiple frequency control circuit generates and transmits a multiple frequency factor to the CPU by applying a reset signal to the system chip set in response to the multiple frequency factor to generate a CPU reset signal which instructs the CPU to adapt the working speed in accordance with the new multiple frequency factor so that no jumper or other switch is needed to be manipulated in changing working frequency. Thus a plug-and-play method for CPU is provided.

Abstract: A method and device of plugging and immediately playing a CPU. The user sets the settings of working frequency and voltage of the CPU through the system firmware of a computer. Then, the system stores the settings in a storage device, and the CPU is reset by a reset unit, thereby the multiple frequency controller and voltage converter take control of the operation to instruct the CPU to determine the working speed by a new multiple frequency ratio and to change the voltage into a working voltage corresponding to the model and brand of the CPU without the use of jumpers or switches. The goal of plugging and immediately playing of a CPU is achieved.