Patents by Inventor Cheng-An Wang

Cheng-An Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961484
    Abstract: The application discloses a correction method, correction device and correction system for free full-screen splicing. According to the application, influence of reasons such as an external light source and a camera angle is eliminated based on curved surface simulation over color information data of multiple pixels, so that free full splicing may be implemented when a spliced display screen, after being used, is disassembled and transferred to another site for re-splicing.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: April 16, 2024
    Assignee: XI'AN NOVASTAR TECH CO., LTD.
    Inventors: Cheng Yang, Yonghong Ai, Yu Wang
  • Patent number: 11961913
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a source/drain feature on a semiconductor fin structure, a first isolation structure surrounding the semiconductor fin structure, source/drain spacers on the first isolation structure and surrounding a lower portion of the source/drain feature, a dielectric fin structure adjoining and in direct contact with the first isolation structure and one of the source/drain spacers, and an interlayer dielectric layer over the source/drain spacers and the dielectric fin structure and surrounding an upper portion of the source/drain feature.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Cheng Chiang, Shi-Ning Ju, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11961777
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Chen, Chien-Hsun Lee, Chung-Shi Liu, Hao-Cheng Hou, Hung-Jui Kuo, Jung-Wei Cheng, Tsung-Ding Wang, Yu-Hsiang Hu, Sih-Hao Liao
  • Patent number: 11962949
    Abstract: A method of performing air pollution estimation is provided. The method is to be implemented using a processor of a computer device and includes: generating a spectral image based on an original color image of an environment under test using a spectral transformation matrix; supplying the spectral image as an input into an estimating model for air pollution estimation; and obtaining an estimation result from the estimating model indicating a degree of air pollution of the environment under test.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: April 16, 2024
    Assignee: National Chung Cheng University
    Inventors: Hsiang-Chen Wang, Chia-Cheng Huang, Ting-Chun Men
  • Patent number: 11961763
    Abstract: Devices and methods that a first gate structure wrapping around a channel layer disposed over the substrate, a second gate structure wrapping around another channel layer disposed over the substrate and a dielectric fin structure formed over a shallow trench isolation (STI) feature and between the first and second gate structures. At least one metallization layer is formed on the first gate structure, the dielectric fin structure, and the second gate structure and contiguously extends from the first gate structure to the second gate structure.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jia-Chuan You, Kuan-Ting Pan, Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang
  • Patent number: 11961900
    Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes device fins formed on a substrate; fill fins formed on the substrate and disposed among the device fins; and gate stacks formed on the device fins and the fill fins. The fill fins include a first dielectric material layer and a second dielectric material layer deposited on the first dielectric material layer. The first and second dielectric material layers are different from each other in composition.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Cheng Chiang, Teng-Chun Tsai, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11963464
    Abstract: A memristor may include an exchange-coupled composite (ECC) portion to provide three or more nonvolatile magneto-resistive states. The ECC portion may include a continuous layer and a granular layer magnetically exchange coupled to the continuous layer. A plurality of memristors may be used in a system to, for example, define a neural network.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: April 16, 2024
    Assignee: Seagate Technology LLC
    Inventors: Cheng Wang, Pin-Wei Huang, Ganping Ju, Kuo-Hsing Hwang
  • Patent number: 11961915
    Abstract: A semiconductor transistor device includes a channel structure, a gate structure, a first source/drain epitaxial structure, a second source/drain epitaxial structure, a gate contact, and a back-side source/drain contact. The gate structure wraps around the channel structure. The first source/drain epitaxial structure and the second source/drain epitaxial structure are disposed on opposite endings of the channel structure. The gate contact is disposed on the gate structure. The back-side source/drain contact is disposed under the first source/drain epitaxial structure. The first source/drain epitaxial structure has a concave bottom surface contacting the back-side source/drain contact.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shi Ning Ju, Chih-Hao Wang, Kuo-Cheng Chiang, Kuan-Lun Cheng, Wen-Ting Lan
  • Patent number: 11961840
    Abstract: A semiconductor device structure is provided. The device includes one or more first semiconductor layers, each first semiconductor layer of the one or more first semiconductor layers is surrounded by a first intermixed layer, wherein the first intermixed layer comprises a first material and a second material.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11959970
    Abstract: One or more embodiments of the present specification provide a method and device for capacity degradation prediction of a lithium-ion battery. The method comprises the following steps: acquiring an original battery discharge capacity; decomposing the original battery discharge capacity through a predetermined mode decomposition method to obtain battery discharge capacities composed of a plurality of different frequency signals; inputting the respective frequency signals into a pre-constructed capacity prediction model to obtain capacity prediction results corresponding to the respective frequency signals; selecting capacity prediction result that satisfies a predetermined relevance condition corresponding to the respective frequency signals; and reconstructing the finally predicted battery discharge capacity according to the capacity prediction result that satisfies the predetermined relevance condition.
    Type: Grant
    Filed: April 13, 2023
    Date of Patent: April 16, 2024
    Assignee: Beijing Institute of Technology
    Inventors: Huixing Meng, Mengyao Geng, Cheng Wang, Jinduo Xing
  • Patent number: 11962847
    Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
    Type: Grant
    Filed: November 9, 2022
    Date of Patent: April 16, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chia-Hao Chang, You-Tsai Jeng, Kai-Wen Yeh, Yi-Cheng Chen, Te-Chuan Wang, Kai-Wen Cheng, Chin-Lung Lin, Tai-Lai Tung, Ko-Yin Lai
  • Patent number: 11962296
    Abstract: Disclosed herein is a flexible sensing interface, comprising: a sensor, comprising: a core; an inner electrode in the form of a conductive material in contact with the core; an inner dielectric material substantially encasing the inner electrode; an outer electrode in the form of a conductive material in contact with the inner dielectric material and in electrical communication with the inner electrode; and an outer dielectric material substantially encasing the outer electrode; wherein the inner dielectric material and the outer dielectric material comprise an elastic material. Also disclosed herein are systems and methods for making and using the same.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: April 16, 2024
    Assignee: Georgia Tech Research Corporation
    Inventors: Seyedeh Fereshteh Shahmiri, Chaoyu Chen, Gregory D. Abowd, Shivan Mittal, Thad Eugene Starner, Yi-Cheng Wang, Zhong Lin Wang, Dingtian Zhang, Steven L. Zhang, Anandghan Waghmare
  • Patent number: 11961892
    Abstract: A semiconductor device and methods of forming the same are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions, a channel between the first and second S/D regions, a gate engaging the channel, and a contact feature connecting to the first S/D region. The contact feature includes first and second contact layers. The first contact layer has a conformal cross-sectional profile and is in contact with the first S/D region on at least two sides thereof. In embodiments, the first contact layer is in direct contact with three or four sides of the first S/D region so as to increase the contact area. The first contact layer includes one of a semiconductor-metal alloy, an III-V semiconductor, and germanium.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Carlos H. Diaz, Chung-Cheng Wu, Chia-Hao Chang, Chih-Hao Wang, Jean-Pierre Colinge, Chun-Hsiung Lin, Wai-Yi Lien, Ying-Keung Leung
  • Publication number: 20240121940
    Abstract: A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate, a word line, a first capacitor, a second capacitor, a first bit line and a second bit line. The word line is disposed on the substrate and extends along a first direction. The first capacitor extends along a second direction different from the first direction and is located at a first level. The second capacitor extends along the second direction and is located at a second level different from the first level. The first bit line is electrically connected to the first capacitor and the word line. The second bit line is electrically connected to the second capacitor and the word line.
    Type: Application
    Filed: July 13, 2023
    Publication date: April 11, 2024
    Inventors: SHIH-FAN KUAN, HSU-CHENG FAN, JIANN-JONG WANG, CHUNG-HSIN LIN, YU-TING LIN
  • Publication number: 20240116655
    Abstract: Disclosed are a system and a method for capturing a space target. The system includes a plurality of capturing devices, a delivery device, a launching device, and a deceleration and recovery device, each of the plurality of capturing devices is configured to be launched into a target orbit to capture a defunct space target, the delivery device is configured to deliver, along a preset delivery trajectory, each of the plurality of capturing devices to a first preset location in the launching device, the launching device is configured to launch each of the plurality of capturing devices located at the first preset location into the target orbit to capture the defunct space target, and the deceleration and recovery device is configured to decelerate each of the plurality of capturing devices after it is launched and flies a preset distance.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 11, 2024
    Applicant: Harbin Institute of Technology
    Inventors: Jinsheng GUO, Fan WU, Shi QIU, Jian CHEN, Cheng WEI, Hongxu WANG
  • Publication number: 20240118352
    Abstract: A method for determining a road type includes measuring, for a preset period, a magnetic field of an environment in which an electronic device is located to obtain a plurality of magnetic field values, calculating an absolute value of a difference between every two adjacent magnetic field values among the magnetic field values sorted in chronological order, calculating an average of the absolute values related to the magnetic field values to serve as a variation value for the environment, determining whether the variation value is smaller than a predetermined threshold value, determining that the environment is a surface road when the determination result is affirmative, and determining that the environment is a non-surface road when the determination result is negative.
    Type: Application
    Filed: November 23, 2022
    Publication date: April 11, 2024
    Inventors: Chia-Cheng WANG, Jyh-Cheng CHEN, Yu-Xin XIAO
  • Publication number: 20240116739
    Abstract: A drive system for an industrial handling vehicle comprises an electric motor, a first pump, for example, a plunger pump, and a second pump, for example, a gear pump. The first pump is configured to provide hydraulic power for a travelling device of the industrial handling vehicle. The first pump and the travelling device are in a first hydraulic circuit. The second pump is configured to provide hydraulic power for a brake device and/or a steering device and/or a handling device of the industrial handling vehicle. The second pump, the brake device, the steering device, and the handling device are in a second hydraulic circuit isolated from the first hydraulic circuit. The electric motor is operatively coupled to both the first pump and the second pump, to drive them to operate.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 11, 2024
    Applicant: Hyster-Yale Maximal Forklift (Zhejiang) Co., Ltd.
    Inventors: Binshen Gu, Timothy Brian Cherry, Yuanfu Shi, Xiangxian Song, Xiaopeng Wang, Cheng Cao, Yuan Xu
  • Publication number: 20240120971
    Abstract: This application provides an information transmission method and apparatus. The method includes: receiving first indication information from a network device, where the first indication information indicates an association relationship between a plurality of branch networks in an artificial intelligence AI network and channel state information CSI measurement configuration information; and obtaining first quantization information based on a first branch network and channel information, where the first branch network is associated with current CSI measurement configuration information, and the first branch network belongs to the plurality of branch networks in the AI network.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 11, 2024
    Inventors: Cheng Qin, Sihai Wang, Rui Yang, Xueru Li
  • Publication number: 20240119346
    Abstract: There is provided a computer implemented method, system and device for automatically generating a machine learning model for forecasting a likelihood of compromise in one or more transaction devices and subsequently triggering performing an action on one or more related computing devices based on a potentially compromised transaction device.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Inventors: CHENG CHANG, HIMANSHU RAI, YIFAN WANG, MOHSEN RAZA, GABRIEL KABO TSANG, MAKSIMS VOLKOVS
  • Publication number: 20240120847
    Abstract: A voltage regulator having a multiple of main stages and at least one accelerated voltage regulator (AVR) bridge is provided. The main stages may respond to low frequency current transients and provide DC output voltage regulation. The AVR bridges are switched much faster than the main stages and respond to high frequency current transients without regulating the DC output voltage. The AVR bridge frequency response range can overlap with the main stage frequency response range, and the lowest frequency to which the AVR bridges respond may be set lower than the highest frequency to which the main stages respond.
    Type: Application
    Filed: October 6, 2022
    Publication date: April 11, 2024
    Inventors: Shuai Jiang, Xin Li, Woon-Seong Kwon, Cheng Chung Yang, Qiong Wang, Nam Hoon Kim, Mikhail Popovich, Houle Gan, Chenhao Nan