Patents by Inventor Cheng-Chung Chien

Cheng-Chung Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11597053
    Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hao Huang, Hsuan-Pang Liu, Yuan-Chun Sie, Pinyen Lin, Cheng-Chung Chien
  • Patent number: 10978329
    Abstract: A method for wafer pod handling includes at least the following steps. A wafer pod is moved into a load chamber by conveying the wafer pod to the load chamber via one side of a track and removing a cover of the load chamber via an opposing side of the track. The wafer pod that is inside the load chamber is coupled to a port of a platform that is linked to the load chamber. A wafer to be processed is moved from the wafer pod and out of the load chamber to the platform for performing a semiconductor process. Other methods for wafer pod handling are also provided.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: April 13, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
  • Publication number: 20200098613
    Abstract: A method for wafer pod handling includes at least the following steps. A wafer pod is moved into a load chamber by conveying the wafer pod to the load chamber via one side of a track and removing a cover of the load chamber via an opposing side of the track. The wafer pod that is inside the load chamber is coupled to a port of a platform that is linked to the load chamber. A wafer to be processed is moved from the wafer pod and out of the load chamber to the platform for performing a semiconductor process. Other methods for wafer pod handling are also provided.
    Type: Application
    Filed: November 7, 2019
    Publication date: March 26, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
  • Patent number: 10510572
    Abstract: A semiconductor processing station including a platform, a load port, and a carrier transport track is provided. The platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover, and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. The carrier transport track has a bottom side configured to open the load chamber.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
  • Publication number: 20190311930
    Abstract: A semiconductor processing station including a platform, a load port, and a carrier transport track is provided. The platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover, and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. The carrier transport track has a bottom side configured to open the load chamber.
    Type: Application
    Filed: June 24, 2019
    Publication date: October 10, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
  • Patent number: 10332769
    Abstract: A semiconductor processing station comprises a platform and a load port, wherein the platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and is configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. A semiconductor process and a method of operating a semiconductor processing station are also provided.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: June 25, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
  • Publication number: 20190099856
    Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 4, 2019
    Inventors: Chi-Hao HUANG, Hsuan-Pang LIU, Yuan-Chun SIE, Pinyen LIN, Cheng-Chung CHIEN
  • Patent number: 10189143
    Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: January 29, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Chi-Hao Huang, Hsuan-Pang Liu, Yuan-Chun Sie, Pinyen Lin, Cheng-Chung Chien
  • Publication number: 20170207109
    Abstract: A semiconductor processing station comprises a platform and a load port, wherein the platform includes an intake/outtake port and a plurality of processing modules. The load port includes a load chamber, a movable cover and a carrier transfer module. The load chamber communicates with the intake/outtake port and has a load opening at its top end for receiving a transport carrier within the load chamber. The movable cover is disposed at the load opening and is configured to seal the load opening. The carrier transfer module is configured to transfer the transport carrier to the intake/outtake port. A semiconductor process and a method of operating a semiconductor processing station are also provided.
    Type: Application
    Filed: January 15, 2016
    Publication date: July 20, 2017
    Inventors: You-Hua Chou, Chih-Wei Huang, Kuo-Sheng Chuang, Cheng-Chung Chien
  • Publication number: 20170151648
    Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.
    Type: Application
    Filed: May 18, 2016
    Publication date: June 1, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hao HUANG, Hsuan-Pang LIU, Yuan-Chun SIE, Pinyen LIN, Cheng-Chung CHIEN
  • Patent number: 7409258
    Abstract: Disclosed is a method and a system for measuring customer delivery service. A projected customer delivery date is generated. At least one projected output volume is determined based on the projected customer delivery date. At least one actual output volume is determined, and an accuracy of the projected customer delivery date is determined based on the at least one projected output volume and the at least one actual output volume.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: August 5, 2008
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Heng Huang, Kuo-Lien Chen, Chin-Hui Hung, Andy Hong, Cheng Meng, Cheng-Chung Chien
  • Publication number: 20070255606
    Abstract: Disclosed is a method and a system for measuring customer delivery service. A projected customer delivery date is generated. At least one projected output volume is determined based on the projected customer delivery date. At least one actual output volume is determined, and an accuracy of the projected customer delivery date is determined based on the at least one projected output volume and the at least one actual output volume.
    Type: Application
    Filed: March 6, 2007
    Publication date: November 1, 2007
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Heng Huang, Kuo-Lien Chen, Chin-Hui Hung, Andy Hong, Cheng Meng, Cheng-Chung Chien