Patents by Inventor Cheng Fan

Cheng Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12275751
    Abstract: Organometallic complexes are described which are useful as pre-polymerization catalysts which may form part of olefin polymerization catalyst systems. The catalyst systems find use in the polymerization of ethylene, optionally with one or more C3-12 alpha-olefin comonomers. The organometallic complexes are broadly represented by formula I: wherein L is a bridging group containing a contiguous chain of atoms connecting P with Cy, wherein the contiguous chain contains 2 or 3 atoms and wherein Cy is a cyclopentadienyl-type ligand. The olefin polymerization catalyst system is effective at polymerizing ethylene with alpha-olefins in a solution phase polymerization process at high temperatures and produces ethylene copolymers with high molecular weight and high degrees of alpha-olefin incorporation. Pre-metallation compounds, metallation processes and synthetic methods to make the organometallic complexes as well as polymerization processes are also described.
    Type: Grant
    Filed: April 19, 2024
    Date of Patent: April 15, 2025
    Assignee: NOVA CHEMICALS (INTERNATIONAL) S.A.
    Inventors: Cheng Fan, Charles Carter, Darryl Morrison, Xiaoliang Gao, James T. Goettel, Daisy Cruz-Milette, Frederick Chiu
  • Patent number: 12274088
    Abstract: A semiconductor structure includes a substrate, an isolation layer, a dielectric layer, an insulation layer, a conductor and a capping layer. The substrate has a concave portion. The isolation layer is located on a top surface of the substrate. The dielectric layer is located on the isolation layer. The insulation layer is located on a surface of the concave portion and extends to a sidewall of the isolation layer. The conductor is located on the insulation layer in the concave portion. The conductor has a first top surface and a second top surface, and the first top surface is closer to the dielectric layer than the second top surface. The capping layer is located in the concave portion and covers the conductor.
    Type: Grant
    Filed: March 19, 2024
    Date of Patent: April 8, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chih-Wei Huang, Hsu-Cheng Fan, En-Jui Li
  • Publication number: 20250097329
    Abstract: A method of configuring a signal transducer of a foldable UE includes: providing a first panel comprising a first conductor configured to provide a first portion of the signal transducer; providing a second panel comprising a second conductor configured to provide a second portion of the signal transducer; providing a hinge connected to the first panel and the second panel and configured to allow the first panel to rotate relative to the second panel about a pivot axis of the hinge, the hinge comprising a third conductor configured to provide a third portion of the signal transducer, the third conductor electrically coupling the first conductor to the second conductor; providing a fourth conductor that is physically separate from the first conductor, the second conductor, and the third conductor; and selectively causing the fourth conductor to provide a fourth portion of the signal transducer.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 20, 2025
    Inventors: Yi-Hsiang KUNG, Cheng-Fan WEI, Chao-Kuei CHANG
  • Publication number: 20250056097
    Abstract: The present disclosure relates to a system and a method for stream distribution. The method includes: determining a viewer to be a helper viewer with respect to a content type; determining a distributor to have engaged in the content type in a stream; and suggesting the distributor to invite the viewer into the stream.
    Type: Application
    Filed: July 6, 2024
    Publication date: February 13, 2025
    Inventors: Wei-Kun LU, Yu-Cheng FAN, Chia-Han CHANG, Hung-Kuang TAI
  • Patent number: 12224734
    Abstract: A surface acoustic wave device includes a piezoelectric substrate, a supportive layer, a cover layer and a pillar bump. The supportive layer is disposed on the piezoelectric substrate and around a transducer, the cover layer covers the supportive layer, and the pillar bump is located in a lower via hole of the supportive layer and an upper via hole of the cover layer. The upper via hole has a lateral opening located on a lateral surface of the cover layer, and the pillar bump in the cover layer protrudes from the lateral surface of the cover layer via the lateral opening.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: February 11, 2025
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Cheng-Hung Shih, Cheng-Fan Lin
  • Publication number: 20250047919
    Abstract: A method for facilitating streamer interaction with a viewer includes extracting a history topic based on an activity record of the viewer; calculating a score of each of the history topics based on at least one parameter; and generating a topic suggestion based on the history topic and the score which is corresponding to the history topic, and providing the topic suggestion to the streamer. The method is suitable for providing a topic suggestion (or interact topic suggestion) with respect to the viewer to the streamer via a live-streaming platform executed by a computing device. Thereby, the method can be used for facilitating streamer interaction with viewers and provides an appropriate topic suggestion. In addition, a computing device and a computer-readable storage medium which are capable of implementing the method are also provided.
    Type: Application
    Filed: January 24, 2024
    Publication date: February 6, 2025
    Inventors: YUNG-CHI HSU, CHI-WEI LIN, SHAO-TANG CHIEN, WEI-HSIANG HUNG, WEI-KUN LU, YU-CHENG FAN, CHIA-HAN CHANG, HUNG-KUANG TAI
  • Patent number: 12211967
    Abstract: A light-emitting display device includes at least a transparent substrate, a first patterned conductive layer and a second patterned conductive layer respectively disposed on top of the opposite first and second surfaces of the transparent substrate, and a plurality of inorganic electroluminescent objects disposed in form of an array on top of the first surface of the transparent substrate with the inorganic electroluminescent objects being spaced from one another in a distance of at least 2 mm. Each of the inorganic electroluminescent objects has one power pin and light signal pins for red light, green light, and blue light. The transparent substrate has a plurality of through holes between the first surface and the second surface. The first patterned conductive layer has a plurality of soldering pad regions respectively in connection with the power pin and the light signal pins.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: January 28, 2025
    Inventor: Wen-Cheng Fan
  • Publication number: 20250016996
    Abstract: A memory device includes a semiconductor substrate having an active region, and a word line extending across the active region. The memory device also includes a first source/drain region and a second source/drain region disposed in the active region and on opposite sides of the word line. The memory device further includes a bit line contact disposed over and electrically connected to the first source/drain region. The bit line contact has a tapered profile. In addition, the memory device includes a capacitor contact disposed over and electrically connected to the second source/drain region.
    Type: Application
    Filed: October 23, 2023
    Publication date: January 9, 2025
    Inventors: CHIH-WEI HUANG, HSU-CHENG FAN, CHIH-YU YEN
  • Publication number: 20250016995
    Abstract: A memory device includes a semiconductor substrate having an active region, and a word line extending across the active region. The memory device also includes a first source/drain region and a second source/drain region disposed in the active region and on opposite sides of the word line. The memory device further includes a bit line contact disposed over and electrically connected to the first source/drain region. The bit line contact has a tapered profile. In addition, the memory device includes a capacitor contact disposed over and electrically connected to the second source/drain region.
    Type: Application
    Filed: July 7, 2023
    Publication date: January 9, 2025
    Inventors: CHIH-WEI HUANG, HSU-CHENG FAN, CHIH-YU YEN
  • Publication number: 20250008725
    Abstract: A semiconductor device includes a substrate, a bit line structure formed over and protruding from the substrate, a spacer structure formed on and extending along sidewall of the bit line structure, and a landing pad disposed on the bit line structure and covering the slope. The spacer structure includes a first segment near a top of the spacer structure with a slope and a second segment beneath the first segment. A first segment consists of a first spacer layer contacting the bit line structure and a third spacer layer contacting the first spacer layer. A second segment consists of the first spacer layer contacting the bit line structure, a second spacer layer contacting the first spacer layer, and the third spacer layer contacting the second spacer layer, and the second segment is capped with the first segment.
    Type: Application
    Filed: September 11, 2024
    Publication date: January 2, 2025
    Inventors: Chih-Wei HUANG, Hsu-Cheng FAN, En-Jui LI, Chih-Yu YEN
  • Publication number: 20250006767
    Abstract: The present application discloses an optical semiconductor device. The optical semiconductor device includes a logic die including a core circuit area and a logic peripheral circuit area; a memory die positioned on the logic die and including a memory cell area and a memory peripheral area, and a first inter-die via positioned in the memory peripheral area and electrically connected to the logic peripheral circuit area; and a sensor die positioned on the memory die and including a sensor pixel area and a sensor peripheral area, a first intra-die via positioned in the sensor peripheral area and electrically coupled to the logic peripheral circuit area through the first inter-die via, and a second intra-die via positioned in the sensor peripheral area. A height of the first intra-die via is greater than a height of the second intra-die via.
    Type: Application
    Filed: September 11, 2024
    Publication date: January 2, 2025
    Inventor: PEI CHENG FAN
  • Publication number: 20240429592
    Abstract: Aspects described herein include millimeter wave integrated hinges. In one aspect, wireless communication apparatus includes a bracket, a first pivot structure attached to the bracket configured to pivot the bracket around a first line, and a second pivot structure attached to the bracket and configured to pivot the bracket around a second line, wherein the second line is parallel to the first line. A millimeter wave antenna array is mounted to the bracket such that the mmW antenna array is positioned between the first line and the second line.
    Type: Application
    Filed: June 23, 2023
    Publication date: December 26, 2024
    Inventors: Cheng-Fan WEI, Chao-Kuei CHANG, Yi-Hsiang KUNG
  • Publication number: 20240415378
    Abstract: An endoscope imaging system, and a control method for a light source of an endoscope imaging system, are disclosed. After a function key is triggered, the image processing unit controls the light source unit to perform a first function, and controls the endoscope imaging system to perform a second function which corresponds to the function key. Alternatively, the image processing unit controls the light source unit to perform a first function, after the function key is triggered; and controls the endoscope imaging system to perform a second function which corresponds to the function key, after the function key is re-triggered. This disclosure provides another completely different way to control the light source unit to perform the first function, so as to achieve functional linkage of various units in the endoscope imaging system, simplify operation steps, and improve surgical efficiency.
    Type: Application
    Filed: June 17, 2024
    Publication date: December 19, 2024
    Inventors: Pengfei ZUO, Cheng FAN, Ruiling PAN, Chenghua HUANG
  • Publication number: 20240411113
    Abstract: An optical-lens-set includes a first lens element of a concave image-side surface near its optical-axis, a sixth lens element of negative refractive power and of a concave image-side surface near its optical-axis to go with a fifth lens element of a concave object-side surface near its optical-axis or with a seventh lens element of negative refractive power. The Abbe number v1 of the first lens element, the Abbe number v3 of the third lens element, the Abbe number v4 of the fourth lens element, the Abbe number v5 of the fifth lens element, the Abbe number v6 of the sixth lens element and the Abbe number v7 of the seventh lens element together satisfy 5?5v1?(v3+v4+v5+v6+v7).
    Type: Application
    Filed: June 13, 2024
    Publication date: December 12, 2024
    Applicant: Genius Electronic Optical (Xiamen) Co., Ltd.
    Inventors: Ta-Cheng Fan, Zhenfeng Xie, Yanxuan Yin
  • Publication number: 20240413007
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a drain positioned in the substrate; a top dielectric layer positioned on the substrate; a cell contact structure including a cell contact bottom conductive layer positioned in the top dielectric layer and on the drain, a cell contact top conductive layer positioned in the top dielectric layer and on the cell contact bottom conductive layer, and a cell contact top sealing layer positioned in the top dielectric layer, on the cell contact bottom conductive layer, and surrounding the cell contact top conductive layer; and a first air gap positioned in the top dielectric layer and surrounding the cell contact bottom conductive layer.
    Type: Application
    Filed: June 9, 2023
    Publication date: December 12, 2024
    Inventors: CHIH-WEI HUANG, HSU-CHENG FAN, CHIH-YU YEN
  • Publication number: 20240413008
    Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a drain positioned in the substrate; a top dielectric layer positioned on the substrate; a cell contact structure including a cell contact bottom conductive layer positioned in the top dielectric layer and on the drain, a cell contact top conductive layer positioned in the top dielectric layer and on the cell contact bottom conductive layer, and a cell contact top sealing layer positioned in the top dielectric layer, on the cell contact bottom conductive layer, and surrounding the cell contact top conductive layer; and a first air gap positioned in the top dielectric layer and surrounding the cell contact bottom conductive layer.
    Type: Application
    Filed: October 20, 2023
    Publication date: December 12, 2024
    Inventors: CHIH-WEI HUANG, HSU-CHENG FAN, CHIH-YU YEN
  • Patent number: 12153069
    Abstract: The present invention provides a battery probing module, for testing a battery defined with a contact surface having a first electrode area and a second electrode area with different polarities. The battery probing module comprises a frame and a plurality of probe units. The frame has a top plate and a bottom plate opposite to the top plate. Each of the plurality of probe units comprises a base, a first probe, and a plurality of second probes. The base is defined with a top surface and a bottom surface deflectably fixed to the top surface by a fixing unit. The first probe and the plurality of second probes protrude from the bottom surface for contacting the first electrode area and the second electrode area respectively. Wherein the first probe is within a periphery surrounded by the plurality of second probes in a vertical direction of the bottom surface.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: November 26, 2024
    Assignee: Chroma ATE Inc.
    Inventors: Shih-Ching Tan, Chun-Nan Ou, Tzu-Fu Chen, Chen-Chou Wen, Chiang-Cheng Fan
  • Patent number: 12146012
    Abstract: A phosphinimide catalyst system comprises: i) a phosphinimide pre-polymerization catalyst having two phosphinimide ligands, at least one of which is substituted by a phosphinimide moiety; and ii) a catalyst activator. The catalyst system polymerizes ethylene with an alpha-olefin to give high molecular weight ethylene copolymer.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: November 19, 2024
    Assignee: NOVA Chemicals (International) S.A.
    Inventor: Cheng Fan
  • Patent number: 12145958
    Abstract: A phosphinimide catalyst system comprises: i) a phosphinimide pre-polymerization catalyst having a cyclopentadienyl ligand and a phosphinimide ligand which is substituted with a guanidinate type group; and ii) a catalyst activator. The catalyst system polymerizes ethylene with an alpha-olefin to give high molecular weight ethylene copolymer.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: November 19, 2024
    Assignee: NOVA Chemicals (International) S.A.
    Inventor: Cheng Fan
  • Publication number: 20240363670
    Abstract: Disclosed is a method for manufacturing an image sensor module. The method comprises the steps of: disposing a glass cover on a substrate; sawing the glass cover into a plurality of glass units; forming an individual solidified interface filler between the adjacent glass units; sawing along the centerline of each solidified interface filler to form a plurality of independent electronic semi-finished products for complementary metal oxide semiconductor image sensor (CMOS Image Sensor, CIS) packaging; and performing an image sensor molded ball grid array (ImBGA) process to obtain the image sensor module.
    Type: Application
    Filed: May 31, 2023
    Publication date: October 31, 2024
    Inventors: Chang Cheng Fan, Chang Meng Chih, Tsai Cheng Feng