Abstract: A system for radio frequency (RF) residual sideband (RSB) calibration includes a complex (in phase/quadrature (I/Q)) signal receiver, a signal generator configured to generate a transmit (Tx) signal, a first phase shifter operably coupled to the real signal transmitter, a first signal combiner configured to combine a receive (Rx) signal with the transmit (Tx) signal to generate a first combined signal, a second phase shifter configured to provide a selected phase shift to the first combined signal, and a complex downconverter configured to generate an in phase Rx signal and a quadrature Rx signal alternatively using an in phase LO signal and a quadrature LO signal to generate one or more signals indicative of relative Tx-Rx LO phase (?), amplitude (A), Tx LO I/Q phase mismatch (?), Rx I/Q amplitude mismatch (?), and Rx I/Q phase mismatch (?) at the output of the complex receiver.

Abstract: Apparatus and methods for handling semiconductor part carriers are disclosed. In one example, an apparatus for handling semiconductor part carriers is disclosed. The apparatus includes a mechanical arm and an imaging system coupled to the mechanical arm. The mechanical arm is configured for holding a semiconductor part carrier. The imaging system is configured for automatically locating a goal position on a surface onto which the semiconductor part carrier is to be placed.

Abstract: A method includes forming a protruding fin, and forming a first dielectric layer including a first dielectric layer and a second dielectric layer over the first dielectric layer. The first dielectric layer includes a first top portion on a top surface of the protruding fin, and a sidewall portion on a sidewall of the protruding fin. The second dielectric layer is over the first top portion and the top surface of the protruding fin, and is formed using an anisotropic deposition process. The method further includes forming a dummy gate electrode on the second dielectric layer, forming a gate spacer on a sidewall of the dummy gate electrode, removing the dummy gate electrode, and forming a replacement gate electrode in a space left by the dummy gate electrode.

Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.

Abstract: A laptop computer including a system host, a modular platform, a rail structure, and at least one tool is provided. The rail structure is disposed at the system host and the modular platform, and the modular platform slides relative to the system host via the rail structure to be assembled to or detached from the system host. The tool is plugged into or out of the system host, and the tool is located on a sliding path of the modular platform when the tool is assembled to the system host.

Abstract: A minimum IC operating voltage searching method includes acquiring a corner type of an IC, acquiring ring oscillator data of the IC, generating a first prediction voltage according to the corner type and the ring oscillator data by using a training model, generating a second prediction voltage according to the ring oscillator data by using a non-linear regression approach under an N-ordered polynomial, and generating a predicted minimum IC operating voltage according to the first prediction voltage and the second prediction voltage. N is a positive integer.

Abstract: A computing system includes a BIOS, a BMC coupled to the BIOS, and one or more hardware components. The BMC can receive commands from a user, and transition between a locked state and an unlocked state. When the BMC is in the unlocked state, the BMC responds to commands received from the user. When the BMC is in the locked state, the BMC ignores commands received from the user. The BMC is configured to receive an unlock command from a user that includes an unlock signature. The BMC is further configured to determine whether the unlock signature is authentic. If the unlock signature is authentic and the BMC is in the locked state, the BMC is configured to transition from the locked state to the unlocked state, to allow the user access to the hardware components of the computing system.

Abstract: A key structure includes a base, an elastic member disposed on the base, a scissors structure movably disposed on the base, and a keycap module having a carrier and a light source. The carrier is detachably assembled to the scissors structure and abuts the elastic member. The light source is disposed in the carrier. The light source is electrically connected to a bottom portion of the base through a flexible circuit member penetrating the carrier, passing the scissors structure, and penetrating the base. A top portion of the carrier has light transmittance, so that light of the light source can pass through the top portion to be projected from the key structure.

Abstract: A laptop computer includes a body, a bracket disposed in the body, a latching member movably disposed on the bracket, a first key module detachably assembled onto the bracket, and a second key module disposed on the bracket. A part of the first key module is located on a moving path of the latching member. The latching member is adapted to be driven by an external force to push the part of the first key module away from the bracket.

Abstract: Semiconductor devices and methods of manufacture are presented. In embodiments a method of manufacturing the semiconductor device includes forming a fin from a plurality of semiconductor materials, depositing a dummy gate over the fin, depositing a plurality of spacers adjacent to the dummy gate, removing the dummy gate to form an opening adjacent to the plurality of spacers, widening the opening adjacent to a top surface of the plurality of spacers, after the widening, removing one of the plurality of semiconductor materials to form nanowires, and depositing a gate electrode around the nanowires.

Abstract: A semiconductor device structure and methods of forming the same are described. The structure includes a first semiconductor layer disposed over a substrate, the first semiconductor layer has an edge portion and a center portion, and a height of the center portion is substantially greater than a height of the edge portion. The structure further includes a dielectric spacer disposed below and in contact with the edge portion of the first semiconductor layer, a gate dielectric layer surrounding the center portion of the first semiconductor layer, and a gate electrode layer disposed on the gate dielectric layer surrounding the center portion of the first semiconductor layer.

Abstract: The present disclosure generally relates to compounds class I HDAC inhibitors, their production and applications. The compounds possess epigenetic immunomodulatory activities in the tumor microenvironment (TME) and thus inhibit growth of tumor cells.

Abstract: A package structure and a method for forming the same are provided. The package structure includes a first package structure and a second package structure. The first package structure includes a first device formed over a first substrate. The first device includes a first conductive plug connected to a through substrate via (TSV) structure formed in the first substrate. A buffer layer surrounds the first substrate. A first bonding layer is formed over the first substrate and the buffer layer. The second package structure includes a second device formed over a second substrate. A second bonding layer is formed over the second device. A hybrid bonding structure is between the first package structure and the second package structure by bonding the first bonding layer to the second bonding layer.

Abstract: The present invention relates to a method for measuring muscle mass, including: a first selection step, wherein a frame selection information is obtained by using a frame to select a fascia region from a provided computed tomography image under the condition that the window width ranges from 300 HU to 500 HU and the window level ranges from 40 HU to 50 HU, wherein the selected range of the fascia region includes a muscle; and a second selection step, wherein a muscle information of the muscle is obtained by calculating a pixel value in the frame-selected fascia region under the condition that the HU value of the CT image ranges from ?29 HU to 150 HU.

Abstract: A display panel and a pixel circuit thereof are provided. A pulse width signal generator turns on a charge sharing switch during a light-emitting period, and performs charge sharing with a control end of a positive feedback switch of a positive feedback circuit, so as to control the positive feedback switch to provide a positive feedback voltage to the pulse width signal generator to increase a voltage at an output end of the pulse width signal generator and thus to accelerate a rising speed of a voltage for controlling a driving current generator to provide a driving current.

Abstract: Boot firmware for a computing device can be modularly and dynamically composed to facilitate implementing changes and updates to a computing device's firmware. The firmware image can include a primary module, which is responsible for certain basic initializations, and a module list, which can include a listing of additional modules that are to be executed during the boot procedure. The module list can be used to identify and access the selected modules from a module library, such as via globally unique identifiers (GUIDs). Once acquired, the selected modules can be executed, taking into account required dependency modules (whether included in the selected modules or not) and configuration settings. The module library can be stored entirely locally (e.g., as part of a distributed firmware image), entirely remotely (e.g., accessible via network connection), or a mixture of locally and remotely.

Abstract: A computing system includes a BIOS, a BMC coupled to the BIOS, and one or more hardware components. The BMC can receive commands from a user, and transition between a locked state and an unlocked state. When the BMC is in the unlocked state, the BMC responds to commands received from the user. When the BMC is in the locked state, the BMC ignores commands received from the user. The BMC is configured to receive an unlock command from a user that includes an unlock signature. The BMC is further configured to determine whether the unlock signature is authentic. If the unlock signature is authentic and the BMC is in the locked state, the BMC is configured to transition from the locked state to the unlocked state, to allow the user access to the hardware components of the computing system.

Abstract: Boot firmware for a computing device can be modularly and dynamically composed to facilitate implementing changes and updates to a computing device's firmware. The firmware image can include a primary module, which is responsible for certain basic initializations, and a module list, which can include a listing of additional modules that are to be executed during the boot procedure. The module list can be used to identify and access the selected modules from a module library, such as via globally unique identifiers (GUIDs). Once acquired, the selected modules can be executed, taking into account required dependency modules (whether included in the selected modules or not) and configuration settings. The module library can be stored entirely locally (e.g., as part of a distributed firmware image), entirely remotely (e.g., accessible via network connection), or a mixture of locally and remotely.

Abstract: Firmware can be built to be capable of generating and outputting trace data, during execution, to assist in debugging firmware problems without substantially slowing operation of the firmware and without potentially disclosing secret information associated with the firmware. The firmware (e.g., BIOS) can output hash digests of various modules within the firmware, which can be compared with a pre-established mapping table to identify modules that successfully completed or did not successfully complete during execution of the firmware, such as during a startup procedure. The hash digest can be a one-way hash, which can be rapidly executable during operation of the firmware and can keep the code of the modules hidden from unauthorized reverse engineering.

Abstract: A biological detecting chip comprising an optical fiber, at least one gas filter, an upper cap and a substrate is disclosed. The optical fiber has at least one detecting area disposed on an outer surface. The upper cap has at least two guiding channels passed through the upper cap, at least one discharge channel with two ends connecting to an upper portion of distinct guiding channels, an inlet and an outlet, wherein the gas filter is attached to an upside of the discharge channel to separate the discharge channel and an outside of the upper cap. The substrate has a test area and a plurality of directing channels, wherein the directing channel connects to the inlet and the guiding channel, connects to the guiding channel and the test area, and connects to the test area and the outlet.