Abstract: A method includes illuminating radiation to a resist layer over a substrate to pattern the resist layer. The patterned resist layer is developed by using a positive tone developer. The patterned resist layer is rinsed using a basic aqueous rinse solution. A pH value of the basic aqueous rinse solution is lower than a pH value of the developer, and a rinse temperature of rinsing the patterned resist layer is in a range of about 20° C. to about 40° C.

Abstract: A system and method for depositing a photoresist and utilizing the photoresist are provided. In an embodiment a deposition chamber is utilized along with a first precursor material comprising carbon-carbon double bonds and a second precursor material comprising repeating units to deposit the photoresist onto a substrate. The first precursor material is turned into a plasma in a remote plasma chamber prior to being introduced into the deposition chamber. The resulting photoresist comprises a carbon backbone with carbon-carbon double bonds.

Abstract: A high-electron mobility transistor includes a substrate, a gate electrode, a drain electrode, a source electrode and a first field plate. The substrate includes an active region. The gate electrode is disposed on the substrate. The drain electrode is disposed at one side of the gate electrode. The source electrode is disposed at another side of the gate electrode. The first field plate is electrically connected with the source electrode and extends from the source electrode toward the drain electrode. An overlapping area of the first field plate and the gate electrode is smaller than an overlapping area of the gate electrode and the active region.

Abstract: Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.

Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.

Abstract: A minimum IC operating voltage searching method includes acquiring a corner type of an IC, acquiring ring oscillator data of the IC, generating a first prediction voltage according to the corner type and the ring oscillator data by using a training model, generating a second prediction voltage according to the ring oscillator data by using a non-linear regression approach under an N-ordered polynomial, and generating a predicted minimum IC operating voltage according to the first prediction voltage and the second prediction voltage. N is a positive integer.

Abstract: Example embodiments described herein involve a system for testing a light-emitting module. The light-emitting module may include a mounting platform configured to hold a light-emitting module for a camera. The mounting platform may also be configured to rotate. The system may further include a housing holding a plurality of photodiodes arranged in an array over at least a 90 degree arc of a hemisphere. The system may also include a controller configured to control the photodiodes and the rotation of the mounting platform.

Abstract: A method includes illuminating radiation to a resist layer over a substrate to pattern the resist layer. The patterned resist layer is developed by using a positive tone developer. The patterned resist layer is rinsed using a basic aqueous rinse solution. A pH value of the basic aqueous rinse solution is lower than a pH value of the developer, and a rinse temperature of rinsing the patterned resist layer is in a range of about 20° C. to about 40° C.

Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate, where the patterned resist layer has a first line width roughness. In various embodiments, the patterned resist layer is coated with a treatment material, where a first portion of the treatment material bonds to surfaces of the patterned resist layer. In some embodiments, a second portion of the treatment material (e.g., not bonded to surfaces of the patterned resist layer) is removed, thereby providing a treated patterned resist layer, where the treated patterned resist layer has a second line width roughness less than the first line width roughness.

Abstract: A method of controlling a feedback control system of a semiconductor process chemical fluid in a storage tank includes performing a fluid quality measurement of fluid by a spectrum analyzer positioned adjacent to a dispensing port of the storage tank, and determining whether a variation in fluid quality measurement of the fluid is within an acceptable range. The method further includes in response to a variation in fluid quality measurement that is not within the acceptable range of variation in fluid quality measurement, automatically adjusting a configurable parameter of the semiconductor process chemical fluid in the storage tank to set the variation in fluid quality measurement of the fluid within the acceptable range.

Abstract: An intelligent defecation device for living creature includes a device body, a supporting portion, an image module, and a first analysis module. The supporting portion is formed within the inner side of the device body for accommodating a moisture absorption member so as to allow the living creature to leave over its excrement therein. The image module is also arranged at the device body for dynamically capturing the images of the excrement in the supporting portion and outputting the image. The first analysis module is arranged in the device body and connected with the image module to analyze and calculate the defecation mode with the image based on preset or accumulated data, so as to generate a signal when an abnormal defecation mode is diagnosed.

Abstract: A dispensing system includes a dispense material supply that contains a dispense material and a dispensing pump connected downstream from the dispense material supply. The dispensing pump includes a body made of a first electrically conductive material, one or more first electrical contacts that are disposed on the body of the dispensing pump, and one or more first connection wires that are coupled between each one of the one or more first electrical contacts and ground. The dispensing system also includes a dispensing nozzle connected downstream from the dispensing pump and includes a tube made of a second electrically conductive material, one or more second electrical contacts that are disposed on an outer surface of the tube, and one or more second connection wires that are coupled between each one of the one or more second electrical contacts and the ground.

Abstract: A power converter having a multi-slope compensation mechanism is provided. A multi-slope compensation circuit of the power converter includes a plurality of first capacitors, a comparator and a plurality of first resistors. A first terminal of each of the plurality of first capacitors and a node between a second terminal of a high-side switch and a first terminal of a low-side switch are connected to an inductor. A plurality of first input terminals of a comparator are respectively connected to second terminals of the plurality of first capacitors, and are respectively connected to first terminals of the plurality of first resistors. Second terminals of the plurality of first resistors are coupled to a second reference voltage. A second input terminal of the comparator is coupled to a first reference voltage. An output terminal of the comparator is connected to an input terminal of a driver circuit.

Abstract: A method includes forming a metallic resist layer over a substrate and patterning the metallic resist layer to form a metallic resist pattern over the substrate. An etch resistant layer composition including an inorganic component, an organic component, or a combination thereof is formed over the metallic resist pattern to form an etch resistant layer.

Abstract: A method of manufacturing a semiconductor device includes the following operations. A metal oxide photoresist layer is formed over a target layer. The metal oxide photoresist layer comprises a metal oxide core with organic ligands, a metal oxide framework with organic ligands, or a combination thereof. The metal oxide photoresist layer is exposed to an extreme ultraviolet radiation. The metal oxide photoresist layer is treated with a ligand leaving promoter. The metal oxide photoresist layer is developed to form a patterned photoresist. The target layer is etched by using the patterned photoresist as an etching mask.

Abstract: A device includes a first transistor, a second transistor, and a dielectric structure. The first transistor is over a substrate and has a first gate structure. The second transistor is over the substrate and has a second gate structure. The dielectric structure is between the first gate structure and the second gate structure. The dielectric structure has a width increasing from a bottom position of the dielectric structure to a first position higher than the bottom position of the dielectric structure. A width of the first gate structure is less than the width of the dielectric structure at the first position.

Abstract: A method of supplying a chemical solution to a photolithography system. The chemical solution is pumped from a variable-volume buffer tank. The pumped chemical solution is dispensed in a spin-coater. The variable-volume buffer tank is refilled by emptying a storage container filled with the chemical solution into the variable-volume buffer tank.

Abstract: Example embodiments described herein involve reducing the formation of ice on external modules by incorporating a heater within the module. The system may include a microphone module for an autonomous vehicle. The microphone module may include a housing and a microphone inside an opening of the housing. The system may further include a cover abutting the opening of the housing. The cover may enclose the microphone within the housing and seal the opening of the housing. The system may also include a heater adjacent to the opening of the housing and configured to prevent ice from forming over the opening. The heater may at least partially surround the opening.

Abstract: Example embodiments described herein involve a system for testing a light-emitting module. The light-emitting module may include a mounting platform configured to hold a light-emitting module for a camera. The mounting platform may also be configured to rotate. The system may further include a housing holding a plurality of photodiodes arranged in an array over at least a 90 degree arc of a hemisphere. The system may also include a controller configured to control the photodiodes and the rotation of the mounting platform.

Abstract: An image data association method, system, apparatus, and related computer program product are provided.