Abstract: A projection device includes a heat source module, a heat storage module, and a heat dissipation connecting element. The heat source module is configured to generate a light beam. The heat storage module includes a storage tank and a heat storage material, and the heat storage material is filled into the storage tank. The heat dissipation connecting element connects the heat source module and the heat storage module. Heat generated by the heat source module is transferred to the heat storage module through the heat dissipation connecting element.

Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.

Abstract: Methods of forming connectors and packaged semiconductor devices are disclosed. In some embodiments, a connector is formed by forming a first photoresist layer over an interconnect structure, and patterning the first photoresist layer. The patterned first photoresist layer is used to form a first opening in an interconnect structure. The patterned first photoresist is removed, and a second photoresist layer is formed over the interconnect structure and in the first opening. The second photoresist layer is patterned to form a second opening over the interconnect structure in the first opening. The second opening is narrower than the first opening. At least one metal layer is plated through the patterned second photoresist layer to form the connector.

Abstract: An MRAM structure includes a dielectric layer. A first MRAM, a second MRAM and a third MRAM are disposed on the dielectric layer, wherein the second MRAM is disposed between the first MRAM and the third MRAM, and the second MRAM includes an MTJ. Two gaps are respectively disposed between the first MRAM and the second MRAM and between the second MRAM and the third MRAM. Two tensile stress pieces are respectively disposed in each of the two gaps. A first compressive stress layer surrounds and contacts the sidewall of the MTJ entirely. A second compressive stress layer covers the openings of each of the gaps and contacts the two tensile material pieces.

Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.

Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a MRAM region and a logic region; forming a magnetic tunneling junction (MTJ) on the MRAM region; forming a top electrode on the MTJ; and then performing a flowable chemical vapor deposition (FCVD) process to form a first inter-metal dielectric (IMD) layer around the top electrode and the MTJ.

Abstract: A semiconductor package includes a first semiconductor die, a molded die, a third encapsulant, and a redistribution structure. The molded die includes a chip, a first encapsulant, and a second encapsulant. The first encapsulant laterally wraps the chip. The second encapsulant laterally wraps the first encapsulant. The third encapsulant laterally wraps the first semiconductor die and the molded die. The redistribution structure extends on the second encapsulant, the third encapsulant, and the first semiconductor die. The redistribution structure is electrically connected to the first semiconductor die and the molded die. The second encapsulant separates the first encapsulant from the third encapsulant.

Abstract: A pre-sintered porcelain block for dental restoration; the pre-sintered porcelain block does not contain crystal phases and has a Vickers hardness of 0.5-2 GPa. Due to a hardness which is significantly lower than that of the porcelain block containing a lithium metasilicate crystal phase, the pre-sintered porcelain block may be processed by using dry machining and can simultaneously be processed by using wet machining when being mechanically processed into a dental restoration shape.

Abstract: Disclosed is a pre-sintered ceramic block for a dental restoration, which has a low pre-sintering temperature, contains a silica main crystal phase, but does not contain or contains a small amount of lithium metasilicate crystal phase. The pre-sintered ceramic block has a low hardness, with a Vickers hardness of 0.5-3 GPa, which is significantly lower than that of a ceramic block containing a lithium metasilicate crystal phase, and same is suitable for dry machining and also wet machining when being machined into a dental restoration. (FIG.

Abstract: An aluminum matrix composite is provided. The aluminum matrix composite comprises at least one reinforcement layer and an aluminum layer. The at least one reinforcement layer comprises a plurality of reinforcement sheets. The plurality of reinforcement sheets are uniformly dispersed in at least a portion of the aluminum layer.

Abstract: A method for fabricating semiconductor device includes first forming a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, performing an atomic layer deposition (ALD) process or a high-density plasma (HDP) process to form a passivation layer on the first MTJ and the second MTJ, performing an etching process to remove the passivation layer adjacent to the first MTJ and the second MTJ, and then forming an ultra low-k (ULK) dielectric layer on the passivation layer.

Abstract: A semiconductor package includes semiconductor dies, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The encapsulant encapsulates the semiconductor dies and is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the semiconductor dies. The high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer. The redistribution structure includes conductive patterns embedded in at least a pair of dielectric layers. The dielectric layers of the pair are made of a third material. The elastic modulus of the first material is higher than the elastic modulus of the third material. The elastic modulus of the second material is higher than the elastic modulus of the third material.

Abstract: A projection apparatus and a control method thereof are provided. The projection apparatus includes a light source, an optical engine, a first sensor, and a processor. The light source provides a light beam to the optical engine. The optical engine converts the light beam into an image beam and projects the same out of the projection apparatus. The first sensor senses an ambient temperature. The processor is coupled to the optical engine, the light source, and the first sensor, records a projection time of the optical engine, selects a selected temperature range in which the ambient temperature is included from multiple temperature ranges according to the ambient temperature, and selects a selected driving program from multiple driving programs corresponding to the temperature ranges according to the selected temperature range to control the light source. A brightness of light beam is negatively related to the projection time.

Abstract: An MRAM structure includes a dielectric layer. A first MRAM, a second MRAM and a third MRAM are disposed on the dielectric layer, wherein the second MRAM is disposed between the first MRAM and the third MRAM, and the second MRAM includes an MTJ. Two gaps are respectively disposed between the first MRAM and the second MRAM and between the second MRAM and the third MRAM. Two tensile stress pieces are respectively disposed in each of the two gaps. A first compressive stress layer surrounds and contacts the sidewall of the MTJ entirely. A second compressive stress layer covers the openings of each of the gaps and contacts the two tensile material pieces.

Abstract: A method for forming a porous copper composite is provided. At least two carbon nanostructure reinforced copper composite substrates are provided. The at least two carbon nanostructure reinforced copper composite substrates are stacked to form a composite substrate. An active metal layer is disposed on a surface of the composite substrate to form a first a composite structure. The first composite structure is pressed to form a second composite structure. The second composite structure is annealed to form a third composite structure. The third composite structure is de-alloyed to form a porous copper composite.

Abstract: An embodiment semiconductor package includes a bare semiconductor chip, a packaged semiconductor chip adjacent the bare semiconductor chip, and a redistribution structure bonded to the bare semiconductor chip and the packaged semiconductor chip. The redistribution structure includes a first redistribution layer having a first thickness; a second redistribution layer having a second thickness; and a third redistribution layer between the first redistribution layer and the second redistribution layer. The third redistribution layer has a third thickness greater than the first thickness and the second thickness. The package further includes an underfill disposed between the bare semiconductor chip and the redistribution structure and a molding compound encapsulating the bare semiconductor chip, the packaged semiconductor chip, and the underfill.

Abstract: An anode of the lithium ion battery is provided. The anode of the lithium ion battery comprises a nanoporous copper substrate and a copper oxide nanosheet array. The copper oxide nanosheet array is disposed on one surface of the nanoporous copper substrate, and the nanoporous copper substrate is chemically bonded to the copper oxide nanosheet array.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a top electrode on the MTJ, a trapping layer in the top electrode for trapping hydrogen, a first inter-metal dielectric (IMD) layer on the MTJ, and a first metal interconnection in the first IMD layer and on the top electrode. Preferably, a top surface of the trapping layer is lower than a bottom surface of the first IMD layer.

Abstract: A method for making nanoporous nickel composite material comprises: providing a cathode plate and a copper-containing anode plate, electroplating a copper material layer a surface of the cathode plate; laying a carbon nanotube layer on the copper material layer, and forming an overlapped structure of the copper material layer and the carbon nanotube laye; the cathode plate and the overlapped structure are used as a cathode, and a nickel-containing anode plate is used as an anode, plating a nickel material layer on the overlapped structure to form sandwich structure; repeating steps S1 to S3 to obtain a carbon nanotube-reinforced copper-nickel alloy; rolling and annealing the carbon nanotube-reinforced copper-nickel alloy; and etching the carbon nanotube-reinforced copper-nickel alloy to form the nanoporous nickel composite material.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first semiconductor device, at least one second semiconductor device, at least one dummy die, an encapsulant and a redistribution structure. The first semiconductor device, the at least one second semiconductor device and at least one dummy die are laterally separated from one another, and laterally encapsulated by the encapsulant. A Young's modulus of the at least one dummy die is greater than a Young's modulus of the encapsulant. A sidewall of the at least one dummy die is substantially coplanar with a sidewall of the encapsulant. The redistribution structure is disposed over the encapsulant, and electrically connected to the first semiconductor device and the at least one second semiconductor device.