Patents by Inventor Cheng-Hsi CHUANG

Cheng-Hsi CHUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220379433
    Abstract: Provided is a dressing device for a carrier. The dressing device comprises a dresser, a swing arm, a base and at least one damper. A first end and a second end of the swing arm are coupled to the dresser and the base, respectively, and the at least one damper is disposed inside the swing arm. Any axial vibration of the dresser or the swing arm during dressing for the carrier can be compensated or attenuated by the damper in an active manner properly, so as to make the surface of the carrier flatter and more uniform, which not only improves a removal rate of material and a polishing result of the surface in the subsequent chemical mechanical planarization process, but also prolongs the service life of the carrier. The present disclosure further relates to a polishing system for dressing the carrier by using the said dressing device.
    Type: Application
    Filed: May 26, 2022
    Publication date: December 1, 2022
    Inventors: Chao-Chang Chen, Jen-Chieh Li, Cheng-Hsi Chuang, Shih-Chung Hsu, Yu-Tung Tsai, Hsien-Ming Lee, Chun-Chen Chen, Ching-Tang Hsueh
  • Publication number: 20200194327
    Abstract: A semiconductor device package includes: (1) a conductive base comprising a sidewall, a cavity defined from a first surface of the conductive base, the cavity having a bottom surface and a depth; (2) a semiconductor die disposed on the bottom surface of the cavity, the semiconductor die having a first surface and a second surface opposite the first surface, the second surface of the semiconductor die bonded to the bottom surface of the cavity; and (3) a first insulating material covering the sidewall of the conductive base and extending to a bottom surface of the conductive base.
    Type: Application
    Filed: February 26, 2020
    Publication date: June 18, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Tsung CHIU, Meng-Jen WANG, Cheng-Hsi CHUANG, Hui-Ying HSIEH, Hui Hua LEE
  • Publication number: 20180358276
    Abstract: A semiconductor device package includes: (1) a conductive base comprising a sidewall, a cavity defined from a first surface of the conductive base, the cavity having a bottom surface and a depth; (2) a semiconductor die disposed on the bottom surface of the cavity, the semiconductor die having a first surface and a second surface opposite the first surface, the second surface of the semiconductor die bonded to the bottom surface of the cavity; and (3) a first insulating material covering the sidewall of the conductive base and extending to a bottom surface of the conductive base.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Tsung CHIU, Meng-Jen WANG, Cheng-Hsi CHUANG, Hui-Ying HSIEH, Hui Hua LEE
  • Patent number: 10083888
    Abstract: A semiconductor device package includes a conductive base, and a cavity defined from a first surface of the conductive base, the cavity having a bottom surface and a depth. A semiconductor die is disposed on the bottom surface of the cavity, the semiconductor die having a first surface and a second surface opposite the first surface. The second surface of the semiconductor die is bonded to the bottom surface of the cavity. A distance between the first surface of the semiconductor die and the first surface of the conductive base is about 20% of the depth of the cavity.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: September 25, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi-Tsung Chiu, Meng-Jen Wang, Cheng-Hsi Chuang, Hui-Ying Hsieh, Hui Hua Lee
  • Publication number: 20170148746
    Abstract: A semiconductor device package includes a conductive base, and a cavity defined from a first surface of the conductive base, the cavity having a bottom surface and a depth. A semiconductor die is disposed on the bottom surface of the cavity, the semiconductor die having a first surface and a second surface opposite the first surface. The second surface of the semiconductor die is bonded to the bottom surface of the cavity. A distance between the first surface of the semiconductor die and the first surface of the conductive base is about 20% of the depth of the cavity.
    Type: Application
    Filed: August 29, 2016
    Publication date: May 25, 2017
    Inventors: Chi-Tsung CHIU, Meng-Jen WANG, Cheng-Hsi CHUANG, Hui-Ying HSIEH, Hui Hua LEE