Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, and a conductive filler. The polymer matrix has a fluoropolymer. The total volume of the PTC material layer is calculated as 100%, and the fluoropolymer accounts for 47-62% by volume of the PTC material layer. The fluoropolymer has a melt viscosity higher than 3000 Pa·s.

Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a first conductive filler. The polymer matrix includes a polyolefin-based polymer and a fluoropolymer. The fluoropolymer has a melt flow index higher than 1.9 g/10 min, and the polyolefin-based polymer and the fluoropolymer together form an interpenetrating polymer network (IPN). The first conductive filler has a metal-ceramic compound dispersed in the polymer matrix.

Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.

Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.

Abstract: A staining kit is provided, including a first pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, CD8, CD45, and CTLA4; a second pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, dendritic cell, and CD45; a third pattern including antibodies against T cell, B cell, NK cell, monocyte, CD8, CD45, CD45RA, CD62L, CD197, CX3CR1 and TCR??; and a fourth pattern including antibodies against B cell, CD23, CD38, CD40, CD45 and IgM, wherein the antibodies of each pattern are labeled with fluorescent dyes. A method of identifying characterized immune cell subsets of a disease and a method of predicting the likelihood of NPC in a subject in the need thereof using the staining kit are also provided.

Abstract: A semiconductor structure is provided. The semiconductor structure comprises a substrate, a via, a liner layer, a barrier layer, and a conductor. The via penetrates through the substrate. The liner layer is formed on a sidewall of the via. The barrier layer is formed on the liner layer. The barrier layer comprises a conductive 2D material. The conductor fills a remaining space of the via.

Abstract: A memory device includes a substrate, a transistor disposed over the substrate, an interconnect structure disposed over and electrically connected to the transistor, and a memory stack disposed between two adjacent metallization layers of the interconnect structure. The memory stack includes a bottom electrode disposed over the substrate and electrically connected to a bit line, a memory layer disposed over the bottom electrode, a selector layer disposed over the memory layer, and a top electrode disposed over the selector layer and electrically connected to a word line. Besides, at least one moisture-resistant layer is provided adjacent to and in physical contact with the selector layer, and the at least one moisture-resistant layer includes an amorphous material.

Abstract: A mobile device includes a housing, a first radiation element, a second radiation element, a third radiation element, a first switch element, and a second switch element. The first radiation element has a first feeding point. The second radiation element has a second feeding point. The first radiation element, the second radiation element, and the third radiation element are distributed over the housing. The first switch element is closed or open, so as to selectively couple the first radiation element to the third radiation element. The second switch element is closed or open, so as to selectively couple the second radiation element to the third radiation element. An antenna structure is formed by the first radiation element, the second radiation element, and the third radiation element.

Abstract: A connection pin for an expansion socket can be treated to improve signal (e.g., reduce noise) for high speed applications. A connection pin can be treated to have a conductive plating covering a proximal region of the connection pin. Electrical signals between an expansion card in contact with the connection pin and the circuit board to which the connection pin is coupled can pass directly through the conductive plating of the proximal region. However, the distal region of the connection pin can be treated to be devoid of the conductive plating, such as by being covered with a high dielectric loss and/or high-resistance material or through removal of the conductive plating in that region. Thus, electrical signals passing through the connection pin will tend to pass through the conductive plating rather than along the distal region of the pin. Thus, signal reflections and other artifacts and noise can be avoided.

Abstract: An air duct formed from an electromagnetic wave absorber in the form of a sheet is disclosed. The sheet can be bent into a duct or scored, and folded at the score lines to bring the ends of the sheet into proximity. The ends can then be joined by adhesive, welding, or mechanical fasters. The air ducts disclosed herein provide dual functions of providing ventilation for electronic components in an electronic module, while at the same time, reducing electromagnetic interference (EMI). One or more air ducts, of the same or different dimensions, shapes, volumes can be combined with electronic modules, such as a server, to provide both ventilation and EMI suppression to various components within the electronic module.

Abstract: An air duct formed from an electromagnetic wave absorber in the form of a sheet is disclosed. The sheet can be bent into a duct or scored, and folded at the score lines to bring the ends of the sheet into proximity. The ends can then be joined by adhesive, welding, or mechanical fasters. The air ducts disclosed herein provide dual functions of providing ventilation for electronic components in an electronic module, while at the same time, reducing electromagnetic interference (EMI). One or more air ducts, of the same or different dimensions, shapes, volumes can be combined with electronic modules, such as a server, to provide both ventilation and EMI suppression to various components within the electronic module.

Abstract: A connection pin for an expansion socket can be treated to improve signal (e.g., reduce noise) for high speed applications. A connection pin can be treated to have a conductive plating covering a proximal region of the connection pin. Electrical signals between an expansion card in contact with the connection pin and the circuit board to which the connection pin is coupled can pass directly through the conductive plating of the proximal region. However, the distal region of the connection pin can be treated to be devoid of the conductive plating, such as by being covered with a high dielectric loss and/or high-resistance material or through removal of the conductive plating in that region. Thus, electrical signals passing through the connection pin will tend to pass through the conductive plating rather than along the distal region of the pin. Thus, signal reflections and other artifacts and noise can be avoided.

Abstract: The present disclosure describes expansion card interfaces for a printed circuit board and methods of making the same. The methods include forming electrical pads of the expansion card interface on a substrate, and dividing at least one electrical pad into a first portion and a second portion. The resulting expansion card interfaces have the first portion conductively coupled to a circuit on the printed circuit board, and the second portion conductively isolated from the first portion.

Abstract: The present disclosure describes an expansion card interface for a printed circuit board. The expansion card interface includes a substrate having an edge. The expansion card interface further includes a plurality of signal pins configured to communicate one or more signals to and from the printed circuit board. The expansion card interface further includes a plurality of ground pins adjacent to the plurality of signal pins configured to provide a ground. At least one signal pin of the plurality of signal pins extends closer to the edge of the substrate than at least one ground pin of the plurality of ground pins.

Abstract: The present disclosure describes expansion card interfaces for a printed circuit board and methods of making the same. The methods include forming electrical pads of the expansion card interface on a substrate, and dividing at least one electrical pad into a first portion and a second portion. The resulting expansion card interfaces have the first portion conductively coupled to a circuit on the printed circuit board, and the second portion conductively isolated from the first portion.

Abstract: A high speed circuit and a method for fabricating the same is disclosed. The high speed circuit has a printed circuit board. A pair of first and second differential traces are formed on a first surface of the printed circuit board. The differential traces carry an electrical signal. A partial loop extends through the printed circuit board. The partial loop includes first and second end slots under the first and second differential traces. The partial loop includes a pair of side slots substantially parallel to the differential traces. An anchor member connects the printed circuit board to an island formed by the first and second end slots and side slots. The anchor member forms a gap in one of the end slots or side slots. The length of the side slots and the length of the gap is selected to reduce a target common mode frequency from the electrical signal.

Abstract: A connector assembly is disclosed to reduce discontinuity impedance between golden finger connectors and components on a circuit board. The assembly includes a circuit board including a connector edge. A plurality of connectors is formed on the connector edge on a first surface of the circuit board. A ground plane is formed on part of the circuit board on a second opposite surface of the first surface. The ground plane leaves the second opposite surface under the connector edge exposed. A ground loop is formed on the second opposite surface under at least two of the plurality of connectors.

Abstract: A high speed circuit and a method for fabricating the same is disclosed. The high speed circuit has a printed circuit board. A pair of first and second differential traces are formed on a first surface of the printed circuit board. The differential traces carry an electrical signal. A partial loop extends through the printed circuit board. The partial loop includes first and second end slots under the first and second differential traces. The partial loop includes a pair of side slots substantially parallel to the differential traces. An anchor member connects the printed circuit board to an island formed by the first and second end slots and side slots. The anchor member forms a gap in one of the end slots or side slots. The length of the side slots and the length of the gap is selected to reduce a target common mode frequency from the electrical signal.

Abstract: The present disclosure describes an expansion card interface for a printed circuit board. The expansion card interface includes a substrate having an edge. The expansion card interface further includes a plurality of signal pins configured to communicate one or more signals to and from the printed circuit board. The expansion card interface further includes a plurality of ground pins adjacent to the plurality of signal pins configured to provide a ground. At least one signal pin of the plurality of signal pins extends closer to the edge of the substrate than at least one ground pin of the plurality of ground pins.

Abstract: A connector assembly is disclosed to reduce discontinuity impedance between golden finger connectors and components on a circuit board. The assembly includes a circuit board including a connector edge. A plurality of connectors is formed on the connector edge on a first surface of the circuit board. A ground plane is formed on part of the circuit board on a second opposite surface of the first surface. The ground plane leaves the second opposite surface under the connector edge exposed. A ground loop is formed on the second opposite surface under at least two of the plurality of connectors.