Patents by Inventor Cheng-Hsien Li
Cheng-Hsien Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150103986Abstract: This invention discloses a signal transmitting and receiving circuit of a digital subscriber line used for transmitting an output signal to a telecommunication loop or receiving an input signal from the telecommunication loop. The signal transmitting and receiving circuit comprises a transformer, which is coupled to the telecommunication loop; a signal transmitting module, which is coupled to the transformer, for generating the output signal; a signal receiving module, which is coupled to the transformer, for processing the input signal; an echo cancelling circuit, comprising passive components and having two ends, one of which is coupled to the signal transmitting module and the transformer, the other is coupled to the signal receiving module and the transformer. The output signal is transmitted to the telecommunication loop via the electromagnetic coupling of the transformer, and the input signal is received by the signal receiving module by the electromagnetic coupling of the transformer.Type: ApplicationFiled: June 26, 2014Publication date: April 16, 2015Inventors: YUNG-TAI CHEN, CHENG-HSIEN LI, HUNG-CHEN CHU, JIAN-RU LIN
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Publication number: 20140374779Abstract: A light-emitting device includes a light-emitting stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer includes a first surface, a second surface opposite to the first surface, a first portion connecting to the first surface, and a second portion connecting to the first portion; an opening penetrating the first portion from the first surface and having a first width; a depression connecting to the opening and penetrating the second semiconductor layer, the active layer, and the second portion of the first semiconductor layer, wherein the depression includes a second width greater than the first width, and the depression includes a bottom to expose the second surface, and an electrode located in the depression and corresponding to the opening.Type: ApplicationFiled: June 11, 2014Publication date: December 25, 2014Inventors: Wei-Jung CHUNG, Jennhwa FU, Cheng-Hsien LI, Chi-Hao HUANG
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Patent number: 8861687Abstract: An integrated hybrid circuit includes a transmission unit, a transceiver coil, a transceiver circuit, a hybrid matching circuit, and a receiving circuit. The transmission unit generates a pair of upstream signals according to a user transmission signal. The transceiver coil transmits the pair of upstream signals to a central office through a pair of twisted pair, and receiving a pair of downstream signals from the central office through the pair of twisted pair. The hybrid matching circuit receives an adjustment signal to adjust selective impedances. The receiving circuit receives the pair of downstream signals from the central office, and generates the adjustment signal according to downstream and upstream rates and signals from the hybrid matching circuit. The transmission unit adjusts transmission power and bandwidth of the transmission unit and the receiving unit adjusts filter bandwidth of the receiving unit according to the adjustment signal for optimizing upstream and downstream rates.Type: GrantFiled: July 8, 2013Date of Patent: October 14, 2014Assignee: Realtek Semiconductor Corp.Inventors: Cheng-Hsien Li, Wen-Chieh Lai, Chih-Chiang Liao
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Publication number: 20140241405Abstract: The present invention discloses a transceiver of digital subscriber line (DSL) which supports a variety of DSL systems, comprising: a transmission circuit for receiving an output signal and generating a first DSL transmission signal or a second DSL transmission signal according to the output signal under the control of a transmission selection parameter; a hybrid circuit for generating a line transmission signal according to the first or second DSL transmission signal and generating a DSL reception signal according to a line reception signal; and a reception circuit for generating a first DSL reception signal or a second DSL reception signal according to the DSL reception signal, and then outputting one of the first and second DSL reception signals as an input signal according to a reception selection parameter.Type: ApplicationFiled: February 25, 2014Publication date: August 28, 2014Applicant: REALTEK SEMICONDUCTOR CORPORATIONInventor: CHENG-HSIEN LI
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Publication number: 20140010356Abstract: An integrated hybrid circuit includes a transmission unit, a transceiver coil, a transceiver circuit, a hybrid matching circuit, and a receiving circuit. The transmission unit generates a pair of upstream signals according to a user transmission signal. The transceiver coil transmits the pair of upstream signals to a central office through a pair of twisted pair, and receiving a pair of downstream signals from the central office through the pair of twisted pair. The hybrid matching circuit receives an adjustment signal to adjust selective impedances. The receiving circuit receives the pair of downstream signals from the central office, and generates the adjustment signal according to downstream and upstream rates and signals from the hybrid matching circuit. The transmission unit adjusts transmission power and bandwidth of the transmission unit and the receiving unit adjusts filter bandwidth of the receiving unit according to the adjustment signal for optimizing upstream and downstream rates.Type: ApplicationFiled: July 8, 2013Publication date: January 9, 2014Inventors: Cheng-Hsien Li, Wen-Chieh Lai, Chih-Chiang Liao
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Publication number: 20130313596Abstract: The present disclosure provides a light-emitting device having a patterned interface composed of a plurality of predetermined patterned structures mutually distinct, wherein the plurality of predetermined patterned structures are repeatedly arranged in the patterned interface such that any two neighboring patterned structures are different from each other. The present disclosure also provides a manufacturing method of the light-emitting device. The method comprises the steps of providing a substrate, generating a random pattern arrangement by a computing simulation, forming a mask having the random pattern arrangement on the substrate, and removing a portion of the substrate thereby transferring the random pattern arrangement to the substrate.Type: ApplicationFiled: May 28, 2013Publication date: November 28, 2013Inventors: Jenn-Hwa FU, Cheng-Hsien LI, Chi-Hao HUANG
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Publication number: 20130210178Abstract: A light-emitting device and method for manufacturing the same are described. A method for manufacturing a light-emitting device comprising the steps of: providing a substrate; forming a light-emitting structure on the substrate, wherein the light-emitting structure comprising a plurality of chip areas and a plurality of street areas; forming a conductive structure between the substrate and the light-emitting structure; removing a part of the light-emitting structure in the street areas to expose a sidewall in the chip areas; forming a first passivation layer on the light-emitting structure in the chip areas; and forming a second passivation layer in the street areas, the sidewalls of the light-emitting structure, and the sidewalls of the first passivation layer.Type: ApplicationFiled: February 13, 2012Publication date: August 15, 2013Applicant: Epistar CorporationInventors: Cheng-Hsien Li, Chi-Hao Huang, Hsin-Hsiung Huang
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Patent number: 8378376Abstract: The present application describes a vertical light-emitting diode (VLED) and its manufacture method that use the combination of a reflective layer, a transparent conducting layer and transparent dielectric layer as structural layers for promoting uniform current distribution and increasing light extraction. In the VLED, a transparent conducting layer is formed on a first outer surface of a stack of multiple group III nitride semiconductor layers. A transparent dielectric layer is then formed on a side of the transparent conducting layer opposite the side of the multi-layer structure. A first electrode structure is then formed on the transparent dielectric layer in electrical contact with the transparent conducting layer via a plurality of contact windows patterned through the transparent dielectric layer. The transparent conducting layer and the transparent dielectric layer are used as structural layers for improving light extraction.Type: GrantFiled: July 30, 2010Date of Patent: February 19, 2013Assignee: Tekcore Co., Ltd.Inventors: Wei-Jung Chung, Shih-Hung Lee, Cheng-Hsien Li, Wen-Hsien Lin, Nien-Tze Yeh
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Publication number: 20120327623Abstract: A printed circuit board includes first and second layout layers, first and second components, and a pair of connecting portions. The first layout layer includes a pair of first conducting portions connected to a control chip. The second layout layer includes pairs of second to fourth conducting portions. The connecting portions connect the first and third conducting portions together. When an electronic device is connected to the second conducting portions, and the first and second components are connected to the third and fourth conducting portions to form a first route, signals generated by the control chip are transmitted to the electronic device through the first route. When the electronic device is connected to the fourth conducting portions, and the first and second components are connected to the second and third conducting portions to form a second route, the signals are transmitted to the electronic device through the second route.Type: ApplicationFiled: August 28, 2012Publication date: December 27, 2012Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: YUNG-CHIEH CHEN, CHENG-HSIEN LI, SHOU-KUO HSU
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Patent number: 7981705Abstract: In a method of manufacturing a vertical type light-emitting diode, a multilayered structure of group III nitride semiconductor compounds is epitaxy deposited on an irregular surface of a substrate. The substrate is then removed to expose an irregular surface of the multilayered structure corresponding to the irregular surface of the substrate. A portion of the exposed irregular surface of the multilayered structure is then etched for forming an electrode contact surface on which an electrode layer is subsequently formed. With this method, no specific planarized region is required on the irregular surface of the substrate. As a result, planarization treatment of the substrate is not necessary. The same substrate with the irregular surface can be reused for fabricating vertical and horizontal light-emitting diodes.Type: GrantFiled: July 30, 2010Date of Patent: July 19, 2011Assignee: Tekcore Co., Ltd.Inventors: Wei-Jung Chung, Shih-Hung Lee, Cheng-Hsien Li, Wen-Hsien Lin, Nien-Tze Yeh
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Publication number: 20110163293Abstract: The present application describes a vertical light-emitting diode (VLED) and its manufacture method that use the combination of a reflective layer, a transparent conducting layer and transparent dielectric layer as structural layers for promoting uniform current distribution and increasing light extraction. In the VLED, a transparent conducting layer is formed on a first outer surface of a stack of multiple group III nitride semiconductor layers. A transparent dielectric layer is then formed on a side of the transparent conducting layer opposite the side of the multi-layer structure. A first electrode structure is then formed on the transparent dielectric layer in electrical contact with the transparent conducting layer via a plurality of contact windows patterned through the transparent dielectric layer. The transparent conducting layer and the transparent dielectric layer are used as structural layers for improving light extraction.Type: ApplicationFiled: July 30, 2010Publication date: July 7, 2011Applicant: Tekcore Co., Ltd.Inventors: Wei-Jung Chung, Shih-Hung Lee, Cheng-Hsien Li, Wen-Hsien Lin, Nien-Tze Yeh
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Publication number: 20110097831Abstract: In a method of manufacturing a vertical type light-emitting diode, a multilayered structure of group III nitride semiconductor compounds is epitaxy deposited on an irregular surface of a substrate. The substrate is then removed to expose an irregular surface of the multilayered structure corresponding to the irregular surface of the substrate. A portion of the exposed irregular surface of the multilayered structure is then etched for forming an electrode contact surface on which an electrode layer is subsequently formed. With this method, no specific planarized region is required on the irregular surface of the substrate. As a result, planarization treatment of the substrate is not necessary. The same substrate with the irregular surface can be reused for fabricating vertical and horizontal light-emitting diodes.Type: ApplicationFiled: July 30, 2010Publication date: April 28, 2011Applicant: Tekcore Co., Ltd.Inventors: Wei-Jung CHUNG, Shih-Hung Lee, Cheng-Hsien Li, Wen-Hsien Lin, Nien-Tze Yeh