Patents by Inventor Cheng-Hsiung (Matt) Tsai

Cheng-Hsiung (Matt) Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12376380
    Abstract: An electronic device includes a substrate, a signal line, a semiconductor, a first conductive portion and a second conductive portion. The signal line is disposed on the substrate. The semiconductor is disposed on the substrate and overlapped with the signal line. Wherein the semiconductor is electrically connected to the first conductive portion and the second conductive portion. Wherein in a top view, at least a portion of the signal line is disposed between the first conductive portion and the second conductive portion. Wherein the first conductive portion has a first curve edge, the second conductive portion has a second curve edge, and the first curve edge and the second curve edge are facing the at least a portion of the signal line and are convex toward the at least a portion of the signal line.
    Type: Grant
    Filed: May 21, 2024
    Date of Patent: July 29, 2025
    Assignee: INNOLUX CORPORATION
    Inventors: Cheng-Hsiung Chen, Pei-Chieh Chen, Chao-Hsiang Wang, Yi-Ching Chen
  • Patent number: 12367932
    Abstract: A memory device includes a column of at least three memory cells and a source line coupled to the source terminal of each memory cell. A source line driver is coupled to the source line, a voltage terminal, and a program voltage source and is switchable between a program operation, an erase operation, and a read operation.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: July 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yu-Der Chih, Cheng-Hsiung Kuo, Chung-Chieh Chen
  • Patent number: 12355165
    Abstract: An electronic device including a metal bottom plate, a metal frame and at least one radiator is provided. The metal bottom plate includes at least one ground terminal. The metal frame includes at least one slot, at least one disconnecting part, at least one first connecting part and at least one second connecting part. The disconnecting part includes a first part and a second part. Each radiator includes a first terminal and a second terminal. The second terminal is connected to a junction between the first part and the second part. The first terminal, the second terminal, the first part, the first connecting part and the ground terminal form a first antenna path radiating at a first frequency band. The first terminal, the second terminal, the second part, the second connecting part and the ground terminal form a second antenna path radiating at a second frequency band.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: July 8, 2025
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chih-Wei Liao, Chao-Hsu Wu, Hau Yuen Tan, Shih-Keng Huang, Cheng-Hsiung Wu, Chia-Hung Chen, Sheng-Chin Hsu, Hao-Hsiang Yang
  • Patent number: 12342579
    Abstract: A semiconductor device includes a substrate, a first transistor disposed on the substrate, a second transistor in proximity to the first transistor on the substrate, at least one interlayer dielectric layer covering the first transistor and the second transistor, a first stress-inducing dummy metal pattern disposed on the at least one interlayer dielectric layer and directly above the first transistor, and a second stress-inducing dummy metal pattern disposed on the at least one interlayer dielectric layer and directly above the second transistor.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: June 24, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Yu Yang, Fang-Yun Liu, Chien-Tung Yue, Kuo-Liang Yeh, Mu-Kai Tsai, Jinn-Horng Lai, Cheng-Hsiung Chen
  • Patent number: 12327907
    Abstract: An electronic device including a metal casing and at least one antenna module is provided. The metal casing includes at least one window. The at least one antenna module is disposed in the at least one window. The at least one antenna module includes a first radiator and a second radiator. The first radiator includes a feeding end, a first ground end joined to the metal casing, a second ground end, a first portion extending from the feeding end to the first ground end, and a second portion extending from the feeding end to the second ground end. A first coupling gap is between the second radiator and the first portion. A second coupling gap is between at least part of the second radiator and the metal casing, and the second radiator includes a third ground end joined to the metal casing.
    Type: Grant
    Filed: September 8, 2023
    Date of Patent: June 10, 2025
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Sheng-Chin Hsu, Chih-Wei Liao, Hau Yuen Tan, Cheng-Hsiung Wu, Shih-Keng Huang
  • Patent number: 12288928
    Abstract: An electronic device includes a metal back cover, a metal frame, and two radiators. The metal frame disposed at a side of the metal back cover includes two disconnecting parts, a second slot, and two connecting parts. A first slot is formed between each of the disconnecting parts and the metal back cover. The second slot is formed between the two disconnecting parts. The two connecting parts are connected to a side away from the second slot of the two disconnecting parts respectively and are connected to the metal back cover. Each of the radiators connects the metal back cover to the corresponding disconnecting part over the first slot. The two radiators are disposed symmetrically based on the second slot. Each radiator is coupled with the corresponding disconnecting part, the corresponding connecting part, and the metal back cover to resonate a first, a second, and a third frequency band.
    Type: Grant
    Filed: July 19, 2023
    Date of Patent: April 29, 2025
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Shih-Keng Huang, Hau Yuen Tan, Cheng-Hsiung Wu, Sheng-Chin Hsu, Tse-Hsuan Wang
  • Publication number: 20250128036
    Abstract: A microneedle device includes a substrate and a plurality of microneedle structures. The substrate is provided with a first surface, where the first surface has a surface roughness ranged from 0.05 ?m to 2.0 ?m. The plurality of microneedle structures are configured on the first surface. Because the surface of the microneedle device has a surface roughness of 0.05 ?m to 2.0 ?m, a film can be formed completely.
    Type: Application
    Filed: August 20, 2024
    Publication date: April 24, 2025
    Inventors: Wen-Chuan Chen, Cheng-Hsiung Chen
  • Publication number: 20250108669
    Abstract: Disclosed are examples related to PCB impedance tuning for wideband operation and acceptance of antenna variation. In one example, a tire monitoring device includes a sensor, RFID circuitry and processing circuitry mounted on a PCB. The RFID circuitry can harvest energy and transmit monitored tire data in response to a received interrogation signal. The RFID circuitry can be tuned to receive interrogation signals in a frequency band from at least 868 MHz to at least 915 MHz to cover both NA and EU applications. Impedance matching of the RFID circuitry can enable operation independent of variations in coil antenna length. In another example, comprises the tire monitoring device and a RFID reader or interrogator.
    Type: Application
    Filed: August 8, 2024
    Publication date: April 3, 2025
    Inventors: Cheng-Hsiung Lin, Daniel Harrist
  • Publication number: 20250105057
    Abstract: An interconnect structure includes a first conductive feature, a first dielectric layer a first etch stop layer, a second etch stop layer, a second dielectric layer, and a second conductive feature. The first etch stop layer is disposed over the first conductive feature and the first dielectric layer. The second etch stop layer is disposed on the first etch stop layer. The second dielectric layer is disposed on the second etch stop layer. The second conductive feature includes a first conductive layer and a first barrier layer. The first conductive layer extends through the second dielectric layer, the second and the first etch stop layers to contact to the first conductive feature. The first barrier layer is sandwiched between the first conductive layer and the second dielectric layer, the first conductive layer and the second etch stop layer, and between the first conductive layer and the first etch stop layer.
    Type: Application
    Filed: September 22, 2023
    Publication date: March 27, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shao-Kuan Lee, Tzu-Hui Wei, Cheng-Hsiung Tsai, Chieh-Han Wu, Yu-Hao Yeh
  • Publication number: 20250087535
    Abstract: A method for forming a semiconductor structure includes following operations. A first metallization feature is formed, and a first cap layer is formed over the first metallization feature. A first insulating layer is formed over the first cap layer and the first metallization feature. A first dielectric structure is formed over the first insulating layer. A portion of the first dielectric structure and a portion of the first insulating layer are removed to expose the first cap layer. A second cap layer is formed over the first cap layer and the first metallization feature. A second insulating layer and a patterned second dielectric structure are formed over the substrate. The patterned second dielectric structure includes a trench and a via opening coupled to a bottom of the trench. A second metallization feature is formed in the trench, and a via structure is formed in the via opening.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Inventors: HWEI-JAY CHU, CHIEH-HAN WU, CHENG-HSIUNG TSAI, CHUNG-JU LEE
  • Publication number: 20250079260
    Abstract: An improved leak-proof heat dissipation structure of high thermal conductivity materials includes an insulating film layer, a high thermal conductivity thermal interface material layer, a first flexible material composite layer, a second flexible material composite layer and a radiator. The insulating film layer has a film opening at the center. The high thermal conductivity thermal interface material layer has its body close to the heat source and located above the chip body. The first flexible material composite layer is set above the insulating film layer, and has a first opening at the center. The second flexible material composite layer is provided below the insulating film layer, and has a second opening at the center. The radiator is placed on the first flexible material composite layer, and has a boss at the bottom and multiple storage grooves on the boss.
    Type: Application
    Filed: January 5, 2024
    Publication date: March 6, 2025
    Inventor: Cheng-Hsiung CHEN
  • Publication number: 20250062086
    Abstract: A keyboard including a key module is provided. The key module includes a keycap, a rigid modular circuit board and a linkage element. The linkage element is located between the keycap and the modular circuit board. The key module is detachably disposed on the keyboard, so that the key module, either in its entirety or as a part, could be disassembled from or assembled to the keyboard.
    Type: Application
    Filed: August 14, 2024
    Publication date: February 20, 2025
    Inventors: Cheng-Kun LIAO, Ming-Fu Yen, Wei-Jung Huang, Cheng-Hsiung Huang, Chun-Chieh Huang
  • Patent number: 12228395
    Abstract: Methods and apparatus for substrate position calibration for substrate supports in substrate processing systems are provided herein. In some embodiments, a method for positioning a substrate on a substrate support includes: obtaining a plurality of backside pressure values corresponding to a plurality of different substrate positions on a substrate support by repeatedly placing a substrate in a position on the substrate support, and vacuum chucking the substrate to the substrate support and measuring a backside pressure; and analyzing the plurality of backside pressure values to determine a calibrated substrate position.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: February 18, 2025
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tomoharu Matsushita, Aravind Kamath, Jallepally Ravi, Cheng-Hsiung Tsai, Hiroyuki Takahama
  • Patent number: 12206169
    Abstract: An antenna module includes two antenna units, two isolation members, and a grounding member. Each antenna unit consists of two feeding ends, two first radiators, and two second radiators. The isolating members are disposed between the first and second portions of each antenna unit. The grounding member is disposed beside the two antenna units and the two isolation members. A first slot is formed among each first radiator, the second radiator, and the grounding member. The two second radiators are connected to the third radiator. A third slot is formed between the second radiator and the second portion. The two antenna units are symmetric to the fourth slot in a mirrored manner, and the two first portions have widths gradually changing along an extending direction of the fourth position.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: January 21, 2025
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Cheng-Hsiung Wu, Chia-Hung Chen, Shih-Keng Huang, Hau Yuen Tan, Sheng-Chin Hsu, Tse-Hsuan Wang, Hao-Hsiang Yang
  • Patent number: 12201581
    Abstract: A rotatable fixing structure of a water spray device, the water spray device contains: a housing. The housing includes a base, a cap, and a cavity. The base has a support sheet and a fence. The support sheet has an internal face and an external face. The internal face of the support sheet has a circular post and a wear resistant washer. The external face has a notch, and the cap has at least one inlet and at least one outlet. An impeller is accommodated in the cavity and includes multiple vanes and a receiving orifice for accommodating the circular post. A reinforced heat conductor is accommodated in the notch. The reinforced heat conductor includes a first segment and a second segment. The first segment extends into the circular post over the internal face of the base, and the second segment is exposed outside the external face.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: January 21, 2025
    Assignee: Foresee Scientech Ltd.
    Inventors: Danny Jan, Cheng-Hsiung Chang
  • Publication number: 20250015733
    Abstract: Embodiments of bipolar electrostatic chucks are provided herein. In some embodiments, a bipolar electrostatic chuck, includes: the electrostatic chuck; and a plurality of electrodes disposed in the electrostatic chuck, wherein the plurality of electrodes include a positive electrode arranged in a first pattern comprising a plurality of first arcuate bands coupled together via first connection fingers that extend radially therebetween and a negative electrode arranged in a second pattern comprising a plurality of second arcuate bands coupled together via second connection fingers that extend radially therebetween, wherein the plurality of first arcuate bands are arranged in an alternating pattern with the plurality of second arcuate bands, wherein there is a gap between the first pattern and the second pattern.
    Type: Application
    Filed: July 6, 2023
    Publication date: January 9, 2025
    Inventors: Mukund SUNDARARAJAN, Sarath BABU, Cheng-Hsiung Matthew TSAI, Ananthkrishna JUPUDI, Ross MARSHALL
  • Patent number: 12193166
    Abstract: In one example, the present application describes a Printed Circuit Board (PCB) that mitigates galvanic corrosion during an Organic Solderability Preservative (OSP) process used during fabrication of the PCB. The PCB includes a first metal pattern and a second metal pattern electrically coupled to each other, where the first and second metal patterns are different metals. The first metal pattern has a first area that is exposed by a solder mask layer, and the second metal pattern has a second area that is exposed by the solder mask area. A ratio of the first area to the second area is less than a threshold ratio to mitigate the galvanic corrosion of the second metal pattern exposed on the PCB during the OSP process.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: January 7, 2025
    Assignee: Sandisk Technologies, Inc.
    Inventors: Songtao Lu, Hsiang Ju Huang, Binbin Zheng, Cheng-Hsiung Yang, Chien-Te Chen
  • Patent number: 12165920
    Abstract: A semiconductor structure includes a first metallization feature, a first dielectric structure over the first metallization feature, a second metallization feature embedded in the first dielectric structure, a via structure between the first metallization feature and the second metallization feature, and a first insulating layer between the first dielectric structure and the first metallization feature, and between the first dielectric structure and the via structure. The first metallization feature extends along a first direction, and the second metallization feature extends along a second direction different from the first direction. The first insulating layer covers first sidewalls of the via structure along the second direction.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: December 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hwei-Jay Chu, Chieh-Han Wu, Cheng-Hsiung Tsai, Chung-Ju Lee
  • Patent number: D1070493
    Type: Grant
    Filed: August 30, 2023
    Date of Patent: April 15, 2025
    Assignee: Eternal East (HK) Ltd.
    Inventors: Ching-shun Cheng, Cheng-Hsiung Lin
  • Patent number: D1071886
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: April 22, 2025
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Zhixiu Liang, Michael Sterling Jackson, Jiang Lu, Cheng-Hsiung Matthew Tsai, Tomoharu Matsushita, Zubin Huang