Abstract: An electronic device includes a metal back cover, a metal frame, and two radiators. The metal frame disposed at a side of the metal back cover includes two disconnecting parts, a second slot, and two connecting parts. A first slot is formed between each of the disconnecting parts and the metal back cover. The second slot is formed between the two disconnecting parts. The two connecting parts are connected to a side away from the second slot of the two disconnecting parts respectively and are connected to the metal back cover. Each of the radiators connects the metal back cover to the corresponding disconnecting part over the first slot. The two radiators are disposed symmetrically based on the second slot. Each radiator is coupled with the corresponding disconnecting part, the corresponding connecting part, and the metal back cover to resonate a first, a second, and a third frequency band.

Abstract: A microneedle device includes a substrate and a plurality of microneedle structures. The substrate is provided with a first surface, where the first surface has a surface roughness ranged from 0.05 ?m to 2.0 ?m. The plurality of microneedle structures are configured on the first surface. Because the surface of the microneedle device has a surface roughness of 0.05 ?m to 2.0 ?m, a film can be formed completely.

Abstract: Disclosed are examples related to PCB impedance tuning for wideband operation and acceptance of antenna variation. In one example, a tire monitoring device includes a sensor, RFID circuitry and processing circuitry mounted on a PCB. The RFID circuitry can harvest energy and transmit monitored tire data in response to a received interrogation signal. The RFID circuitry can be tuned to receive interrogation signals in a frequency band from at least 868 MHz to at least 915 MHz to cover both NA and EU applications. Impedance matching of the RFID circuitry can enable operation independent of variations in coil antenna length. In another example, comprises the tire monitoring device and a RFID reader or interrogator.

Abstract: An interconnect structure includes a first conductive feature, a first dielectric layer a first etch stop layer, a second etch stop layer, a second dielectric layer, and a second conductive feature. The first etch stop layer is disposed over the first conductive feature and the first dielectric layer. The second etch stop layer is disposed on the first etch stop layer. The second dielectric layer is disposed on the second etch stop layer. The second conductive feature includes a first conductive layer and a first barrier layer. The first conductive layer extends through the second dielectric layer, the second and the first etch stop layers to contact to the first conductive feature. The first barrier layer is sandwiched between the first conductive layer and the second dielectric layer, the first conductive layer and the second etch stop layer, and between the first conductive layer and the first etch stop layer.

Abstract: A method for forming a semiconductor structure includes following operations. A first metallization feature is formed, and a first cap layer is formed over the first metallization feature. A first insulating layer is formed over the first cap layer and the first metallization feature. A first dielectric structure is formed over the first insulating layer. A portion of the first dielectric structure and a portion of the first insulating layer are removed to expose the first cap layer. A second cap layer is formed over the first cap layer and the first metallization feature. A second insulating layer and a patterned second dielectric structure are formed over the substrate. The patterned second dielectric structure includes a trench and a via opening coupled to a bottom of the trench. A second metallization feature is formed in the trench, and a via structure is formed in the via opening.

Abstract: An improved leak-proof heat dissipation structure of high thermal conductivity materials includes an insulating film layer, a high thermal conductivity thermal interface material layer, a first flexible material composite layer, a second flexible material composite layer and a radiator. The insulating film layer has a film opening at the center. The high thermal conductivity thermal interface material layer has its body close to the heat source and located above the chip body. The first flexible material composite layer is set above the insulating film layer, and has a first opening at the center. The second flexible material composite layer is provided below the insulating film layer, and has a second opening at the center. The radiator is placed on the first flexible material composite layer, and has a boss at the bottom and multiple storage grooves on the boss.

Abstract: A keyboard including a key module is provided. The key module includes a keycap, a rigid modular circuit board and a linkage element. The linkage element is located between the keycap and the modular circuit board. The key module is detachably disposed on the keyboard, so that the key module, either in its entirety or as a part, could be disassembled from or assembled to the keyboard.

Abstract: Methods and apparatus for substrate position calibration for substrate supports in substrate processing systems are provided herein. In some embodiments, a method for positioning a substrate on a substrate support includes: obtaining a plurality of backside pressure values corresponding to a plurality of different substrate positions on a substrate support by repeatedly placing a substrate in a position on the substrate support, and vacuum chucking the substrate to the substrate support and measuring a backside pressure; and analyzing the plurality of backside pressure values to determine a calibrated substrate position.

Abstract: An antenna module includes two antenna units, two isolation members, and a grounding member. Each antenna unit consists of two feeding ends, two first radiators, and two second radiators. The isolating members are disposed between the first and second portions of each antenna unit. The grounding member is disposed beside the two antenna units and the two isolation members. A first slot is formed among each first radiator, the second radiator, and the grounding member. The two second radiators are connected to the third radiator. A third slot is formed between the second radiator and the second portion. The two antenna units are symmetric to the fourth slot in a mirrored manner, and the two first portions have widths gradually changing along an extending direction of the fourth position.

Abstract: A rotatable fixing structure of a water spray device, the water spray device contains: a housing. The housing includes a base, a cap, and a cavity. The base has a support sheet and a fence. The support sheet has an internal face and an external face. The internal face of the support sheet has a circular post and a wear resistant washer. The external face has a notch, and the cap has at least one inlet and at least one outlet. An impeller is accommodated in the cavity and includes multiple vanes and a receiving orifice for accommodating the circular post. A reinforced heat conductor is accommodated in the notch. The reinforced heat conductor includes a first segment and a second segment. The first segment extends into the circular post over the internal face of the base, and the second segment is exposed outside the external face.

Abstract: Embodiments of bipolar electrostatic chucks are provided herein. In some embodiments, a bipolar electrostatic chuck, includes: the electrostatic chuck; and a plurality of electrodes disposed in the electrostatic chuck, wherein the plurality of electrodes include a positive electrode arranged in a first pattern comprising a plurality of first arcuate bands coupled together via first connection fingers that extend radially therebetween and a negative electrode arranged in a second pattern comprising a plurality of second arcuate bands coupled together via second connection fingers that extend radially therebetween, wherein the plurality of first arcuate bands are arranged in an alternating pattern with the plurality of second arcuate bands, wherein there is a gap between the first pattern and the second pattern.

Abstract: In one example, the present application describes a Printed Circuit Board (PCB) that mitigates galvanic corrosion during an Organic Solderability Preservative (OSP) process used during fabrication of the PCB. The PCB includes a first metal pattern and a second metal pattern electrically coupled to each other, where the first and second metal patterns are different metals. The first metal pattern has a first area that is exposed by a solder mask layer, and the second metal pattern has a second area that is exposed by the solder mask area. A ratio of the first area to the second area is less than a threshold ratio to mitigate the galvanic corrosion of the second metal pattern exposed on the PCB during the OSP process.

Abstract: A semiconductor structure includes a first metallization feature, a first dielectric structure over the first metallization feature, a second metallization feature embedded in the first dielectric structure, a via structure between the first metallization feature and the second metallization feature, and a first insulating layer between the first dielectric structure and the first metallization feature, and between the first dielectric structure and the via structure. The first metallization feature extends along a first direction, and the second metallization feature extends along a second direction different from the first direction. The first insulating layer covers first sidewalls of the via structure along the second direction.

Abstract: A semiconductor structure includes a first metallization feature, a first dielectric structure over the first metallization feature, a second metallization feature embedded in the first dielectric structure, a via structure between the first metallization feature and the second metallization feature, and a first insulating layer between the first dielectric structure and the first metallization feature, and between the first dielectric structure and the via structure. The first metallization feature extends along a first direction, and the second metallization feature extends along a second direction different from the first direction. The first insulating layer covers first sidewalls of the via structure along the second direction.

Abstract: A method includes forming a gate stack on a first portion of a semiconductor fin, removing a second portion of the semiconductor fin to form a recess, and forming a source/drain region starting from the recess. The formation of the source/drain region includes performing a first epitaxy process to grow a first semiconductor layer, wherein the first semiconductor layer has straight-and-vertical edges, and performing a second epitaxy process to grow a second semiconductor layer on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer are of a same conductivity type.

Abstract: Interconnect structures and methods of forming the same are provided. An interconnect structure according to the present disclosure includes a conductive line feature over a substrate, a conductive etch stop layer over the conductive line feature, a contact via over the conductive etch stop layer, and a barrier layer disposed along a sidewall of the conductive line feature, a sidewall of the conductive etch stop layer, and a sidewall of the contact via.

Abstract: A puncture resistant pneumatic tire may include a puncture resistant layer and a barrier layer. The puncture resistant layer may have a percent elongation of up to 300% and a tack value with the carcass of about 5 N to about 50 N at normal inflation pressure.

Abstract: A circuit board structure includes a circuit substrate, a first circuit layer, and a second circuit layer. The circuit substrate has a surface and includes at least one conductive structure and at least one patterned circuit layer. The conductive structure is electrically connected to the patterned circuit layer, and an upper surface of the conductive structure is aligned with the surface. The first circuit layer is directly disposed on the surface of the circuit substrate and electrically connected to the conductive structure. A line width of the first circuit layer is less than or equal to 1/4 of a line width of the patterned circuit layer. The second circuit layer is directly disposed on the first circuit layer and electrically connected to the first circuit layer.