Abstract: This disclosure provides a display apparatus which includes a substrate, first TFTs, scan lines and data lines connected to the first TFTs, and second TFTs for controlling inspection-use display signals; wherein each of the second TFTs includes: a first gate electrode disposed on the substrate; a first insulation layer disposed on the first gate electrode; an active unit disposed on the first insulation layer and having a source electrode electrically connected to one of the data lines, an active layer including an oxide semiconductor, and a drain electrode; a second insulation layer disposed on the active unit; and a second gate electrode disposed on the second insulation layer; wherein the first TFTs, the scan lines, and the data lines are disposed in a display area on the substrate, and the second TFTs are disposed in an area other than the display area on the substrate.

Abstract: A display device includes a substrate, a thin film transistor unit disposed on the substrate, and a shielding unit disposed between the substrate and the thin film transistor unit. The thin film transistor unit includes a gate, an insulating layer, a semiconductor layer, a source, and a drain. The shielding unit includes a shielding layer and a first buffer layer. The first buffer layer is disposed between the shielding layer and the thin film transistor. Light with a wavelength of 200 nm to 510 nm has a transmittance between 0 to 15% when passing through the shielding layer.

Abstract: A display device includes a first substrate, a second substrate, a connecting element and a display medium. The first and second substrates are disposed opposite to each other, and the connecting element is disposed between the first and second substrates. An accommodating space is formed between the first substrate, the second substrate and the connecting element, and the display medium is disposed in the accommodating space. The connecting element has a first sealing layer, a second sealing layer and an adhesive layer. The first and second sealing layers are departed or partially connected. The second sealing layer is disposed adjacent to the accommodating space. The adhesive layer is disposed between the first and second sealing layers. The adhesive layer includes a water-resisting material.

Abstract: An OLED display panel is disclosed, which comprises: a substrate; an OLED unit disposed on the substrate; and an inorganic-DLC composite layer comprising a first inorganic layer and a first DLC layer, wherein the first inorganic layer and the first DLC layer sequentially laminate on the OLED unit, and the first inorganic layer locates between the OLED unit and the first DLC layer. Herein, a ratio of a thickness of the first inorganic layer to that of the first DLC layer is in a range from 50 to 500.

Abstract: An organic light-emitting diode (OLED) display is provided. A pixel array includes a plurality of pixels, wherein the pixel includes an emitting device and a driving transistor. A first gate of the driving transistor receives a driving signal, and a second gate of the driving transistor receives a compensation signal. A gate driving circuit provides the compensation signal according to a total current value flowing through the emitting devices of the pixels. When the total current value is between a first reference value and a second reference value, the gate driving circuit adjusts a voltage level of the compensation signal according to the total current value. The first reference value is 90% of a target current value, and the second reference value is 50% of a target current value.

Abstract: This disclosure provides a display apparatus which includes a substrate, first TFTs, scan lines and data lines connected to the first TFTs, and second TFTs for controlling inspection-use display signals; wherein each of the second TFTs includes: a first gate electrode disposed on the substrate; a first insulation layer disposed on the first gate electrode; an active unit disposed on the first insulation layer and having a source electrode electrically connected to one of the data lines, an active layer including an oxide semiconductor, and a drain electrode; a second insulation layer disposed on the active unit; and a second gate electrode disposed on the second insulation layer; wherein the first TFTs, the scan lines, and the data lines are disposed in a display area on the substrate, and the second TFTs are disposed in an area other than the display area on the substrate.

Abstract: A display driving method comprises the steps of: determining a first target-level voltage and a second target-level voltage of a signal of the scan line; determining a first switch time and a second switch time according to an RC loading of the scan line; determining at least one first precharge-level voltage and at least one second precharge-level voltage according to the first target-level voltage, the second target-level voltage, the first switch time, and the second switch time; and outputting the first precharge-level voltage, the first target-level voltage, the second precharge-level voltage, and the second target-level voltage to drive the display panel, wherein the first precharge-level voltage is switched to the first target-level voltage after the first switch time, and the second precharge-level voltage is switched to the second target-level voltage after the second switch time.

Abstract: The disclosure provides an organic light-emitting device. The organic light-emitting device includes a substrate, and an organic light-emitting pixel array disposed on the substrate. The organic light-emitting pixel array includes a plurality of pixels. Each pixel includes a first sub-pixel and a second sub-pixel. Each sub-pixel includes a first electrode, an organic light-emitting element, a second electrode, and an optical path adjustment layer. The optical path adjustment layer is disposed between the first electrode and the second electrode. Particularly, the thickness of the optical path adjustment layer of the first sub-pixel is substantially equal to the thickness of the optical path adjustment layer of the second sub-pixel.

Abstract: An active matrix image sensing panel comprises a substrate and an image sensing pixel. The image sensing pixel is disposed on the substrate and comprises a scan line, a data line crossing the scan line, a photo sensing element and a TFT element. The photo sensing element includes a first terminal electrode and a second terminal electrode, and the voltage of the first terminal electrode is higher than that of the second terminal electrode. The TFT element includes a first electrode, a second electrode, a first gate electrode and a second gate electrode. The first electrode is electrically connected to the data line, the second electrode is electrically connected to the first terminal electrode, the first gate electrode is electrically connected to the scan line, and the second gate electrode is electrically connected to the first or second terminal electrode. An active matrix image sensing apparatus is also disclosed.

Abstract: A thin-film transistor (TFT) device comprises a gate, a source, a drain, an insulation layer and an active area. The insulation layer electrically separates the gate from the source and the drain. The active area including a plurality of contacting areas contacting the source and the drain, respectively, and generates a channel including a channel width and a channel length. The active area includes a semiconductor material and has a plurality of active-area edges. In the direction parallel to the channel width, a distance between at least a contacting-area edge of the contacting areas and the active-area edge of the active area that is near to the contacting-area edge is larger than 2.5 ?m and less than or equal to 16 ?m. A TFT display apparatus is also disclosed.

Abstract: Disclosed is a method of forming array substrates having a peripheral wiring area and a display area. The method is processed by only three lithography processes with two multi-tone photomasks and one general photomask. In the peripheral wiring area, the top conductive line directly contacts the bottom conductive line without any other conductive layer. The conventional lift-off process is eliminated, thereby preventing a material (not dissolved by a stripper) from suspending in the stripper or remaining on the array substrate surface.

Abstract: Disclosed is a method of forming array substrates having a peripheral wiring area and a display area. The method is processed by only three lithography processes with two multi-tone photomasks and one general photomask. In the peripheral wiring area, the top conductive line directly contacts the bottom conductive line without any other conductive layer. The conventional lift-off process is eliminated, thereby preventing a material (not dissolved by a stripper) from suspending in the stripper or remaining on the array substrate surface.

Abstract: A touch sensing unit includes a detection electrode, a switch and a boosting and discharging unit. The detection electrode detects the touch from an external object. The switch is connected to the detection electrode for generating a touch voltage. The boosting and discharging unit is connected to the detection electrode and the switch for discharging the detection electrode or boosting the voltage of the detection electrode.

Abstract: A thin film transistor substrate includes a substrate and a plurality of thin film transistors. The thin film transistor includes a first electrode layer, a first insulating layer, an oxide semiconductor layer, a second electrode layer and a second insulating layer. The first electrode layer with gate portions is formed on the substrate. The first insulating layer covers the first electrode layer. The oxide semiconductor layer is formed on the first insulating layer, and the oxide semiconductor layer comprises a first boundary. The second electrode layer with drain portions and source portions is formed on the oxide semiconductor layer, wherein the drain portion and the corresponding source are corresponding gate portion, and the drain portion comprises a second boundary. The second insulating layer covers the oxide semiconductor layer and the second electrode layer. The second boundary is within the first boundary. The second electrode layer includes copper.

Abstract: A display driving method comprises the steps of: determining a first target-level voltage and a second target-level voltage of a signal of the scan line; determining a first switch time and a second switch time according to an RC loading of the scan line; determining at least one first precharge-level voltage and at least one second precharge-level voltage according to the first target-level voltage, the second target-level voltage, the first switch time, and the second switch time; and outputting the first precharge-level voltage, the first target-level voltage, the second precharge-level voltage, and the second target-level voltage to drive the display panel, wherein the first precharge-level voltage is switched to the first target-level voltage after the first switch time, and the second precharge-level voltage is switched to the second target-level voltage after the second switch time.

Abstract: Disclosed is a patterned photoresist layer on a passivation layer, formed by a lithography process with a multi-tone photomask, having a non-photoresist region, a thin photoresist pattern, and a thick photoresist pattern. The passivation layer corresponding to the non-photoresist region is removed, thereby forming vias to expose a part of a drain electrode in a TFT and a part of a top electrode in a storage capacitor, respectively. The thin photoresist pattern is then ashed to expose the passivation layer in a pixel region. Thereafter, a conductive layer is selectively deposited on the exposed passivation layer and on the sidewalls/bottoms of the vias. Subsequently, the remaining thick photoresist pattern is ashed.

Abstract: Disclosed is a patterned photoresist layer on a passivation layer, formed by a lithography process with a multi-tone photomask, having a non-photoresist region, a thin photoresist pattern, and a thick photoresist pattern. The passivation layer corresponding to the non-photoresist region is removed, thereby forming vias to expose a part of a drain electrode in a TFT and a part of a top electrode in a storage capacitor, respectively. The thin photoresist pattern is then ashed to expose the passivation layer in a pixel region. Thereafter, a conductive layer is selectively deposited on the exposed passivation layer and on the sidewalls/bottoms of the vias. Subsequently, the remaining thick photoresist pattern is ashed.

Abstract: Disclosed is a method of forming array substrates having a peripheral wiring area and a display area. The method is processed by only three lithography processes with two multi-tone photomasks and one general photomask. In the peripheral wiring area, the top conductive line directly contacts the bottom conductive line without any other conductive layer. The conventional lift-off process is eliminated, thereby preventing a material (not dissolved by a stripper) from suspending in the stripper or remaining on the array substrate surface.