Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.

Abstract: A power device includes a substrate, an ion well in the substrate, a body region in the ion well, a source doped region in the body region, a drain doped region in the ion well, and gates on the substrate between the source doped region and the drain doped region. The gates include a first gate adjacent to the source doped region, a second gate adjacent to the drain doped region, and a stacked gate structure between the first gate and the second gate.

Abstract: A far infrared (FIR)-emitting composition includes a first polymer component and a silicon dioxide composite particle which is prepared by subjecting a tetraalkoxysilane and a compound represented by Formula (A) to hydrolysis and condensation polymerization: Y—Si(ORa)3??(A), wherein each Ra independently represents a C1-4 alkyl group or a C1-4 alkanoyl group, Y represents X—R1—, a non-substituted C1-18 linear alkyl group or a non-substituted C3-18 branched alkyl group, and X and R1 are defined as set forth in the Specification and Claims. A FIR-emitting fiber including the FIR-emitting composition is also disclosed.

Abstract: The disclosure provides a quantum device and a microwave device. The quantum device includes a first partition, a second partition, an upper circuit board, a lower circuit board and a flexible circuit. The second partition is arranged below the first partition. The first partition and the second partition are used to define an ultra-low temperature chamber of the quantum device. The upper circuit board, the lower circuit board and the flexible circuit are arranged in the ultra-low temperature chamber. The upper circuit board is disposed on a lower surface of the first partition. The lower circuit board is disposed on an upper surface of the second partition. The flexible circuit is electrically connected between the upper circuit board and the lower circuit board to provide multiple signal paths for mutual signal transmission between the upper circuit board and the lower circuit board.

Abstract: A power metal-oxide-semiconductor structure includes a semiconductor substrate, a gate electrode disposed above the semiconductor substrate, a field plate, and an electrically conductive pattern. The gate electrode and the field plate are disposed above the semiconductor substrate, the electrically conductive pattern is disposed between the field plate and the semiconductor substrate in a vertical direction, and the field plate and the electrically conductive pattern are located at the same side of the gate electrode in a horizontal direction. A manufacturing method of a power metal-oxide-semiconductor structure includes the following steps. The electrically conductive pattern and the field plate are formed above a first region of the semiconductor substrate. Subsequently, the gate electrode is formed above the first region of the semiconductor substrate.

Abstract: A computing device includes a processor and a medium storing instructions. The instructions are executable by the processor to: identify, based on a blob detection analysis, a plurality of potential input elements in a graphical user interface (GUI); determine a set of rows including potential input elements that are in a horizontal alignment and in a same size range; determine a set of columns including potential input elements that are in a vertical alignment and in a same size range; determine a set of input elements comprising multiple potential input elements that are located at intersections of the identified set of rows and the identified set of columns; and perform automated testing of the GUI using the determined set of input elements.

Abstract: A method for generating a traffic event video includes the following. Map alignment of a set of moving trajectory coordinates corresponding to a moving video with an electronic map is performed, and a set of trajectory map information corresponding to the moving trajectory coordinates is obtained from the electronic map. At least one event map information conforming to an event trajectory model from the set of trajectory map information and a plurality of image frame information of the moving video corresponding to the image frame information of the trajectory map information are obtained, and a plurality of location information of a virtual object is generated according to the event trajectory model. A video segment is extracted from the moving video based on the image frame information, and the virtual object and the video segment are synthesized based on the location information to generate a traffic event video corresponding to the event trajectory model.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.

Abstract: A light-transmitting antenna includes a substrate, a first and a second conductive pattern. The first and the second conductive pattern is disposed on a first and a second surface of the substrate respectively. The first conductive pattern includes a first feeder unit, a first and a second radiation unit, a first and a second coupling unit and a first parasitic unit. The first feeder unit is connected to the second radiation unit. The first and the second radiation unit are located between the first and the second coupling unit. One side and the other side of the first parasitic unit is connected to the second coupling unit and adjacent to the first coupling unit respectively. The second conductive pattern includes a second feeder unit, a third coupling unit, a second parasitic unit, and a fourth coupling unit.

Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a gate strip, a source doped region and a body doped region. The substrate has an active region. The gate strip is disposed on the substrate within the active region. The gate strip extends along a first direction. The source doped region is located in the active region and adjacent to a first side of the gate strip along the first direction. The body doped region is located in the active region and adjacent to the first side of the gate strip. The body doped region and the source doped region have opposite conductivity types. The body doped region has a first length along a second direction that is different from the first direction, wherein the first length gradually changes along the first direction.

Abstract: An integrated circuit (IC) structure includes a fin structure protruding from a semiconductor substrate, the fin structure including a first portion having a first width, a second portion having a second width that is different from the first width, and a third portion extending continuously along a first direction over the semiconductor substrate, the first width and the second width being measured along a second direction perpendicular to the first direction. The IC structure also includes a first standard cell including a first metal gate stack engaged with the first portion, a second standard cell including a second metal gate stack engaged with the second portion, and a filler cell disposed between the first standard cell and the second standard cell, where the filler cell includes the third portion that connects the first portion to the second portion.

Abstract: An integrated vapor chamber includes an outer shell and a plurality of composite capillary structures. The outer shell includes a flat casing and a plurality of partitions integrally formed. The flat shell includes a chamber, and the partitions are disposed in the chamber to separate the chamber into a plurality of flow channels. Each composite capillary structure is extended along each flow channel and distributed in the chamber. The composite capillary structure includes a metal mesh and a plurality of sintered powder uniformly sintered in the metal mesh. Furthermore, this disclosure also discloses a manufacturing method of the integrated vapor chamber. Therefore, the manufacturing method of the thin vapor chamber is simplified to improve the yield rate.

Abstract: An overlay mark includes a bottom overlay mark on a bottom level, a middle overlay mark on a middle level, and a top overlay mark on a top level. The bottom overlay mark, the middle overlay mark and the top overlay mark vertically overlap with one another.

Abstract: The present invention relates to a silicon dioxide composite particle with far-infrared radioactivity, which is formed by the hydrolysis, condensation and polymerization of an organic silane precursor having the structure of the formula (I) with a tetra-alkoxysilane. The high stability of organic silane precursor compounds and the low biotoxicity of silicon dioxide composite particles make the present far-infrared radioactive silicon dioxide composite particles of great potential for extensive use in related bio-products.

Abstract: A method performed by a computer system includes: searching leakage current values of associated with cell abutment cases which are associated with terminal types of abutted cells of a semiconductor device; determining leakage probabilities according to the cell abutment cases; calculating expected boundary leakages between the abutted cells based on the leakage probabilities and the leakage current values; and generating a layout of the semiconductor device according to the expected boundary leakages. Two of the leakage probabilities correspond to two of the cell abutment cases, respectively, and the two of the leakage probabilities are different from each other when the two of the cell abutment cases are different from each other.

Abstract: A portable computing device may comprise an internal central processing unit (CPU), an internal graphics processing unit (GPU), a communications port to communicate with an external computing device, a first electronic display connected to the internal GPU, a second electronic display connected to the internal GPU, a touch input device to receive touch inputs from a user, and a display mode control unit. The control unit may cause the portable computing device to selectively operate in a dual display operational mode, a direct input operational mode, and an indirect input operational mode.

Abstract: A power device includes a substrate, an ion well in the substrate, a body region in the ion well, a source doped region in the body region, a drain doped region in the ion well, and gates on the substrate between the source doped region and the drain doped region. The gates include a first gate adjacent to the source doped region, a second gate adjacent to the drain doped region, and a stacked gate structure between the first gate and the second gate.

Abstract: A system includes a library, a processor and an output interface. The library contains at least one leakage lookup table related to leakage current values for different cell abutment cases of abutted cells in a semiconductor device. The cell abutment cases are associated with terminal types of cell edges of the abutted cells. The processor is configured to perform an analysis to detect boundaries between the abutted cells, identify attributes associated with the terminal types of the cell edges, identify the cell abutment cases based on the attributes, and calculate maximal boundary leakages between the abutted cells based on leakage current values associated with the cell abutment cases and leakage probabilities associated with the cell abutment cases. The output interface is for outputting boundary leakages corresponding to the maximal boundary leakages in the semiconductor device. A method is also disclosed herein.

Abstract: A method includes: identifying attributes that are associated with cell edges of abutted cells in a layout of a semiconductor device, wherein the attributes include at least one of terminal types of the cell edges; determining at least one minimal boundary leakage of the abutted cells based on the attributes, for adjustment of the layout of the semiconductor device. A system is also disclosed herein.