Abstract: A MOS transistor structure is provided. The MOS transistor structure includes a semiconductor substrate having an active area including a first edge and a second edge opposite thereto. A gate layer is disposed on the active area of the semiconductor substrate and has a first edge extending across the first and second edges of the active area. A source region having a first conductivity type is in the active area at a side of the first edge of the gate layer and between the first and second edges of the active area. First and second heavily doped regions of a second conductivity type are in the active area adjacent to the first and second edges thereof, respectively, and spaced apart from each other by the source region.

Abstract: An integrated vapor chamber includes an outer shell and a plurality of composite capillary structures. The outer shell includes a flat casing and a plurality of partitions integrally formed. The flat shell includes a chamber, and the partitions are disposed in the chamber to separate the chamber into a plurality of flow channels. Each composite capillary structure is extended along each flow channel and distributed in the chamber. The composite capillary structure includes a metal mesh and a plurality of sintered powder uniformly sintered in the metal mesh. Furthermore, this disclosure also discloses a manufacturing method of the integrated vapor chamber. Therefore, the manufacturing method of the thin vapor chamber is simplified to improve the yield rate.

Abstract: A technique includes receiving, by a computer, user input representing creation of a first programmatic description of a first test object of source code to be tested. The technique includes, in response to receiving the user input, determining, by the computer, based on other programmatic descriptions of other test objects, a recommendation of a parameter to be used in the first programmatic description to identify the first test object. The technique includes causing, by the computer, a display of the recommendation.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.

Abstract: A capacitor structure includes a first comb-shaped electrode, a second comb-shaped electrode, a bottom electrode, an insulator layer, and a top electrode. The first comb-shaped electrode has a first pad and first fingers connecting to the first pad. The second comb-shaped electrode has a second pad and second fingers connecting to the first pad, wherein one of the second fingers is disposed between two adjacent first fingers. The bottom electrode includes a first portion, a second portion and a third portion which are spaced apart, wherein the first portion and the third portion are electrically coupled to the first comb-shaped electrode and the second comb-shaped electrode, respectively. The insulator layer is disposed over the bottom electrode. The top electrode is disposed over the insulator layer.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.

Abstract: Examples of nibs for styluses are described. In an example, the nib is made of a base material (for example, a polyamide or a polycarbonate), a conductive material (for example, carbon fiber), and a grey color controlling material (for example, a white powder). The base material is in a range of 70 weight percentage (wt %) to 75 wt %. The conductive material is in a range of 15 wt % to 20 wt %. The grey color controlling material in a range of 5 wt % to 10 wt %.

Abstract: The invention provides a laser shock processing method for small-hole component with different thickness. In this method, different process parameters are adopted for laser shock processing of small hole members with different thicknesses, and the empirical formula was obtained by statistical analysis of the experimental results, and the empirical formula I 0 = A ? e t B ? ? s 2 Z is the relationship between power density and thickness of small hole members. According to this formula, the power density of laser shock strengthening of orifice member with different thickness is determined, and the selection and determination method of process parameters related to this is put forward. According to this method, reasonable residual compressive stress distribution can be obtained after laser shock strengthening with appropriate technology, and good strengthening effect can be achieved.

Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, a polysilicon resistive structure, dummy polysilicon resistive structures, and a polysilicon ring structure. The semiconductor substrate has an active region and a passive region adjacent to the active region. The polysilicon resistive structure is disposed on an isolation structure in the passive region. The dummy polysilicon resistive structures are disposed on the isolation structure, respectively disposed outside opposite sides of the polysilicon resistive structure. The polysilicon ring structure is disposed on the isolation structure, encircling the polysilicon resistive structure and the dummy polysilicon resistive structures.

Abstract: The present disclosure provides a training device and a utilizing method thereof. The training device includes a main assembly and a first attachment assembly. The main assembly includes a housing and a driving component. The driving component is disposed in the housing. The first attachment assembly includes a first rod and a first attachment component. An end of the first rod is connected to the driving component. The driving component drives the first rod to rotate. The first attachment component is disposed on the first rod and attaches to a user.

Abstract: A semiconductor device includes a semiconductor substrate having a well region and a gate structure formed over the well region of the semiconductor substrate. The semiconductor device also includes a gate spacer structure having a first spacer portion and a second spacer portion on opposite sidewalls of the gate structure. The semiconductor device also includes a source region and a drain region formed in the semiconductor substrate. The source region and a drain region are separated from the gate structure. The source region is adjacent to the first spacer portion of the gate spacer structure, and the drain region is adjacent to the second spacer portion of the gate spacer structure. The bottom width of the second spacer portion is greater than the bottom width of the first spacer portion.

Abstract: A portable computing device may comprise an internal central processing unit (CPU), an internal graphics processing unit (GPU), a communications port to communicate with an external computing device, a first electronic display connected to the internal GPU, a second electronic display connected to the internal GPU, a touch input device to receive touch inputs from a user, and a display mode control unit. The control unit may cause the portable computing device to selectively operate in a dual display operational mode, a direct input operational mode, and an indirect input operational mode.

Abstract: A far infrared (FIR)-emitting composition includes a first polymer component and a silicon dioxide composite particle which is prepared by subjecting a tetraalkoxysilane and a compound represented by Formula (A) to hydrolysis and condensation polymerization: Y—Si(ORa)3??(A), wherein each Ra independently represents a C1-4 alkyl group or a C1-4 alkanoyl group, Y represents X—R1—, a non-substituted C1-18 linear alkyl group or a non-substituted C3-18 branched alkyl group, and X and R1 are defined as set forth in the Specification and Claims. A FIR-emitting fiber including the FIR-emitting composition is also disclosed.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, a first oxide layer, a field plate, and a second oxide layer. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure respectively. The first oxide layer includes a first portion disposed between the gate structure and the semiconductor substrate and a second portion disposed between the gate structure and the drain region. The field plate is partly disposed above the gate structure and partly disposed above the second portion of the first oxide layer. The second oxide layer includes a first portion disposed between the field plate and the gate structure and a second portion disposed between the field plate and the second portion of the first oxide layer.

Abstract: The present invention provides an automated optical inspection and classification apparatus based on a deep learning system, comprising a camera and a processor. The processor executes a deep learning system after loading data from a storage unit and the processor, and comprises an input layer, a neural network layer group, and a fully connected-layer group. The neural network layer group is for extracting to an input image and thereby obtaining a plurality of image features. The fully connected-layer group is for performing weight-based classification and outputting an inspection result.

Abstract: A lighting system may include a light guide to receive light from a light source; and a reflector plate including a frustrum structure formed on the surface of the reflector plate to receive refracted light from the light guide.

Abstract: A portable computing device may comprise an internal central processing unit (CPU), an internal graphics processing unit (GPU), a communications port to communicate with an external computing device, a first electronic display connected to the internal GPU, a second electronic display connected to the internal GPU, a touch input device to receive touch inputs from a user, and a display mode control unit. The control unit may cause the portable computing device to selectively operate in a dual display operational mode, a direct input operational mode, and an indirect input operational mode.

Abstract: In some examples, a pixel comprises a plurality of subpixels, wherein each subpixel includes a micro-motor, a rotatable substrate in which the micro-motor is embedded, and a plurality of micro-light emitting diodes (LEDs) embedded in the rotatable substrate.

Abstract: A pill cutter has a base, a clamping assembly, a connecting unit, a cover, and a cutting assembly. The clamping assembly has two first clamping units moveably mounted on the base. The connecting unit has a base end moveably mounted on the base and a cover end pivotally mounted on the cover. The cutting assembly has a pressing unit moveably mounted on the cover and a blade securely mounted on the pressing unit. When the cover is opened, the connecting unit moves along with the cover and pulls the two first clamping units away from each other. When the cover is closed, the two first clamping units move toward each other by springs to stably clamp a pill in any shape or size. Therefore, a user can simply press the pressing unit to move the blade to safely cut the clamped pill.

Abstract: A semiconductor device includes a semiconductor substrate having a well region and a gate structure formed over the well region of the semiconductor substrate. The gate structure has a first sidewall and a second sidewall. The second sidewall is opposite the first sidewall. The semiconductor device also includes a gate spacer structure having two asymmetrical portions. One of the asymmetrical portions is formed on the first sidewall of the gate structure, and the other asymmetrical portion is formed on the second sidewall of the gate structure. The semiconductor device includes a source region and a drain region formed in the semiconductor substrate and aligned with the outer edges of the asymmetrical portions of the gate spacer structure. In some embodiments, the lateral distance between the drain region and the gate structure is greater than the lateral distance between the source region and the gate structure.