Patents by Inventor Cheng-Hua Tsai

Cheng-Hua Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120656
    Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 11, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Meng-Hsuan Chen, Cheng-Hua Tsai, Mei-Ju Lee, Ruo-Lan Chang, Wei-Chung Chen
  • Patent number: 11953740
    Abstract: A package structure including a photonic, an electronic die, an encapsulant and a waveguide is provided. The photonic die includes an optical coupler. The electronic die is electrically coupled to the photonic die. The encapsulant laterally encapsulates the photonic die and the electronic die. The waveguide is disposed over the encapsulant and includes an upper surface facing away from the encapsulant. The waveguide includes a first end portion and a second end portion, the first end portion is optically coupled to the optical coupler, and the second end portion has a groove on the upper surface.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Publication number: 20240113071
    Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
  • Patent number: 11947173
    Abstract: A package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler; an interconnect structure over the photonic layer; an electronic die and a first dielectric layer over the interconnect structure, where the electronic die is connected to the interconnect structure; a first substrate bonded to the electronic die and the first dielectric layer; a socket attached to a top surface of the first substrate; and a fiber holder coupled to the first substrate through the socket, where the fiber holder includes a prism that re-orients an optical path of an optical signal.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ming Weng, Chen-Hua Yu, Chung-Shi Liu, Hao-Yi Tsai, Cheng-Chieh Hsieh, Hung-Yi Kuo, Tsung-Yuan Yu, Hua-Kuei Lin, Che-Hsiang Hsu
  • Patent number: 11942376
    Abstract: Methods of manufacturing a semiconductor structure are provided. One of the methods includes: receiving a substrate including a first conductive region of a first transistor and a second conductive region of a second transistor, wherein the first transistor and the second transistor have different conductive types; performing an amorphization on the first conductive region and the second conductive region; performing an implantation over the first conductive region of the first transistor; forming a contact material layer over the first conductive region and the second conductive region; performing a thermal anneal on the first conductive region and the second conductive region; and performing a laser anneal on the first conductive region and the second conductive region.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun Hsiung Tsai, Cheng-Yi Peng, Ching-Hua Lee, Chung-Cheng Wu, Clement Hsingjen Wann
  • Patent number: 11942451
    Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Yu-Chia Lai, Cheng-Shiuan Wong, Ting Hao Kuo, Ching-Hua Hsieh, Hao-Yi Tsai, Kuo-Lung Pan, Hsiu-Jen Lin
  • Publication number: 20240076422
    Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Inventors: Jing-Cherng TSAI, Jen-Long WU, Wen-Hao KANG, Kuei-Pin LIN, Jing-Yu LEE, Jun-Ye HONG, Zih-Yu SHIH, Cheng-Hung CHIANG, Gang-Wei SHEN, Yu-Chuan SUNG, Chung-Hua WENG, Hsing-Ya CHEN
  • Patent number: 11228194
    Abstract: A motherboard having a smart charging function is provided. A connection interface is configured to an electrical device. A first controller is coupled to the switching circuit and communicates with the electrical device via a first transmission path. A second controller is coupled to the switching circuit and communicates with the electrical device via a second transmission path. In a standard charge mode, the first transmission path is turned on and the first controller directs a voltage converter circuit to generate first charge power to the electrical device. In a fast charge mode, the first controller determines whether the electrical device has a specific operating system. Responsive to determining that the electrical device does not have the specific operating system, the second transmission path is turned on and the second controller directs the voltage converter circuit to generate second charge power to the electrical device.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: January 18, 2022
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD
    Inventors: Yuan-Chieh Chen, Chin-Hui Chen, Cheng-Hua Tsai, Ko-Hui Lin
  • Patent number: 11088557
    Abstract: A motherboard having a charging function is provided. A connection interface is configured to an electrical device. A first controller communicates with the electrical device via a first transmission path. A second controller communicates with the electrical device via a second transmission path. In a first mode, the first controller directs a voltage converter circuit to generate first charge power to the electrical device. In a second mode, the second controller directs the voltage converter circuit to generate second charge power to the electrical device. In a third mode, the first controller determines whether the electrical device is a specific device. Responsive to the electrical device not being the specific device, the voltage converter circuit generates third charge power to the electrical device. Responsive to the electrical device being the specific device, the voltage converter circuit generates fourth charge power to the electrical device.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: August 10, 2021
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Yuan-Chieh Chen, Chin-Hui Chen, Cheng-Hua Tsai, Ko-Hui Lin
  • Publication number: 20200052496
    Abstract: A motherboard having a smart charging function is provided. A connection interface is configured to an electrical device. A first controller is coupled to the switching circuit and communicates with the electrical device via a first transmission path. A second controller is coupled to the switching circuit and communicates with the electrical device via a second transmission path. In a standard charge mode, the first transmission path is turned on and the first controller directs a voltage converter circuit to generate first charge power to the electrical device. In a fast charge mode, the first controller determines whether the electrical device has a specific operating system. Responsive to determining that the electrical device does not have the specific operating system, the second transmission path is turned on and the second controller directs the voltage converter circuit to generate second charge power to the electrical device.
    Type: Application
    Filed: March 18, 2019
    Publication date: February 13, 2020
    Applicant: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Yuan-Chieh CHEN, Chin-Hui CHEN, Cheng-Hua TSAI, Ko-Hui LIN
  • Publication number: 20200052495
    Abstract: A motherboard having a charging function is provided. A connection interface is configured to an electrical device. A first controller communicates with the electrical device via a first transmission path. A second controller communicates with the electrical device via a second transmission path. In a first mode, the first controller directs a voltage converter circuit to generate first charge power to the electrical device. In a second mode, the second controller directs the voltage converter circuit to generate second charge power to the electrical device. In a third mode, the first controller determines whether the electrical device is a specific device. Responsive to the electrical device not being the specific device, the voltage converter circuit generates third charge power to the electrical device. Responsive to the electrical device being the specific device, the voltage converter circuit generates fourth charge power to the electrical device.
    Type: Application
    Filed: March 4, 2019
    Publication date: February 13, 2020
    Applicant: GIGA-BYTE TECHNOLOGY CO.,LTD.
    Inventors: Yuan-Chieh CHEN, Chin-Hui CHEN, Cheng-Hua TSAI, Ko-Hui LIN
  • Patent number: 9941226
    Abstract: An integrated millimeter-wave chip package structure including an interposer structure, a millimeter-wave chip and a substrate is provided. The interposer structure includes at least an antenna pattern and at least a plated through-hole structure penetrating through the interposer structure and connected to the at least one antenna pattern. The millimeter-wave chip is electrically connected to the at least antenna pattern located either above or below the millimeter-wave chip through the at least plated through-hole structure.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: April 10, 2018
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Hua Tsai, Shyh-Jong Chung, Ching-Kuan Lee
  • Publication number: 20160172317
    Abstract: An integrated millimeter-wave chip package structure including an interposer structure, a millimeter-wave chip and a substrate is provided. The interposer structure includes at least an antenna pattern and at least a plated through-hole structure penetrating through the interposer structure and connected to the at least one antenna pattern. The millimeter-wave chip is electrically connected to the at least antenna pattern located either above or below the millimeter-wave chip through the at least plated through-hole structure.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 16, 2016
    Inventors: Cheng-Hua Tsai, Shyh-Jong Chung, Ching-Kuan Lee
  • Patent number: 9331030
    Abstract: An integrated antenna package including a laminated structure and a multi-layered substrate is provided. The laminated structure includes at least a chip embedded therein and at least a plated through-hole structure penetrating the laminated structure. The multi-layered substrate is stacked on the laminated structure. The multi-layered substrate includes at least a metal layer located on one side of the multi-layered substrate away from the laminated structure and the metal layer includes at least an antenna pattern located above the chip. The multi-layered substrate includes at least a plated via and through-hole structure penetrating the multi-layered substrate and electrically connected to the chip, so that the antenna pattern is electrically connect with the chip. Also, the manufacturing method of the integrated antenna package is provided.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: May 3, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Hua Tsai, Shyh-Jong Chung
  • Patent number: 8783579
    Abstract: An RFID sealing device for a bottle is disclosed, which provides information of production resumes, stock control, sale control and so like, where the information may be adapted for a computerized foods management system for the upstream manufacturer and the downstream sellers. Since the metal cap plays a part in the RFID sealing device, the RFID shall malfunction once the bottle cap has been turned or opened before sale, so that the present RFID sealing device plays a function of safety identifier to the bottled liquid or food in addition.
    Type: Grant
    Filed: July 4, 2012
    Date of Patent: July 22, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Li-Chi Chang, Yung-Chung Chang, Chang-Chih Liu, Cheng-Hua Tsai, Meng-Sheng Chen
  • Patent number: 8686821
    Abstract: An inductor structure including a plurality of solenoids and at least one connecting line is provided. One of the solenoids serves as a core, and the remaining solenoids are sequentially wound around the core solenoid. Axes of the solenoids are substantially directed to the same direction. Each connecting line is correspondingly connected between ends of two adjacent solenoids to serially connect the solenoids.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: April 1, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Chung Chang, Meng-Sheng Chen, Chang-Chih Liu, Li-Chi Chang, Cheng-Hua Tsai
  • Publication number: 20140008443
    Abstract: An RFID sealing device for a bottle is disclosed, which provides information of production resumes, stock control, sale control and so like, where the information may be adapted for a computerized foods management system for the upstream manufacturer and the downstream sellers. Since the metal cap plays a part in the RFID sealing device, the RFID shall malfunction once the bottle cap has been turned or opened before sale, so that the present RFID sealing device plays a function of safety identifier to the bottled liquid or food in addition.
    Type: Application
    Filed: July 4, 2012
    Publication date: January 9, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Li-Chi Chang, Yung-Chung Chang, Chang-Chih Liu, Cheng-Hua Tsai, Meng-Sheng Chen
  • Publication number: 20130187743
    Abstract: An inductor structure including a plurality of solenoids and at least one connecting line is provided. One of the solenoids serves as a core, and the remaining solenoids are sequentially wound around the core solenoid. Axes of the solenoids are substantially directed to the same direction. Each connecting line is correspondingly connected between ends of two adjacent solenoids to serially connect the solenoids.
    Type: Application
    Filed: June 19, 2012
    Publication date: July 25, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yung-Chung Chang, Meng-Sheng Chen, Chang-Chih Liu, Li-Chi Chang, Cheng-Hua Tsai
  • Patent number: 8339233
    Abstract: A three-dimensional inductor is provided. The three-dimensional inductor is disposed in a multi-layered substrate. The multi-layered substrate includes at least a dielectric layer and at least two metal layers. The three-dimensional inductor includes a first coil and a second coil. The second coil is electrically connected to the first coil. The first coil is on a first plane and formed on a first metal layer. The second coil is on a second plane and disposed in a variety of dielectric layers and metal layer. The first plane is not parallel to or is vertical to the second plane such that the magnetic field generated by the first coil and the magnetic field generated by the second coil are not parallel to each other or are vertical to each other.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: December 25, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Hua Tsai, Chang-Sheng Chen, Chang-Chih Liu, Li-Chi Chang, Yung-Chung Chang
  • Patent number: 8319610
    Abstract: Radio-frequency identification (RFID) tag antenna, tags and communications systems using the same are presented. The RFID tag antenna includes a patterned conductive loop having a plurality of longitudinal conductive sections and a pair of transverse conductive sections connecting to each end of the longitudinal conductive sections to serve as a matching network. A pair of extended conductive arms is electrically connected to the patterned conductive loop via two nodes. A bonding pad with an RFID chip disposed thereon is arranged at the central area of the pair of extended conductive arms.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: November 27, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Li-Chi Chang, Meng Sheng Chen, Kuo-Chiang Chin, Chang-Sheng Chen, Cheng-Hua Tsai, Wei-Ting Chen