Abstract: A method of manufacturing resistive memory includes the steps: forming a first implanted stacked structure having a first impurity diffusion layer, a second impurity diffusion layer, and a third impurity diffusion layer in a substrate; etching at least the first implanted stacked structure to form a plurality of second implanted stacked structures, wherein the first impurity diffusion layers are first signal lines; forming a plurality of first insulating layers between the second implanted stacked structures; etching the second implanted stacked structures to form a plurality of third implanted stacked structures, wherein the first signal lines are not etched; forming a plurality of second insulating layers between the third implanted stacked structures; forming a plurality of memory material layers electrically coupled to the third impurity diffusion layers; and forming a plurality of second signal lines perpendicular to the first signal lines and electrically coupled to the memory material layers.

Abstract: A light emitting diode (LED) driving system driving a LED array of a display device includes a microcontroller, a control circuit, a pulse width modulator (PWM) controller, a first driving circuit, a second driving circuit, a first converter circuit and a second converter circuit. The microcontroller outputs a first signal when the display device is in a three dimension (3D) mode. The control circuit generates and output a 3D control signal upon receiving the first signal. The second converter circuit converts a direct current power into a second direct current voltage when the display device is in the 3D mode, and the second converter circuit stops working when the display device is in a two dimension mode.

Abstract: A light emitting diode (LED) driving system driving a LED array of a display device includes a converter circuit, a pulse width modulator (PWM) controller, a 2D parameter circuit, a 3D parameter circuit and a microcontroller. The 3D parameter circuit outputs 3D parameter control signals when the display device is in a 3D mode, and stops from generating the 3D parameter control signals when the display device is in a 2D mode. The PWM controller outputs PWM signals to control the converter circuit according to outputs of the 2D parameter circuit and the 3D parameter circuit.

Abstract: A shift register and a display driver thereof are provided. The display driver submitted by the present invention can be directly disposed on a glass substrate of a liquid crystal display (LCD) panel to replace a scan driver commonly used in prior art, so that the cost of the liquid crystal display can be reduced. In addition, the stress taken by the output stage transistor of each shift register stage within the display driver submitted by the present invention can be reduced. Thus, each shift register stage has the highest reliability, and may consequently avoid the erroneous actions when each shift register stage is operated for a long time.

Abstract: A method of manufacturing resistive memory includes the steps: forming a first implanted stacked structure having a first impurity diffusion layer, a second impurity diffusion layer, and a third impurity diffusion layer in a substrate; etching at least the first implanted stacked structure to form a plurality of second implanted stacked structures, wherein the first impurity diffusion layers are first signal lines; forming a plurality of first insulating layers between the second implanted stacked structures; etching the second implanted stacked structures to form a plurality of third implanted stacked structures, wherein the first signal lines are not etched; forming a plurality of second insulating layers between the third implanted stacked structures; forming a plurality of memory material layers electrically coupled to the third impurity diffusion layers; and forming a plurality of second signal lines perpendicular to the first signal lines and electrically coupled to the memory material layers.

Abstract: A method for electroplating low-resistance metal wire for resolving the problem to fabricate the metal wire on large-area substrate through the technology of photolithographing and etching in the prior art. Then the invention improves the RC-delay characteristic of circuit on large-area substrate and reduces the number of masks for processing of a structure of gate overlap lightly-doped drain (source) (GOLDD).

Abstract: A light transceiver module is designed for electronic devices. It forms an electric connection with the electric connector of the electronic device. The light transceiver module contains a base, a light-emitting device for providing optical signals, a light-receiving device for receiving optical signals, and a main circuit board. The base supports the light-emitting device, the light-receiving device, and the main circuit board. The main circuit board has a pluggable electric connector for connections with the electric connector of the electronic device. The light transceiver module can be used to simplify and optimize the devices using it.

Abstract: A program information prompting method and apparatus and a television set using the same are provided. In the method, a user is identified at first. Then, a watching habit of the user is recorded. Next, program preference of the user is determined according to the watching habit. Afterwards, a prompt of related program information is given according to the user's program preference.

Abstract: An acoustic calibration sound system includes a coordinate position detecting device and a host. The coordinate position detecting device is used for detecting a position of a listener in a space plane and issuing a corresponding position signal. The host outputs an audio signal. The host has an acoustic characteristic parameter matrix containing multiple acoustic characteristic parameters related to multiple positions in the space plane. The host selects a corresponding acoustic characteristic parameter in response to the position signal. According to the selected acoustic characteristic parameter, the host adjusts the audio signal.

Abstract: A shift register and a display driver thereof are provided. The display driver submitted by the present invention can be directly disposed on a glass substrate of a liquid crystal display (LCD) panel to replace a scan driver commonly used in prior art, so that the cost of the liquid crystal display can be reduced. In addition, the stress taken by the output stage transistor of each shift register stage within the display driver submitted by the present invention can be reduced. Thus, each shift register stage has the highest reliability, and may consequently avoid the erroneous actions when each shift register stage is operated for a long time.

Abstract: A driving circuit applied to a display panel includes a driving unit for generating a plurality of driving signals to drive a plurality of pixels in the display panel, and a plurality of multiplexers coupled to the driving unit and the plurality of pixels. Each multiplexer of the plurality of multiplexers is utilized for sequentially transmitting a plurality of driving signals to a plurality of sub-pixels of a corresponding pixel, where two adjacent pixels utilize different driving sequences of the sub-pixels to drive their sub-pixels.

Abstract: A shift register including a plurality of stage circuits is provided. Each of the stage circuits has a shift circuit for receiving an input signal and providing an output signal. The output signal is obtained through the logic calculation and delaying of the input signal. Each of the stage circuits, except the first one, further includes a logic circuit used to produce at least one control signal according to the internal signals of the containing stage circuit, so as to replace at least one of the required clock signals during the operation of the corresponding shift circuit.

Abstract: A driving circuit for a display device includes a first trigger signal generating stage, a second trigger signal generating stage, . . . , and an n-th trigger signal generating stage, where n is an integer larger than 0. The i-th shift register performs a tri-state inversion on an input signal of the i-th trigger signal generating stage to obtain an i-th tri-state inversion signal, and then performs the tri-state inversion on the i-th tri-state inversion signal to obtain an input signal of the (i+1)-th trigger signal generating stage. The i-th logic gate generates an i-th logic signal according to the i-th tri-state inversion signal and the input signal of the (i+1)-th trigger signal generating stage. The (i?1)-th trigger signal generating stage generates an (i?1)-th trigger signal generating signal according to the i-th logic signal.

Abstract: A driving circuit for a display device includes a first trigger signal generating stage, a second trigger signal generating stage, . . . , and an n-th trigger signal generating stage, where n is an integer larger than 0. The i-th shift register performs a tri-state inversion on an input signal of the i-th trigger signal generating stage to obtain an i-th tri-state inversion signal, and then performs the tri-state inversion on the i-th tri-state inversion signal to obtain an input signal of the (i+1)-th trigger signal generating stage. The i-th logic gate generates an i-th logic signal according to the i-th tri-state inversion signal and the input signal of the (i+1)-th trigger signal generating stage. The (i?1)-th trigger signal generating stage generates an (i?1)-th trigger signal generating signal according to the i-th logic signal.

Abstract: A shift register including a plurality of stage circuits is provided. Each of the stage circuits has a shift circuit for receiving an input signal and providing an output signal. The output signal is obtained through the logic calculation and delaying of the input signal. Each of the stage circuits, except the first one, further includes a logic circuit used to produce at least one control signal according to the internal signals of the containing stage circuit, so as to replace at least one of the required clock signals during the operation of the corresponding shift circuit.

Abstract: A light transceiver module is designed for electronic devices. It forms an electric connection with the electric connector of the electronic device. The light transceiver module contains a base, a light-emitting device for providing optical signals, a light-receiving device for receiving optical signals, and a main circuit board. The base supports the light-emitting device, the light-receiving device, and the main circuit board. The main circuit board has a pluggable electric connector for connections with the electric connector of the electronic device. The light transceiver module can be used to simplify and optimize the devices using it.

Abstract: The invention disclosed a method for integrating CMOS circuit chips with carbon nanotubes (CNTs) into array-type sensors with signal processors enclosed. The method provides low-temperature and wafer-level fabrication processes including dripped a drop of dispersed CNTs solution on the top of CMOS chip, use micro probe card to contact with pairs of pads, with a function generator to generate dielectrophoresis (DEP) signal and with a lock-in amplifier to measure impedance value simultaneously. According to the impedance measurement it can detect the number of CNTs fixed on pair of pads. Only if the number of CNTs on the top of pair of pads were not expected, it would readjust the frequency of alternating current to the range of negative DEP force and repel CNTs from the top of pair of pads. Repeat positive DEP signal to attach CNTs until the number of CNTs as demand, then hold the DEP force until CNTs solution evaporated to make a well-contact between CNTs and pads.

Abstract: A method for electroplating low-resistance metal wire for resolving the problem to fabricate the metal wire on large-area substrate through the technology of photolithographing and etching in the prior art. Then the invention improves the RC-delay characteristic of circuit on large-area substrate and reduces the number of masks for processing of a structure of gate overlap lightly-doped drain (source) (GOLDD).