Patents by Inventor Cheng-Kuo Lin

Cheng-Kuo Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240099086
    Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 21, 2024
    Inventors: Cheng-Ho Yu, Chin-Wei Lin, Shyuan Yang, Ting-Kuo Chang, Tsung-Ting Tsai, Warren S. Rieutort-Louis, Shih-Chang Chang, Yu Cheng Chen, John Z. Zhong
  • Publication number: 20230371732
    Abstract: A container assembly in accordance with one embodiment of the present disclosure includes an outer container having a first open end and a second closed end and defining an inner cavity; and a plunging assembly configured to be received within the outer container, the plunging assembly having a first end and a second end, wherein the plunging assembly includes an inner sleeve having a first end and a second end and a wall defining an inner bore, and wherein the plunging assembly includes an extraction assembly having a body having a first end and a second end and a side wall extending for at least a portion of the distance between the first and second ends of the body, wherein the first end of the body is coupled to the inner sleeve at or near the second end of the inner sleeve, and wherein the body includes a first sieve portion, and wherein the extraction assembly further includes a strainer having a second sieve portion, wherein the strainer is removably couplable to the body.
    Type: Application
    Filed: May 17, 2023
    Publication date: November 23, 2023
    Inventors: Travis Merrigan, Patrick Crosby, Scott Rolfson, Cheng Kuo Lin, Kai Chuan Chuang
  • Publication number: 20220406905
    Abstract: A semiconductor device includes: a substrate; a channel layer disposed on the substrate, wherein the channel layer is made of GaN; a barrier layer disposed on the channel layer, wherein the barrier layer is made of AlzGa1-zN; and an inserting structure inserted between the channel layer and the barrier layer. The inserting structure includes: a first inserting layer disposed on the channel layer, wherein the first inserting layer is made of AlxGa1-xN; and a second inserting layer disposed on the first inserting layer, wherein the second inserting layer is made of AlyGa1-yN, and y is greater than x. The semiconductor device further includes: a gate electrode disposed on the barrier layer; a source electrode and a drain electrode disposed on the barrier layer and respectively at opposite sides of the gate electrode; and a spike region formed below at least one of the source electrode and the drain electrode.
    Type: Application
    Filed: May 30, 2022
    Publication date: December 22, 2022
    Inventors: Chieh-Chih HUANG, Yan-Cheng LIN, Cheng-Kuo LIN, Wei-Chou WANG, Che-Kai LIN
  • Patent number: 10756625
    Abstract: An integrated module of acoustic wave device with active thermal compensation comprises a substrate, an acoustic wave filter, an active adjustment circuit and at least one variable capacitance device. The acoustic wave filter comprises a plurality of series acoustic wave resonators formed on the substrate, at least one shunt acoustic wave resonator formed on the substrate and a thermal sensing acoustic wave resonator. Each of the variable capacitance device is connected in parallel to one of the series and shunt acoustic wave resonators. The active adjustment circuit outputs an active thermal compensation signal correlated to a thermal variation sensed by the thermal sensing acoustic wave resonator to the variable capacitance device. The active thermal compensation signal induces a capacitance variation of the variable capacitance device such that the impact of the thermal variation to the acoustic wave device is compensated.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: August 25, 2020
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Re Ching Lin, Shu Hsiao Tsai, Cheng Kuo Lin, Chih-Feng Chiang, Fan Hsiu Huang, Tung-Yao Chou
  • Patent number: 10727741
    Abstract: An acoustic wave filter having thermal sensing acoustic wave resonator comprises a substrate, a plurality of series acoustic wave resonators formed on the substrate, at least one shunt acoustic wave resonator formed on the substrate and a thermal sensing acoustic wave resonator. The thermal sensing acoustic wave resonator is one of a series acoustic wave resonator and a shunt acoustic wave resonator. Thereby the thermal sensing acoustic wave resonator plays dual roles of thermal sensing and acoustic wave filtering.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: July 28, 2020
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Re Ching Lin, Shu Hsiao Tsai, Cheng Kuo Lin, Fan Hsiu Huang, Chih-Feng Chiang, Tung-Yao Chou
  • Patent number: 10553709
    Abstract: A heterojunction bipolar transistor, comprising an elongated base mesa, an elongated base electrode, two elongated emitters, an elongated collector, and two elongated collector electrodes. The elongated base electrode is formed on the base mesa along the long axis of the base mesa, and the base electrode has a base via hole at or near the center of the base electrode. The two elongated emitter are formed on the base mesa respectively at two opposite sides of the base electrode, and each of two emitters has an elongated emitter electrode formed on the emitter. The elongated collector is formed below the base mesa. The two elongated collector electrodes are formed on the collector respectively at two opposite sides of the base mesa.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: February 4, 2020
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Jui-Pin Chiu, Shu-Hsiao Tsai, Rong-Hao Syu, Cheng-Kuo Lin
  • Patent number: 10498310
    Abstract: A protective cover for an acoustic wave device and a fabrication method thereof, for protecting an acoustic wave device having a resonant area during a packaging operation so as to avoid molding compound flowing onto the resonant area of the acoustic wave device. The fabrication method comprises: defining a sacrificial area on the acoustic wave device; forming a sacrificial layer on the sacrificial area; covering a metal covering layer on the sacrificial layer and connecting a bottom rim of the metal covering layer to the acoustic wave device and forming an opening between the bottom rim of the metal covering layer and the acoustic wave device; and removing the sacrificial layer to form a cavity between the metal covering layer and the resonant area by using a chemical solution, wherein the chemical solution enters from the opening between the metal covering layer and the acoustic wave device.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: December 3, 2019
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Cheng-Kuo Lin, Shu-Hsiao Tsai, Rong-Hao Syu, Yi-Ling Liu, Re-Ching Lin, Pei-Chun Liao
  • Patent number: 10453805
    Abstract: A chip stack having a protection structure for semiconductor device package, which comprises a first chip and a second chip stacked with each other, wherein said first chip has a first surface, said second chip has a second surface, said first surface and said second surface are two surfaces facing to each other, wherein at least one metal pillar is formed on at least one of said first surface and said second surface and connected with the other, at least one protection ring is formed on at least one of said first surface and said second surface and having a first gap with the other, and at least one electrical device is formed on at least one of said first surface and said second surface, wherein said at least one electrical device is located inside at least one of said at least one protection ring.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: October 22, 2019
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Pei-Chun Liao, Po-Wei Ting, Chih-Feng Chiang, Yu-Kai Wu, Yu-Fan Chang, Re-Ching Lin, Shu-Hsiao Tsai, Cheng-Kuo Lin
  • Patent number: 10298203
    Abstract: A chip stack having a protection structure for semiconductor device package comprises a first chip and a second chip stacked with each other. A first surface of the first chip and a second surface of the second chip are facing to each other. At least one metal pillar is formed on at least one of the first surface and the second surface and connected with the other. At least one protection ring is formed on at least one of the first surface and the second surface and having a first gap with the other. At least one electrical device is formed on at least one of the first surface and the second surface and is located inside at least one of the at least one protection ring, wherein the at least one electrical device includes a temperature sensor.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 21, 2019
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Pei-Chun Liao, Po-Wei Ting, Chih-Feng Chiang, Yu-Kai Wu, Yu-Fan Chang, Re-Ching Lin, Shu-Hsiao Tsai, Cheng-Kuo Lin
  • Patent number: 10103624
    Abstract: A thermal sensor circuit comprises a conversion circuit which is one of a buck DC-DC converter circuit and a boost DC-DC converter circuit, wherein the conversion circuit comprises an inductor and an output terminal. A thermal sensor senses a thermal variation correlated to a capacitance variation of the thermal sensor. The capacitance variation induces an internal parasitic capacitance variation of the inductor which is connected in parallel to the thermal sensor and results a variation of an energy stored in the inductor. Hence a variation of a converted circuit signal outputting by the output terminal is caused, wherein the variation of the converted circuit signal is correlated to the thermal variation.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: October 16, 2018
    Assignee: WIN Semiconductors Corp.
    Inventors: Re Ching Lin, Fan Hsiu Huang, Tung-Yao Chou, Cheng Kuo Lin, Shu Hsiao Tsai, Chih-Feng Chiang
  • Patent number: 10096583
    Abstract: The present invention relates to a compound semiconductor integrated circuit chip having a front and/or back surface metal layer used for electrical connection to an external circuit. The compound semiconductor integrated circuit chip (first chip) comprises a substrate, an electronic device layer, and a dielectric layer. A first metal layer is formed on the front side of the dielectric layer, and a third metal layer is formed on the back side of the substrate. The first and third metal layer are made essentially of Cu and used for the connection to other electronic circuits. A second chip may be mounted on the first chip with electrical connection made with the first or the third metal layer that extends over the electronic device in the first chip in the three-dimensional manner to make the electrical connection between the two chips having connection nodes away from each other.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: October 9, 2018
    Assignee: WIN Semiconductos Corp.
    Inventors: Shinichiro Takatani, Hsien-Fu Hsiao, Cheng-Kuo Lin, Chang-Hwang Hua
  • Patent number: 9998087
    Abstract: An integrated structure of power amplifier and acoustic wave device comprises: a compound semiconductor epitaxial substrate including an epitaxial structure formed on a compound semiconductor substrate, a power amplifier upper structure formed on a top-side of a left part of the compound semiconductor epitaxial substrate, and a film bulk acoustic resonator formed on the top-side of a right part of the compound semiconductor epitaxial substrate; wherein the left part of the compound semiconductor epitaxial substrate and the power amplifier upper structure form a power amplifier; the right part of the compound semiconductor epitaxial substrate and the film bulk acoustic resonator form an acoustic wave device; the integrated structure of power amplifier and acoustic wave device on the same compound semiconductor epitaxial substrate is capable of reducing the component size, optimizing the impedance matching, and reducing the signal loss between power amplifier and acoustic wave device.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: June 12, 2018
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Shu-Hsiao Tsai, Re Ching Lin, Pei-Chun Liao, Cheng-Kuo Lin, Yung-Chung Chin
  • Patent number: 9991198
    Abstract: A layout method for compound semiconductor integrated circuits, comprising following steps of: forming a first metal layer within a first circuit layout area which intersects with a second circuit layout area at an intersection area on a compound semiconductor substrate; defining an adjacent crossover area including said intersection area and a peripheral adjacent area thereof; a first dielectric area located within said adjacent crossover area and intersected with at least part of said intersection area; forming a first dielectric block within said first dielectric area or forming said first dielectric block within said first dielectric area and a second dielectric block outside said first dielectric area, the thickness of said second dielectric block is no greater than and the thickness of at least part of said second dielectric block is smaller than the thickness of said first dielectric block; forming a second metal layer within said second circuit layout area.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: June 5, 2018
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Shu-Hsiao Tsai, Rong-Hao Syu, Yi-Ling Liu, Cheng-Kuo Lin
  • Publication number: 20180145159
    Abstract: A heterojunction bipolar transistor, comprising an elongated base mesa, an elongated base electrode, two elongated emitters, an elongated collector, and two elongated collector electrodes. The elongated base electrode is formed on the base mesa along the long axis of the base mesa, and the base electrode has a base via hole at or near the center of the base electrode. The two elongated emitter are formed on the base mesa respectively at two opposite sides of the base electrode, and each of two emitters has an elongated emitter electrode formed on the emitter. The elongated collector is formed below the base mesa. The two elongated collector electrodes are formed on the collector respectively at two opposite sides of the base mesa.
    Type: Application
    Filed: January 19, 2018
    Publication date: May 24, 2018
    Inventors: Jui-Pin CHIU, Shu-Hsiao TSAI, Rong-Hao SYU, Cheng-Kuo LIN
  • Patent number: 9911837
    Abstract: A heterojunction bipolar transistor, comprising an elongated base mesa, an “H” shaped emitter, two base electrodes, an elongated collector, and two elongated collector electrodes. The “H” shaped emitter is formed on the base mesa and has two parallel bars connected by a cross-bar. Two elongated emitter electrodes are formed respectively on the two parallel bars of the “H” shaped emitter. The “H” shaped emitter has two recesses respectively on two opposite sides of the cross-bar between the two parallel bars. The two base electrodes are formed on the base mesa respectively at the two recesses of the “H” shaped emitter, each of which has a base via hole near a center of the base mesa. The elongated collector is formed below the base mesa. The two elongated collector electrodes are formed on the collector respectively at two opposite sides of the base mesa.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: March 6, 2018
    Assignee: Win Semiconductors Corp.
    Inventors: Jui-Pin Chiu, Shu-Hsiao Tsai, Rong-Hao Syu, Cheng-Kuo Lin
  • Patent number: 9905610
    Abstract: An integrated structure of acoustic wave device and varactor comprises an acoustic wave device and a varactor formed on a first part and a second part of a semiconductor substrate respectively. The acoustic wave device comprises an acoustic wave device upper structure and a first part of a bottom epitaxial structure. The acoustic wave device upper structure is formed on the first part of the bottom epitaxial structure. The varactor comprises a varactor upper structure and a second part of the bottom epitaxial structure. The varactor upper structure is formed on the second part of the bottom epitaxial structure. The integrated structure of the acoustic wave device and the varactor formed on the same semiconductor substrate is capable of reducing the module size, optimizing the impedance matching, and reducing the signal loss between the varactor and the acoustic wave device.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: February 27, 2018
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Shu-Hsiao Tsai, Re Ching Lin, Pei-Chun Liao, Cheng-Kuo Lin, Yung-Chung Chin, Chih-Feng Chiang
  • Publication number: 20180006556
    Abstract: A thermal sensor circuit comprises a conversion circuit which is one of a buck DC-DC converter circuit and a boost DC-DC converter circuit, wherein the conversion circuit comprises an inductor and an output terminal. A thermal sensor senses a thermal variation correlated to a capacitance variation of the thermal sensor. The capacitance variation induces an internal parasitic capacitance variation of the inductor which is connected in parallel to the thermal sensor and results a variation of an energy stored in the inductor. Hence a variation of a converted circuit signal outputting by the output terminal is caused, wherein the variation of the converted circuit signal is correlated to the thermal variation.
    Type: Application
    Filed: June 27, 2017
    Publication date: January 4, 2018
    Inventors: Re Ching Lin, Fan Hsiu Huang, Tung-Yao Chou, Cheng Kuo Lin, Shu Hsiao Tsai, Chih-Feng Chiang
  • Publication number: 20180006633
    Abstract: An integrated module of acoustic wave device with active thermal compensation comprises a substrate, an acoustic wave filter, an active adjustment circuit and at least one variable capacitance device. The acoustic wave filter comprises a plurality of series acoustic wave resonators formed on the substrate, at least one shunt acoustic wave resonator formed on the substrate and a thermal sensing acoustic wave resonator. Each of the variable capacitance device is connected in parallel to one of the series and shunt acoustic wave resonators. The active adjustment circuit outputs an active thermal compensation signal correlated to a thermal variation sensed by the thermal sensing acoustic wave resonator to the variable capacitance device. The active thermal compensation signal induces a capacitance variation of the variable capacitance device such that the impact of the thermal variation to the acoustic wave device is compensated.
    Type: Application
    Filed: June 27, 2017
    Publication date: January 4, 2018
    Inventors: Re Ching Lin, Shu Hsiao Tsai, Cheng Kuo Lin, Chih-Feng Chiang, Fan Hsiu Huang, Tung-Yao Chou
  • Publication number: 20180003570
    Abstract: An acoustic wave filter having thermal sensing acoustic wave resonator comprises a substrate, a plurality of series acoustic wave resonators formed on the substrate, at least one shunt acoustic wave resonator formed on the substrate and a thermal sensing acoustic wave resonator. The thermal sensing acoustic wave resonator is one of a series acoustic wave resonator and a shunt acoustic wave resonator. Thereby the thermal sensing acoustic wave resonator plays dual roles of thermal sensing and acoustic wave filtering.
    Type: Application
    Filed: June 27, 2017
    Publication date: January 4, 2018
    Inventors: Re Ching Lin, Shu Hsiao Tsai, Cheng Kuo Lin, Fan Hsiu Huang, Chih-Feng Chiang, Tung-Yao Chou
  • Publication number: 20170272052
    Abstract: A protective cover for an acoustic wave device and a fabrication method thereof, for protecting an acoustic wave device having a resonant area on a surface of a substrate during a packaging operation so as to avoid molding compound flowing onto the resonant area of the acoustic wave device, wherein at least one electrical device is provided on the surface of the substrate and the at least one electrical device includes a temperature sensor. The acoustic wave device protection structure comprising: a metal covering layer, having a concave surface and a bottom rim, the bottom rim connected to the acoustic wave device and forming at least one opening between the bottom rim and the acoustic wave device, and the concave surface covering over the resonant area to form a cavity between the concave surface and the resonant area.
    Type: Application
    Filed: June 8, 2017
    Publication date: September 21, 2017
    Inventors: Cheng-Kuo Lin, Shu-Hsiao Tsai, Rong-Hao Syu, Yi-Ling Liu, Re-Ching Lin, Pei-Chun Liao, Chih-Feng Chiang