Patents by Inventor Cheng Lin

Cheng Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240137506
    Abstract: The present disclosure provides systems and methods for image filtering. The method may include obtaining an initial image block from a reconstructed image; determining at least one candidate image block by performing a filtering operation on the initial image block using at least one trained machine learning model; and determining a target image block based on the at least one candidate image block.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Applicant: ZHEJIANG DAHUA TECHNOLOGY CO., LTD.
    Inventors: Xue ZHANG, Cheng FANG, Dong JIANG, Jucai LIN, Jun YIN
  • Publication number: 20240138092
    Abstract: A locking mechanism for mounting hard drive to rack includes a shell and a lock component. The lock component comprises a handle, a pin, a lever, a torsion spring, and a compression spring. When the handle is located on the inner position, the lever latches the handle, the torsion spring is compressed, the compression spring pushes the pin out of the shell to insert into a slot of the rack to lock the hard drive to the rack. When pressing the lever to unlatch the handle, the torsion spring pushes the handle rotate to the outer position, meanwhile the handle retracts the pin into the shell to unlock the hard drive from the rack. An electronic device structure and a server using the locking mechanism is also disclosed.
    Type: Application
    Filed: June 19, 2023
    Publication date: April 25, 2024
    Inventor: KE-CHENG LIN
  • Publication number: 20240136481
    Abstract: A micro light-emitting diode display device includes a substrate, a first planarization layer, a first light-emitting element, and a second planarization layer. The first planarization layer is disposed on the substrate and has a first opening. The first opening has a first opening inner wall. The first light-emitting element is disposed on the substrate, in the first opening, and separated from the first opening inner wall. The second planarization layer is disposed on the substrate and between the first planarization layer and the first light-emitting element. The second planarization layer is in contact with the first light-emitting element.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Inventors: Bin-Cheng LIN, Chieh-Ming Chen, Bo-Ru Jian, Chi-Sheng Liao, Ta-Wen Liao
  • Publication number: 20240138152
    Abstract: In accordance with embodiments, a memory array is formed with a multiple patterning process. In embodiments a first trench is formed within a multiple layer stack and a first conductive material is deposited into the first trench. After the depositing the first conductive material, a second trench is formed within the multiple layer stack, and a second conductive material is deposited into the second trench. The first conductive material and the second conductive material are etched.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Feng-Cheng Yang, Meng-Han Lin, Sheng-Chen Wang, Han-Jong Chia, Chung-Te Lin
  • Publication number: 20240137483
    Abstract: An exemplary embodiment of the invention provides an image processing method for a virtual reality display system. The method includes: enabling a first shared buffer and a second shared buffer; performing an image capturing operation to obtain a first image from a virtual reality scene; storing the first image to the first shared buffer; in response to that the storing of the first image is finished, reading the first image from the first shared buffer; performing a depth estimation operation on the first image to obtain depth information corresponding to the first image; storing the depth information to the second shared buffer; in response to that the storing of the depth information is finished, reading the depth information from the second shared buffer; performing an image generation operation according to the depth information to generate a pair of second images corresponding to the virtual reality scene; and outputting the pair of second images by a display of the virtual reality display system.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 25, 2024
    Applicant: Acer Incorporated
    Inventors: Sergio Cantero Clares, Wen-Cheng Hsu, Shih-Hao Lin, Chih-Haw Tan
  • Publication number: 20240136418
    Abstract: A device includes an active region, a gate structure, a source/drain epitaxial structure, an epitaxial layer, a metal alloy layer, a contact, and a contact etch stop layer. The gate structure is across the active region. The source/drain epitaxial structure is over the active region and adjacent the gate structure. The epitaxial layer is over the source/drain epitaxial structure. The metal alloy layer is over the epitaxial layer. The contact is over the metal alloy layer. The contact etch stop layer lines sidewalls of the source/drain epitaxial structure. The metal alloy layer is spaced apart from the contact etch stop layer.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Cheng CHEN, Chun-Hsiung LIN, Chih-Hao WANG
  • Publication number: 20240136428
    Abstract: Improved inner spacers for semiconductor devices and methods of forming the same are disclosed.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Wen-Kai Lin, Che-Hao Chang, Chi On Chui, Yung-Cheng Lu
  • Publication number: 20240136298
    Abstract: A method includes dispensing sacrificial region over a carrier, and forming a metal post over the carrier. The metal post overlaps at least a portion of the sacrificial region. The method further includes encapsulating the metal post and the sacrificial region in an encapsulating material, demounting the metal post, the sacrificial region, and the encapsulating material from the carrier, and removing at least a portion of the sacrificial region to form a recess extending from a surface level of the encapsulating material into the encapsulating material.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Jing-Cheng Lin, Chen-Hua Yu, Po-Hao Tsai
  • Publication number: 20240137431
    Abstract: A packet sorting and reassembly circuit module, including a header parser, an information processing circuit, at least one state tracking and reassembly circuit, and an output arbiter, is provided. The header parser is configured to analyze multiple first packet segments to obtain header information corresponding to a first network packet, wherein the first network packet is transmitted based on a transmission control protocol (TCP) communication protocol. The information processing circuit is configured to transmit the first packet segments and sideband information corresponding to the first packet segments to a first state tracking and reassembly circuit among the at least one state tracking and reassembly circuit according to the header information. The first state tracking and reassembly circuit is configured to reassemble and sort the first packet segments according to the sideband information. The output arbiter is configured to output the first packet segments according to a sorting result.
    Type: Application
    Filed: January 16, 2023
    Publication date: April 25, 2024
    Applicants: Chung Yuan Christian University, KGI Securities Co. Ltd.
    Inventors: Yu-Kuen Lai, Chao-Lin Wang, He-Ping Li, Cheng-Han Chuang, Kai-Po Chang
  • Publication number: 20240135846
    Abstract: An electronic device and a manufacturing method thereof are provided. The manufacturing method of the electronic device includes the following. A substrate is provided. A plurality of electronic units are transferred to the substrate. The electronic units are inspected to obtain M first defect maps. The M first defect maps are integrated into N second defect maps, where N<M. M repairing groups are provided according to the N second defect maps. Each of the repairing groups includes at least one repairing electronic unit. The M repairing groups are transferred to the substrate. At least two of the repairing groups have the same location distribution of repairing electronic units, and the location distribution is consistent with a defect distribution of one of the second defect maps.
    Type: Application
    Filed: September 17, 2023
    Publication date: April 25, 2024
    Applicant: Innolux Corporation
    Inventors: Kai Cheng, Fang-Ying Lin, Ming-Chang Lin, Tsau-Hua Hsieh
  • Publication number: 20240133427
    Abstract: An air-floating guide rail device includes a guide rail unit, a slider unit, and a linear motor unit. The guide rail unit includes a guide rail body and two air-floating block sets made of a material different from that of the guide rail body and each including top and side air-floating blocks. The slider unit includes a main sliding seat and two lateral sliding seats connected integrally to the main sliding seat and each having first and second guiding surfaces transverse to each other and disposed respectively adjacent to corresponding top and side air-floating blocks, and first and second air guiding passages connecting the first and second guiding surfaces to the external environment. The linear motor unit includes a stator and a mover mounted fixedly to the main sliding seat and movable relative to the stator for driving linear movement of the slider unit relative to the guide rail unit.
    Type: Application
    Filed: December 20, 2022
    Publication date: April 25, 2024
    Inventors: KUN-CHENG TSENG, KUEI-TUN TENG, WEI-CHIH CHEN, WEN-CHUNG LIN
  • Publication number: 20240133221
    Abstract: A displaceable rotating shaft structure and a foldable device having the rotating shaft structure are disclosed. The displaceable rotating shaft structure comprises a support, a rotating shaft, a connecting rod assembly, a guide assembly, and a torsion assembly. The support has a supporting portion. The connecting rod assembly has a first outer end that is rotatably connected to the linking section of the rotating shaft and a second outer end that is pivotally connected to the supporting portion. The guide assembly has a guide rod. The guide rod is configured to displace relative to the supporting portion. When the rotating shaft is rotated, the rotating shaft drives the connecting rod assembly to adjust the angle and the total length of a joint of connecting rods of the connecting rod assembly, a distance between the rotating shaft and the support is changed through the guide assembly.
    Type: Application
    Filed: October 24, 2022
    Publication date: April 25, 2024
    Inventors: WEN-YEN LIN, WEI-CHENG CHIEN
  • Publication number: 20240134136
    Abstract: An optical transceiver module temperature control device includes a processor, a printed circuit board assembly, an optical transceiver module and a temperature adjustment element. The processor is configured to measure an ambient temperature. The printed circuit board assembly includes a first side and a second side. The first side is opposite to the second side. The optical transceiver module is disposed on the first side of the printed circuit board assembly. The temperature adjustment element is coupled to the processor and disposed on the second side of the printed circuit board assembly. The processor is configured to generate a temperature adjustment signal according to the ambient temperature and an operating temperature range. The temperature adjustment element is configured to perform heat exchange with the printed circuit board assembly according to the temperature adjustment signal to adjust a temperature of the optical transceiver module into the operating temperature range.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 25, 2024
    Applicant: Formerica Optoelectronics, Inc.
    Inventors: Yun-Cheng HUANG, Yi-Nan SHIH, Chih-Chung LIN, Yun-Chin TSAI
  • Publication number: 20240134529
    Abstract: The disclosure provides an in-memory computing (IMC) memory device and an IMC method thereof. The IMC memory device includes; a memory array including a plurality of computing units, each of the computing units including a plurality of parallel-coupling computing cells, the parallel-coupling computing cells of the same computing unit receiving a same input voltage; wherein a plurality of input data is converted into a plurality input voltages; after receiving the input voltages, the computing units generate a plurality of output currents; and based on the output currents, a multiply accumulate (MAC) of the input data and a plurality of conductance of the computing cells is generated.
    Type: Application
    Filed: October 24, 2022
    Publication date: April 25, 2024
    Inventors: Wei-Chih CHIEN, Cheng-Lin SUNG, Hsiang-Lan LUNG
  • Publication number: 20240136221
    Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip may comprise a first metal line disposed over a substrate. A via may be disposed directly over a top of the first metal line and the via may comprise a first lower surface and a second lower surface above the first lower surface. A first dielectric structure may be disposed laterally adjacent to the first metal line and may be disposed along a sidewall of the first metal line. A first protective etch-stop structure may be disposed directly over a top of the first dielectric structure and the first protective etch-stop structure may vertically separate the second lower surface of the via from the top of the first dielectric structure.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Shao-Kuan Lee, Hai-Ching Chen, Hsin-Yen Huang, Shau-Lin Shue, Cheng-Chin Lee
  • Publication number: 20240135990
    Abstract: A resistive memory apparatus including a memory cell array, at least one dummy transistor and a control circuit is provided. The memory cell array includes a plurality of memory cells. Each of the memory cells includes a resistive switching element. The dummy transistor is electrically isolated from the resistive switching element. The control circuit is coupled to the memory cell array and the dummy transistor. The control circuit is configured to provide a first bit line voltage, a source line voltage and a word line voltage to the dummy transistor to drive the dummy transistor to output a saturation current. The control circuit is further configured to determine a value of a second bit line voltage for driving the memory cells according to the saturation current. In addition, an operating method and a memory cell array of the resistive memory apparatus are also provided.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Applicant: Winbond Electronics Corp.
    Inventors: Ming-Che Lin, Min-Chih Wei, Ping-Kun Wang, Yu-Ting Chen, Chih-Cheng Fu, Chang-Tsung Pai
  • Patent number: 11964299
    Abstract: A method for manufacturing a golf ball having a multi-layered pattern is provided. Firstly, a semi-finished product of the golf ball is provided and includes a ball-shaped body and a base layer covering an outer surface of the ball-shaped body. Then, the semi-finished product of the golf ball is rotated at a predetermined rotation speed, and a color paint is applied to the semi-finished product of the golf ball by spraying from each of an upper position, a middle position, and a lower position. The multi-layered pattern includes an upper-layer pattern area, a mid-layer pattern area, and a lower-layer pattern area that are different in color from each other.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: April 23, 2024
    Assignee: FOREMOST GOLF MFG. LTD.
    Inventors: Chia-Sheng Huang, Chi-Ling Lin, Chia-Cheng Wu, Ching-Hsiang Liu
  • Patent number: 11965217
    Abstract: A method and a kit for detecting Mycobacterium tuberculosis are provided. The method includes a step of performing a nested qPCR assay to a specimen. The nested qPCR assay includes a first round of amplification using external primers and a second round of amplification using internal primers and a probe. The external primers have sequences of SEQ ID NOs. 1 and 2, and the internal primers and the probe have sequences of SEQ ID NOs. 3 to 5.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yi-Chen Li, Chih-Cheng Tsou, Min-Hsien Wu, Hsin-Yao Wang, Chien-Ru Lin
  • Patent number: 11966546
    Abstract: A display device includes a base layer, a touch sensing layer, a light guide module and a display panel. The touch sensing layer is disposed on the base layer. The light guide module is disposed on the touch sensing layer. The touch sensing layer is located between the light guide module and the display panel, and the touch sensing layer and one of the light guide module and the display panel have no adhesive material therebetween.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: April 23, 2024
    Assignee: E Ink Holdings Inc.
    Inventors: Chen-Cheng Lin, Chia-I Liu, Kun-Hsien Lee, Hung-Wei Tseng
  • Patent number: 11967272
    Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: April 23, 2024
    Assignees: AUO Corporation, National Cheng-Kung University
    Inventors: Chih-Lung Lin, Yi-Chen Huang, Chih-I Liu, Po-Cheng Lai, Ming-Yang Deng, Chia-En Wu, Ming-Hung Chuang, Chia-Tien Peng