Abstract: A driver for driving a light emitting device includes an output stage and a driving stage. The output stage is for outputting a driving current to the light emitting device according to a driving signal, wherein the light emitting device is coupled between the output stage and a second reference voltage different from the first reference voltage. The driving stage is for generating the driving signal to the output stage, wherein one of the third reference voltage and the fourth reference voltage is within a range between the first reference voltage and the second reference voltage, and the other of the third reference voltage and the fourth reference voltage is outside the range between the first reference voltage and the second reference voltage.

Abstract: A circuit providing a common voltage for a panel of a display includes a first operational amplifier, a second operational amplifier, a third operational amplifier, a capacitor and a switch circuit. The first operational amplifier outputs a first voltage. The second operational amplifier is powered by the first voltage and receives a polarity signal to output a second voltage. The third operational amplifier outputs a third voltage. The capacitor has a first end coupled to an output of the second operational amplifier and a second end coupled to an output of the third operational amplifier. The switch circuit couples the second end of the capacitor to the panel during a normal operation of the display, and couples one of a high constant voltage and a low constant voltage to the panel during a power saving operation of the display.

Abstract: A source driver with low consumption and the driving method thereof are provided herein. The source driver includes an output buffer with a first input terminal receiving a pixel signal, a second input terminal, and an output terminal coupled to the second input terminal and a display panel. The source driver also includes a pre-charge circuit pre-charges a first terminal of the display panel to a first preset voltage or a second preset voltage for a pre-charge period according to a polarity of a common voltage coupled to the display panel. The second preset voltage is smaller than the first preset voltage. The output buffer is inactivated during the pre-charge period and activated for a preset period after the pre-charge period. Therefore, the present invention reduces power consumption of the source driver.

Abstract: A source driver adapted to drive a display panel and a driving method thereof are provided herein. The source driver includes an output buffer and a first pre-charge circuit. The output buffer has a first input terminal receiving a pixel signal and has both of a second input terminal and an output terminal coupled to the display panel. The first pre-charge circuit charges the output terminal of the output buffer to a preset voltage associated with the pixel signal for a pre-charge period. The output buffer is inactivated during the pre-charge period and is activated for a preset period after the pre-charge period. Therefore, power consumption of the source driver can be reduced.

Abstract: A liquid crystal display (LCD) device with reduced power consumption is provided with a plurality of data lines, a plurality of gate lines, and at least one multiplexer. Each multiplexer can comprise a plurality of switches respectively connected to the corresponding data lines and controlled by a plurality of clock signals and configured to receive an image signal, and selectively output the image signal to one of the data lines via the switches. During a driving period, one of the gate lines can be asserted, and the switches can be turned on simultaneously, then only the first one of the switches remains turned on to transmit the image signal to the corresponding data line, and then the first one of the switches are turned off and the other switches are sequentially turned on one at a time to transmit the image signal to the corresponding data lines.

Abstract: A circuit providing a common voltage for a panel of a display includes a first operational amplifier, a second operational amplifier, a third operational amplifier, a capacitor and a switch circuit. The first operational amplifier outputs a first voltage. The second operational amplifier is powered by the first voltage and receives a polarity signal to output a second voltage. The third operational amplifier outputs a third voltage. The capacitor has a first end coupled to an output of the second operational amplifier and a second end coupled to an output of the third operational amplifier. The switch circuit couples the second end of the capacitor to the panel during a normal operation of the display, and couples one of a high constant voltage and a low constant voltage to the panel during a power saving operation of the display.

Abstract: For reducing device areas required by digital-to-analog converters used in source driving circuits of a liquid crystal display device, a compound circuit structure based on a pre-decoder, a binary decoder, and ROM decoders is set forth to meet the demand for cutting down the device areas. The pre-decoder is configured to decode a first sub-signal of a digital data signal for generating a plurality of control signals. Each of the ROM decoders is configured to select a gamma reference voltage out of one corresponding set of gamma reference voltages based on the control signals and a second sub-signal of the digital data signal. The binary decoder is configured to select one of the gamma reference voltages selected by the ROM decoders based on a third sub-signal of the digital data signal for outputting an output voltage. The number of transistors used by the compound circuit structure is then reduced significantly.

Abstract: An SRAM device is disclosed, which comprises a plurality of rows of SRAM cells and a line-buffer SRAM cell. Each row of SRAM cells is controlled by a word line. The line-buffer SRAM cell is coupled to the rows of SRAM cells and controlled by a read enable line. The signal on the read enable line is activated after the signal on the word line is activated, and part of the activated signal on the read enable line overlaps with the activated signal on the word line. The power provided to the line-buffer SRAM cell is selectively cut off.

Abstract: An SRAM device is disclosed, which comprises a plurality of rows of SRAM cells and a line-buffer SRAM cell. Each row of SRAM cells is controlled by a word line. The line-buffer SRAM cell is coupled to the rows of SRAM cells and controlled by a read enable line. The signal on the read enable line is activated after the signal on the word line is activated, and part of the activated signal on the read enable line overlaps with the activated signal on the word line. The power provided to the line-buffer SRAM cell is selectively cut off. Alternatively, the power provided to the line-buffer SRAM cell is cut off when the signal on the read enable line is deactivated.

Abstract: An organic light emitting display (OLED) panel has a plurality of organic light emitting diodes. The organic light emitting diodes are electrically connected to a plurality of segment lines and a plurality of common lines in a matrix structure. The organic light emitting diodes electrically connected to the same common lines are divided into a first group and a second group. Driving currents are separately supplied to the organic light emitting diodes of the first group and the second group according to a first pulse width modulation (PWM) manner and a second PWM manner. The first PWM manner and the second PWM manner have complementary waveforms in a period.

Abstract: An organic light emitting display (OLED) panel has a plurality of organic light emitting diodes. The organic light emitting diodes are electrically connected to a plurality of segment lines and a plurality of common lines in a matrix structure. The organic light emitting diodes electrically connected to the same common lines are divided into a first group and a second group. Driving currents are separately supplied to the organic light emitting diodes of the first group and the second group according to a first pulse width modulation (PWM) manner and a second PWM manner. The first PWM manner and the second PWM manner have complementary waveforms in a period.