Patents by Inventor Cheng-Ming Weng

Cheng-Ming Weng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070052107
    Abstract: A dual damascene structure comprising a substrate, a dielectric layer, a metal hard mask layer, a protection layer and a conductive layer is provided. The substrate has a conductive area. The dielectric layer is disposed on the substrate. The metal hard mask layer is disposed on the dielectric layer. The protection layer is disposed on the metal hard mask layer. A trench is disposed in the protection layer, the metal hard mask layer and a part of the dielectric layer. An opening is disposed in the dielectric layer under the trench. The opening exposes the conductive area. The conductive layer is disposed in the trench and the opening.
    Type: Application
    Filed: September 5, 2005
    Publication date: March 8, 2007
    Inventors: Cheng-Ming Weng, Miao-Chun Lin
  • Publication number: 20070049012
    Abstract: A dual damascene structure is described, including a substrate, a dielectric layer, a hard mask layer, a contact and a conductive line. The dielectric layer is located on the substrate, the hard mask layer is on the dielectric layer, the contact is located in the dielectric layer, and a horizontal cross-section of the contact has an asymmetrically rounded outline. The conductive line is in the hard mask layer and the dielectric layer, and is located on and electrically connected to the contact. The conductive line has a laterally swelling portion on an edge portion of the first contact, wherein the borders of the laterally swelling portion and the edge portion are contiguous.
    Type: Application
    Filed: August 31, 2005
    Publication date: March 1, 2007
    Inventors: Jen-Ren Huang, Cheng-Ming Weng, Miao-Chun Lin
  • Publication number: 20060252256
    Abstract: A low-k dielectric film is deposited on the wafer. A metal layer is then deposited over the low-k dielectric film. A resist pattern is formed over the metal layer. The resist pattern is then transferred to the underlying metal layer to form a metal pattern. The resist pattern is stripped off. A through hole is plasma etched into the low-k dielectric film by using the metal pattern as a hard mask. The plasma etching causes residues to deposit within the through hole. A first wet treatment is then performed to soften the residues. A plasma dry treatment is carried out to crack the residues. A second wet treatment is performed to completely remove the residues.
    Type: Application
    Filed: May 9, 2005
    Publication date: November 9, 2006
    Inventors: Cheng-Ming Weng, Miao-Chun Lin, Chun-Jen Huang