Patents by Inventor Cheng-Nan Lin

Cheng-Nan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11037891
    Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: June 15, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Nan Lin, Wei-Tung Chang, Jen-Chieh Kao, Huei-Shyong Cho
  • Publication number: 20210118767
    Abstract: A method for forming a chip package structure is provided. The method includes disposing a chip over a substrate. The method includes forming a heat-spreading wall structure over the substrate. The heat-spreading wall structure is adjacent to the chip, and there is a first gap between the chip and the heat-spreading wall structure. The method includes forming a first heat conductive layer in the first gap. The method includes forming a second heat conductive layer over the chip. The method includes disposing a heat-spreading lid over the substrate to cover the heat-spreading wall structure, the first heat conductive layer, the second heat conductive layer, and the chip. The heat-spreading lid is bonded to the substrate, the heat-spreading wall structure, the first heat conductive layer, and the second heat conductive layer.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 22, 2021
    Inventors: Shin CHI, Chien-Hao HSU, Kuo-Chin CHANG, Cheng-Nan LIN, Mirng-Ji LII
  • Publication number: 20210111134
    Abstract: An electronic device package includes a first conductive substrate, a second conductive substrate and a dielectric layer. The first conductive substrate has a first coefficient of thermal expansion (CTE). The second conductive substrate is disposed on an upper surface of the first conductive substrate and electrically connected to the first conductive substrate. The second conductive substrate has a second CTE. The dielectric layer is disposed on the upper surface of the first conductive substrate and disposed on at least one sidewall of the second conductive substrate. The dielectric layer has a third CTE. A difference between the first CTE and the second CTE is larger than a difference between the first CTE and the third CTE.
    Type: Application
    Filed: October 15, 2019
    Publication date: April 15, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Tung CHANG, Cheng-Nan LIN
  • Publication number: 20210096679
    Abstract: A touch display apparatus is disclosed. The touch display apparatus includes a touch display panel, a chip on film (COF) layer and a driving circuit. The touch display panel includes a display module and a touch sensor. The touch sensor is disposed on the display module. The COF layer includes a connecting portion and an extending portion connected to each other. The connecting portion is coupled to the display module and the extending portion is coupled to the touch sensor. The driving circuit is disposed on the COF layer. The driving circuit transmits touch signals with the touch sensor through the COF layer and its extending portion.
    Type: Application
    Filed: September 22, 2020
    Publication date: April 1, 2021
    Inventors: CHEN-WEI YANG, CHENG-NAN LIN
  • Patent number: 10950530
    Abstract: A semiconductor device package includes a first substrate, a second substrate, a first support element, a second support element and an electronic component. The first substrate has a first surface and a second surface opposite to the first surface. The first substrate has a conductive pad adjacent to the first surface of the first substrate. The second substrate is disposed over the first surface of the first substrate. The first support element is disposed between the first substrate and the second substrate. The first support element is disposed adjacent to an edge of the first surface of the first substrate. The second support element is disposed between the first substrate and the second substrate. The second support element is disposed far away from the edge of the first surface of the first substrate. The electronic component is disposed on the second surface of the first substrate.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: March 16, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Nan Lin, Jen-Chieh Kao
  • Publication number: 20200388928
    Abstract: A semiconductor device package includes a substrate, a first molding compound and antenna layer. The substrate has a first surface and a second surface opposite to the first surface. The first molding compound is disposed on the first surface of the substrate. The antenna layer is disposed on the first molding compound. The substrate, the first molding compound and the antenna layer define a cavity.
    Type: Application
    Filed: June 5, 2019
    Publication date: December 10, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Nan LIN, Hsu-Nan FANG
  • Publication number: 20200365499
    Abstract: A semiconductor device package includes a first substrate, a second substrate, a first support element, a second support element and an electronic component. The first substrate has a first surface and a second surface opposite to the first surface. The first substrate has a conductive pad adjacent to the first surface of the first substrate. The second substrate is disposed over the first surface of the first substrate. The first support element is disposed between the first substrate and the second substrate. The first support element is disposed adjacent to an edge of the first surface of the first substrate. The second support element is disposed between the first substrate and the second substrate. The second support element is disposed far away from the edge of the first surface of the first substrate. The electronic component is disposed on the second surface of the first substrate.
    Type: Application
    Filed: May 17, 2019
    Publication date: November 19, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Nan LIN, Jen-Chieh KAO
  • Patent number: 10784208
    Abstract: The present disclosure provides a semiconductor package device and a method for manufacturing the same. In embodiments of the present disclosure, a semiconductor package device includes a carrier, a first antenna, a second antenna, a package body and a first shield. The carrier includes an antenna area and a component area. The first antenna is formed on the antenna area. The second antenna extends from the antenna area and over the first antenna. The second antenna is electrically connected to the first antenna. The package body includes a first portion covering the component area and a second portion covering the antenna area. The first shield is conformally formed on the first portion of the package body and exposes the second portion of package body.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: September 22, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Kuo-Hsien Liao, Cheng-Nan Lin, Chieh-Chen Fu
  • Publication number: 20200273823
    Abstract: A semiconductor device package includes a first substrate, a second substrate, an electrical contact and a support element. The first substrate has a first surface. The second substrate has a first surface facing the first surface of the first substrate. The electrical contact is disposed between the first substrate and the second substrate. The support element is disposed between the first substrate and the second substrate. The support element includes a thermosetting material.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 27, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsiang Chi CHEN, Cheng-Nan LIN
  • Publication number: 20200098709
    Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.
    Type: Application
    Filed: June 26, 2019
    Publication date: March 26, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Nan LIN, Wei-Tung CHANG, Jen-Chieh KAO, Huei-Shyong CHO
  • Patent number: 10431554
    Abstract: A semiconductor device package includes: (1) a carrier; (2) an electronic component disposed over a top surface of the carrier; (3) a package body disposed over the top surface of the carrier and covering the electronic component; and (4) a shield layer, including a first magnetically permeable layer disposed over the package body, a first electrically conductive layer disposed over the first magnetically permeable layer, and a second magnetically permeable layer disposed over the first electrically conductive layer. The first electrically conductive layer is interposed between the first magnetically permeable layer and the second magnetically permeable layer. A permeability of the first electrically conductive layer is different from a permeability of the first magnetically permeable layer and a permeability of the second magnetically permeable layer.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: October 1, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: I-Chia Lin, Chieh-Chen Fu, Kuo Hsien Liao, Cheng-Nan Lin
  • Publication number: 20190140024
    Abstract: An OLED touch display operation method is disclosed. The OLED touch display operation method includes the following steps: controlling a touch scan transition timing and a display multiplexer switching timing to maintain a specific equidistant relationship; when the OLED touch display performs display function, the OLED touch display performs touch scanning only for a part of display time, and stops touch scanning or performs touch voltage compensation scanning for another part of display time; and when being interfered by external noise, the OLED touch display performs touch scanning only in a blanking period out of the display time and the touch scanning frequency can be adjusted to avoid interference of external noise.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 9, 2019
    Inventors: CHEN-WEI YANG, CHENG-NAN LIN
  • Patent number: 10163400
    Abstract: A display driving apparatus including a lightness adjusting unit, a gamma adjusting unit, a pre-charging voltage adjusting unit and a source driving unit is disclosed. The lightness adjusting unit receives and adjusts a lightness of an image data. The gamma adjusting unit adjusts a gamma voltage corresponding to the image data to generate a source data voltage. The pre-charging voltage adjusting unit calculates a highest data voltage and a lowest data voltage which can be outputted by a source electrode and adjusts a pre-charging voltage accordingly to make the adjusted pre-charging voltage the same with the highest data voltage or the lowest data voltage or only a shifted voltage different from the highest data voltage or the lowest data voltage of the image data. The source driving unit outputs the adjusted pre-charging voltage and the source data voltage to a display panel respectively.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: December 25, 2018
    Assignee: Raydium Semiconductor Corporation
    Inventors: Huang-Ren Chen, Cheng-Nan Lin, Shao-Ping Hung
  • Publication number: 20180158783
    Abstract: A semiconductor device package includes: (1) a carrier; (2) an electronic component disposed over a top surface of the carrier; (3) a package body disposed over the top surface of the carrier and covering the electronic component; and (4) a shield layer, including a first magnetically permeable layer disposed over the package body, a first electrically conductive layer disposed over the first magnetically permeable layer, and a second magnetically permeable layer disposed over the first electrically conductive layer. The first electrically conductive layer is interposed between the first magnetically permeable layer and the second magnetically permeable layer. A permeability of the first electrically conductive layer is different from a permeability of the first magnetically permeable layer and a permeability of the second magnetically permeable layer.
    Type: Application
    Filed: January 15, 2018
    Publication date: June 7, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: I-Chia LIN, Chieh-Chen FU, Kuo Hsien LIAO, Cheng-Nan LIN
  • Patent number: 9871005
    Abstract: A semiconductor device package includes a carrier, an electronic component disposed over a top surface of the carrier, and a package body disposed over the top surface of the carrier and covering the electronic component. The semiconductor device package further includes a shield layer, which in turn includes a first electrically conductive layer, a first magnetically permeable layer, and a second electrically conductive layer, where the first magnetically permeable layer is interposed between and directly contacts the first electrically conductive layer and the second electrically conductive layer.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: January 16, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: I-Chia Lin, Chieh-Chen Fu, Kuo Hsien Liao, Cheng-Nan Lin
  • Publication number: 20170345374
    Abstract: A display driving apparatus including a lightness adjusting unit, a gamma adjusting unit, a pre-charging voltage adjusting unit and a source driving unit is disclosed. The lightness adjusting unit receives and adjusts a lightness of an image data. The gamma adjusting unit adjusts a gamma voltage corresponding to the image data to generate a source data voltage. The pre-charging voltage adjusting unit calculates a highest data voltage and a lowest data voltage which can be outputted by a source electrode and adjusts a pre-charging voltage accordingly to make the adjusted pre-charging voltage the same with the highest data voltage or the lowest data voltage or only a shifted voltage different from the highest data voltage or the lowest data voltage of the image data. The source driving unit outputs the adjusted pre-charging voltage and the source data voltage to a display panel respectively.
    Type: Application
    Filed: May 24, 2017
    Publication date: November 30, 2017
    Inventors: HUANG-REN CHEN, CHENG-NAN LIN, SHAO-PING HUNG
  • Publication number: 20170200682
    Abstract: A semiconductor device package includes a carrier, an electronic component disposed over a top surface of the carrier, and a package body disposed over the top surface of the carrier and covering the electronic component. The semiconductor device package further includes a shield layer, which in turn includes a first electrically conductive layer, a first magnetically permeable layer, and a second electrically conductive layer, where the first magnetically permeable layer is interposed between and directly contacts the first electrically conductive layer and the second electrically conductive layer.
    Type: Application
    Filed: January 7, 2016
    Publication date: July 13, 2017
    Inventors: I-Chia LIN, Chieh-Chen FU, Kuo Hsien LIAO, Cheng-Nan LIN
  • Patent number: 9653407
    Abstract: The present disclosure relates to a semiconductor device package and a method for manufacturing the semiconductor device package. The semiconductor device package includes a substrate, a grounding element, a component, a package body and a conductive layer. The grounding element is disposed in the substrate and includes a connection surface exposed at a second portion of a lateral surface of the substrate. The component is disposed on a top surface of the substrate. The package body covers the component and the top surface of the substrate. A lateral surface of the package body is aligned with the lateral surface of the substrate. The conductive layer covers a top surface and the lateral surface of the package body, and further covers the second portion of the lateral surface of the substrate. A first portion of the lateral surface of the substrate is exposed from the conductive layer.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: May 16, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Shih-Ren Chen, Cheng-Nan Lin
  • Patent number: 9640476
    Abstract: A driving circuit and a pin output order arranging method are disclosed. The driving circuit includes (M*N) pins and an arranging module. A first pin˜an N-th pin of the (M*N) pins, a (N+1)-th pin˜an 2N-th pin of the (M*N) pins, . . . , a [(M?1)*N+1]-th pin˜a (M*N)-th pin of the (M*N) pins are arranged along a first direction in a specific distance spaced to form a first row of pins˜an M-th row of pins. The first row of pins˜the M-th row of pins are staggered along a second direction in a staggering way or an aligning way. M and N are integers larger than 1. The arranging module correspondingly arranges the pin output order of the (M*N) pins according to different application modes of the driving circuit.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: May 2, 2017
    Assignee: Raydlum Semiconductor Corporation
    Inventors: Shin-Tai Lo, Cheng-Nan Lin, Shao-Ping Hung
  • Publication number: 20170077039
    Abstract: The present disclosure provides a semiconductor package device and a method for manufacturing the same. In embodiments of the present disclosure, a semiconductor package device includes a carrier, a first antenna, a second antenna, a package body and a first shield. The carrier includes an antenna area and a component area. The first antenna is formed on the antenna area. The second antenna extends from the antenna area and over the first antenna. The second antenna is electrically connected to the first antenna. The package body includes a first portion covering the component area and a second portion covering the antenna area. The first shield is conformally formed on the first portion of the package body and exposes the second portion of package body.
    Type: Application
    Filed: June 7, 2016
    Publication date: March 16, 2017
    Inventors: Kuo-Hsien Liao, Cheng-Nan Lin, Chieh-Chen Fu