Patents by Inventor Cheng-Po Yu
Cheng-Po Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8247705Abstract: A manufacturing method of a circuit substrate includes the following steps. A dielectric layer is formed on at least one surface of a substrate. An insulating layer is formed on the dielectric layer. A portion of the insulating layer and a portion of the dielectric layer are removed, so as to form at least one blind via in the dielectric layer and the insulating layer. An electroless plating layer is formed on the sidewall of the blind via and a remaining portion of the insulating layer, wherein the binding strength between the insulating layer and the electroless plating layer is greater than that between the dielectric layer and the electroless plating layer. A patterned conductive layer is plated to cover the electroless plating layer.Type: GrantFiled: March 5, 2010Date of Patent: August 21, 2012Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20120174391Abstract: A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.Type: ApplicationFiled: March 19, 2012Publication date: July 12, 2012Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Tsung-Yuan Chen, Chun-Chien Chen, Cheng-Po Yu
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Patent number: 8217278Abstract: An embedded wiring board includes an upper wiring layer, a lower wiring layer, an insulation layer, a first conductive pillar and a second conductive pillar. The upper wiring layer contains an upper pad, the lower wiring layer contains a lower pad, and the insulation layer contains an upper surface and a lower surface opposite to the upper surface. The upper pad is embedded in the upper surface and the lower pad is embedded in the lower surface. The first conductive pillar is located in the insulation layer and includes an end surface which is exposed by the upper surface. A height of the first conductive pillar relative to the upper surface is larger than a depth of the upper pad relative to the upper surface. In addition, the second conductive pillar is located in the insulation layer and is connected between the first conductive pillar and the lower pad.Type: GrantFiled: November 5, 2009Date of Patent: July 10, 2012Assignee: Unimicron Technology Corp.Inventor: Cheng-Po Yu
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Patent number: 8171626Abstract: A method for forming an embedded circuit is disclosed. First, a substrate including a dielectric layer is provided. Second, the dielectric layer is entirely covered by a dummy layer. Then, the dummy layer is patterned and a trench is formed in the dielectric layer at the same time. Later, a seed layer is formed to entirely cover the dummy layer and the trench. Next, the dummy layer is removed and the seed layer covering the dummy layer is removed, too. Afterwards, a metal layer is filled in the trench to form an embedded circuit embedded in the dielectric layer.Type: GrantFiled: June 7, 2011Date of Patent: May 8, 2012Assignee: Unimicron Technology Corp.Inventors: Cheng-Po Yu, Chi-Min Chang
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Patent number: 8166652Abstract: A circuit structure of a circuit board includes a dielectric layer, a number of first circuits, and a number of second circuits. The dielectric layer has a surface and an intaglio pattern. The first circuits are disposed on the surface of the dielectric layer. The second circuits are disposed in the intaglio pattern of the dielectric layer. Line widths of the second circuits are smaller than line widths of the first circuits, and a distance between every two of the adjacent second circuits is shorter than a distance between every two of the adjacent first circuits.Type: GrantFiled: November 13, 2008Date of Patent: May 1, 2012Assignee: Unimicron Technology Corp.Inventor: Cheng-Po Yu
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Patent number: 8161638Abstract: A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer.Type: GrantFiled: May 20, 2010Date of Patent: April 24, 2012Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20120067630Abstract: A circuit structure of a circuit board includes a dielectric layer, a number of first circuits, and a number of second circuits. The dielectric layer has a surface and an intaglio pattern. The first circuits are disposed on the surface of the dielectric layer. The second circuits are disposed in the intaglio pattern of the dielectric layer. Line widths of the second circuits are smaller than line widths of the first circuits, and a distance between every two of the adjacent second circuits is shorter than a distance between every two of the adjacent first circuits.Type: ApplicationFiled: November 28, 2011Publication date: March 22, 2012Applicant: UNIMICRON TECHNOLOGY CORP.Inventor: Cheng-Po Yu
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Publication number: 20120060368Abstract: A method of fabrication a circuit board structure comprising providing a circuit board main body, forming a molded, irregular plastic body having a non-plate type, stereo structure and at least one scraggy surface by encapsulating at least a portion of said circuit board main body with injection molded material, and forming a first three-dimensional circuit pattern on said molded, irregular plastic body thereby defining a three-dimensional circuit device.Type: ApplicationFiled: November 22, 2011Publication date: March 15, 2012Inventors: Cheng-Po Yu, Han-Pei Huang
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Publication number: 20120031652Abstract: A circuit board includes a metal pattern layer, a thermally conductive plate, an electrically insulating layer, and at least one electrically insulating material. The thermally conductive plate has a plane. The electrically insulating layer is disposed between the metal pattern layer and the plane and partially covers the plane. The electrically insulating material covers the plane where is not covered by the electrically insulating layer and touches the thermally conductive plate. The electrically insulating layer exposes the electrically insulating material, and a thermal conductivity of the electrically insulating material is larger than a thermal conductivity of the electrically insulating layer.Type: ApplicationFiled: March 17, 2011Publication date: February 9, 2012Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: TZYY-JANG TSENG, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20120031651Abstract: A circuit board including a circuit layer, a thermally conductive substrate, an insulation layer, and at least one thermally conductive material is provided. The thermally conductive substrate has a plane. The insulation layer is disposed between the circuit layer and the plane and partially covers the plane. The thermally conductive material covers the plane without covered by the insulation layer and is in contact with the thermally conductive substrate. The insulation layer exposes the thermally conductive material.Type: ApplicationFiled: November 11, 2010Publication date: February 9, 2012Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: TZYY-JANG TSENG, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20110155427Abstract: A manufacturing method of a circuit substrate includes the following steps. A dielectric layer is formed on at least one surface of a substrate. An insulating layer is formed on the dielectric layer. A portion of the insulating layer and a portion of the dielectric layer are removed, so as to form at least one blind via in the dielectric layer and the insulating layer. An electroless plating layer is formed on the sidewall of the blind via and a remaining portion of the insulating layer, wherein the binding strength between the insulating layer and the electroless plating layer is greater than that between the dielectric layer and the electroless plating layer. A patterned conductive layer is plated to cover the electroless plating layer.Type: ApplicationFiled: March 5, 2010Publication date: June 30, 2011Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20110100543Abstract: A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer.Type: ApplicationFiled: May 20, 2010Publication date: May 5, 2011Applicant: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20110094779Abstract: A circuit structure including a circuit board, an insulating layer, a conductive via, a platable dielectric layer and a conductive pattern is provided. The insulating layer is disposed on the circuit board and covers a circuit layer of the circuit board. The conductive via passes through the insulating layer and connects the circuit layer and protrudes from a surface of the insulating layer. The platable dielectric layer having a trench pattern is disposed on the surface of the insulating layer wherein the portion of the conductive via protruding from the surface is located in the trench pattern. The material of the platable dielectric layer includes a chemical platable material. The conductive pattern is in the trench pattern and connects the conductive via wherein an interface exists between the conductive pattern and the conductive via and protrudes from the surface of the insulating layer.Type: ApplicationFiled: March 5, 2010Publication date: April 28, 2011Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Tzyy-Jang Tseng, Chang-Ming Lee, Wen-Fang Liu, Cheng-Po Yu
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Publication number: 20110094778Abstract: A method for fabricating a circuit board is provided. A non-conductive material layer is provided on a core substrate, wherein the non-conductive material layer comprises a dielectric material and catalytic particles. A recessed circuit structure is then formed in the non-conductive material layer with a laser beam. Simultaneously, the catalytic particles in the recessed circuit structure are activated with aid of the laser. A buried conductive structure is then formed in the recessed circuit structure by chemical copper deposition methods.Type: ApplicationFiled: October 27, 2009Publication date: April 28, 2011Inventors: Cheng-Po Yu, Chi-Min Chang, Wei-Ming Cheng
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Patent number: 7921550Abstract: A process for forming a circuit structure includes providing a first composite-layer structure at first. A second composite-layer structure is then provided. The first composite-layer structure, a second dielectric layer and the second composite-layer structure are pressed so that a second circuit pattern and an independent via pad are embedded in the second dielectric layer, and the second dielectric layer is connected to the first dielectric layer. A first carrier substrate and a second carrier substrate are removed to expose a first circuit pattern and the second circuit pattern. At least one first opening that passes through the second dielectric layer and exposes the independent via pad is formed, and the first opening is filled with a conductive material to form a second conductive via that connects the independent via pad and a second via pad.Type: GrantFiled: December 29, 2008Date of Patent: April 12, 2011Assignee: Unimicron Technology Corp.Inventor: Cheng-Po Yu
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Publication number: 20110048783Abstract: An embedded wiring board includes an upper wiring layer, a lower wiring layer, an insulation layer, a first conductive pillar and a second conductive pillar. The upper wiring layer contains an upper pad, the lower wiring layer contains a lower pad, and the insulation layer contains an upper surface and a lower surface opposite to the upper surface. The upper pad is embedded in the upper surface and the lower pad is embedded in the lower surface. The first conductive pillar is located in the insulation layer and includes an end surface which is exposed by the upper surface. A height of the first conductive pillar relative to the upper surface is larger than a depth of the upper pad relative to the upper surface. In addition, the second conductive pillar is located in the insulation layer and is connected between the first conductive pillar and the lower pad.Type: ApplicationFiled: November 5, 2009Publication date: March 3, 2011Inventor: Cheng-Po YU
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Publication number: 20110023297Abstract: A method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink jet printing that includes providing a substrate, forming a first self-assembly membrane (SAM) on at least one side of the substrate, forming a non-adhesive membrane on the first SAM, forming at least one microhole in the substrate, forming a second SAM on a surface of the microhole, providing catalyst particles on the at least one side of the substrate and on the surface of the microhole, and forming a catalyst circuit pattern on the substrate.Type: ApplicationFiled: October 12, 2010Publication date: February 3, 2011Inventors: Ming-Huan Yang, Chung-Wei Wang, Chia-Chi Wu, Chao-Kai Cheng, Tzyy-Jang Tseng, Chang-Ming Lee, Cheng-Po Yu, Cheng-Hung Yu
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Patent number: 7867908Abstract: A method of fabricating a substrate includes following steps. First, a metallic panel having a first surface and a second surface is provided. A first half-etching process is carried out to etch the first surface of the metallic panel to a first depth so that a first patterned metallic layer is formed on the first surface. Next, a first insulating material is deposited into gaps in the first patterned metallic layer to form a first insulator. Thereafter, a second half-etching process is carried out to etch the second surface of the metallic panel to a second depth and expose at least a portion of the first insulator so that a second patterned metallic layer is formed on the second surface. The first depth and the second depth together equal the thickness of the metallic panel.Type: GrantFiled: April 13, 2009Date of Patent: January 11, 2011Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Chih-Ming Chang, Cheng-Po Yu, Chung W. Ho
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Patent number: 7834274Abstract: A method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink-jet printing that includes providing a substrate, forming a first self-assembly membrane (SAM) on at least one side of the substrate, forming a non-adhesive membrane on the first SAM, forming at least one microhole in the substrate, forming a second SAM on a surface of the microhole, providing catalyst particles on the at least one side of the substrate and on the surface of the microhole, and forming a catalyst circuit pattern on the substrate.Type: GrantFiled: October 31, 2006Date of Patent: November 16, 2010Assignees: Industrial Technology Research Institute, Unimicron Technology Corp.Inventors: Ming-Huan Yang, Chung-Wei Wang, Chia-Chi Wu, Chao-Kai Cheng, Tzyy-Jang Tseng, Chang-Ming Lee, Cheng-Po Yu, Cheng-Hung Yu
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Publication number: 20100266752Abstract: A method for forming a circuit board structure of composite material is disclosed. First, a composite material structure including a substrate and a composite material dielectric layer is provided. The composite material dielectric layer includes a catalyst dielectric layer contacting the substrate and at least one sacrificial layer contacting the catalyst dielectric layer. The sacrificial layer is insoluble in water. Later, the composite material dielectric layer is patterned and simultaneously catalyst particles are activated. Then, a conductive layer is formed on the activated catalyst particles. Afterwards, at least one sacrificial layer is removed.Type: ApplicationFiled: April 20, 2010Publication date: October 21, 2010Inventors: Tzyy-Jang Tseng, Cheng-Po Yu, Wen-Fang Liu