Abstract: Base plates of a substrate retainer transportation mechanism are provided with damping members to assist elastic members in damping and limiting movement of the substrate retainer transportation mechanism when the substrate transportation mechanism is subjected to unwanted external forces, e.g., seismic forces. By damping and limiting movement of the substrate retainer transportation mechanism, undesirable damage to substrates contained in a substrate retainer being carried by the substrate retainer transport mechanism can be minimized.

Abstract: In some examples, a computing device can include a processor resource and a non-transitory memory resource storing machine-readable instructions stored thereon that, when executed, cause the processor resource to: generate, on a display, a first layer that includes selectable inputs, generate, on the display, a second layer on the first layer to generate an illumination above a threshold illumination on a portion of the display, and provide, on the display, interaction with the selectable inputs of the first layer when the selectable inputs are covered by the second layer.

Abstract: High-voltage semiconductor device and method of forming the same, the high-voltage semiconductor device includes a substrate, a gate structure, a drain, a first insulating structure and a drain doped region. The gate structure is disposed on the substrate. The drain is disposed in the substrate, at one side of the gate structure. The first insulating structure is disposed on the substrate, under the gate structure to partially overlap with the gate structure. The drain doped region is disposed in the substrate, under the drain and the first insulating structure, and the drain doped region includes a discontinuous bottom surface.

Abstract: High-voltage semiconductor device and method of forming the same, the high-voltage semiconductor device includes a substrate, a gate structure, a drain, a first insulating structure and a drain doped region. The gate structure is disposed on the substrate. The drain is disposed in the substrate, at one side of the gate structure. The first insulating structure is disposed on the substrate, under the gate structure to partially overlap with the gate structure. The drain doped region is disposed in the substrate, under the drain and the first insulating structure, and the drain doped region includes a discontinuous bottom surface.

Abstract: High-voltage semiconductor device and method of forming the same, the high-voltage semiconductor device includes a substrate, a gate structure, a drain, a first insulating structure and a drain doped region. The gate structure is disposed on the substrate. The drain is disposed in the substrate, at one side of the gate structure. The first insulating structure is disposed on the substrate, under the gate structure to partially overlap with the gate structure. The drain doped region is disposed in the substrate, under the drain and the first insulating structure, and the drain doped region includes a discontinuous bottom surface.

Abstract: An example non-transitory computer-readable storage medium comprises instructions that, when executed by a processing resource of a computing device, cause the processing resource to present an interface of an application on a first display of the computing device. The instructions further cause the processing resource to, in response to receiving a selection of a boundary that defines a portion of the interface, present the portion on a second display of the computing device.

Abstract: An example non-transitory computer-readable storage medium comprises instructions that, when executed by a processing resource of a computing device, cause the processing resource to determine a portion of an interface moved from a first display to a second display. The instructions further cause the processing resource to compare the portion of the interface moved from the first display to the second display to a threshold. The instructions further cause the processing resource to move the interface automatically from the first display to the second display responsive to a determination that the portion of the interface moved to the second display exceeds the threshold.

Abstract: An information display method for a computer having a keyboard. The method includes selecting a first system information among a plurality of system information, wherein the system information is configured to respectively indicate statuses of a plurality of devices of the computer; selecting a first display pattern among a plurality of display patterns according to the first system information; selecting a first keyboard region for applying the first display pattern; and showing the first system information in real-time by a plurality of first buttons corresponding to the first keyboard region of the keyboard according to the selected first display pattern, the first keyboard region and the first system information.

Abstract: A plasma processing system and a method for controlling a plasma in semiconductor fabrication are provided. The system includes a remote plasma module configured to generate a plasma. The system further includes a compound mixing member configured to receive the plasma. The system also includes a processing chamber configured to receive the plasma from the compound mixing member for processing. In addition, the system includes a detection module configured to monitor the plasma in the compound mixing member.

Abstract: An LDMOS includes a body region disposed in the substrate and having a first conductivity type; a drift region disposed in the substrate and having a second conductivity type; a source region disposed in the body region and having the second conductivity type; a drain region disposed in the drift region and having the second conductivity type; an isolation region disposed in the drift region between the source region and the drain region; a gate disposed on the body region and the drift region; a source field plate electrically connected to the source region; a drain field plate electrically connected to the drain region; and a first gate plate electrically connected to the gate. The first gate plate is correspondingly disposed above the gate. The shapes of the first gate plate and the gate are substantially the same when viewed from a top view.

Abstract: A thermal chemical vapor deposition (CVD) system includes a bottom chamber, an upper chamber, a workpiece support, a heater and at least one shielding plate. The upper chamber is present over the bottom chamber. The upper chamber and the bottom chamber define a chamber space therebetween. The workpiece support is configured to support a workpiece in the chamber space. The heater is configured to apply heat to the workpiece. The shielding plate is configured to at least partially shield the bottom chamber from the heat.

Abstract: A semiconductor structure including a substrate, a first well, a field oxide layer, a first conductive line and a second conductive line is provided. The substrate has a first conductivity type. The first well is formed on the substrate and has a second conductivity type. The field oxide layer is disposed on the first well. The first conductive line is formed on the field oxide layer and is in direct contact with the field oxide layer. The second conductive line is formed on the field oxide layer and is in direct contact with the field oxide layer. The first conductive line is spaced apart from the second conductive line.

Abstract: A semiconductor structure including a substrate, a first well, a field oxide layer, a first conductive line and a second conductive line is provided. The substrate has a first conductivity type. The first well is formed on the substrate and has a second conductivity type. The field oxide layer is disposed on the first well. The first conductive line is formed on the field oxide layer and is in direct contact with the field oxide layer. The second conductive line is formed on the field oxide layer and is in direct contact with the field oxide layer. The first conductive line is spaced apart from the second conductive line.

Abstract: A semiconductor structure includes a substrate, a first insulating layer, a second insulating layer, a first seal ring structure, a second seal ring structure, and a passivation layer. The substrate has a chip region and a seal ring region. The first insulating layer is on the substrate. The second insulating layer is on the first insulating layer. The first seal ring structure is in the seal ring region and embedded in the first insulating layer and the second insulating layer, wherein the first seal ring structure includes a stack of metal layers. The second seal ring structure is in the seal ring region and embedded in the first insulating layer, wherein the second seal ring structure includes a polysilicon ring structure. The passivation layer is on the second insulating layer and the first seal ring structure.

Abstract: An information display method for a computer having a keyboard. The method includes selecting a first system information among a plurality of system information, wherein the system information is configured to respectively indicate statuses of a plurality of devices of the computer; selecting a first display pattern among a plurality of display patterns according to the first system information; selecting a first keyboard region for applying the first display pattern; and showing the first system information in real-time by a plurality of first buttons corresponding to the first keyboard region of the keyboard according to the selected first display pattern, the first keyboard region and the first system information.

Abstract: An information display method for a computer having a keyboard. The method includes selecting a first system information among a plurality of system information, wherein the system information is configured to respectively indicate statuses of a plurality of devices of the computer; selecting a first display pattern among a plurality of display patterns according to the first system information; selecting a first keyboard region for applying the first display pattern; and showing the first system information in real-time by a plurality of first buttons corresponding to the first keyboard region of the keyboard according to the selected first display pattern, the first keyboard region and the first system information.

Abstract: A plasma processing system and a method for controlling a plasma in semiconductor fabrication are provided. The system includes a remote plasma module configured to generate a plasma. The system further includes a compound mixing member configured to receive the plasma. The system also includes a processing chamber configured to receive the plasma from the compound mixing member for processing. In addition, the system includes a detection module configured to monitor the plasma in the compound mixing member.

Abstract: A semiconductor structure is provided. A substrate has a first conductivity type. A first well and a second well are formed in the substrate. The first well has a second conductivity type. The second well has the first conductivity type. A doped region is formed in the first well and has the second conductivity type. A gate structure is disposed over the substrate and overlaps a portion of the first well and a portion of the second well. An insulating layer is disposed over the substrate and is spaced apart from the gate structure. A conducting wire is disposed on the insulating layer and includes a first input terminal and a first output terminal. The first input terminal is configured to receive an input voltage. The first output terminal is electrically connected to the doped region.

Abstract: An LDMOS includes a body region disposed in the substrate and having a first conductivity type; a drift region disposed in the substrate and having a second conductivity type; a source region disposed in the body region and having the second conductivity type; a drain region disposed in the drift region and having the second conductivity type; an isolation region disposed in the drift region between the source region and the drain region; a gate disposed on the body region and the drift region; a source field plate electrically connected to the source region; a drain field plate electrically connected to the drain region; and a first gate plate electrically connected to the gate. The first gate plate is correspondingly disposed above the gate. The shapes of the first gate plate and the gate are substantially the same when viewed from a top view.

Abstract: A plasma processing system and a method for controlling a plasma in semiconductor fabrication are provided. The system includes a remote plasma module configured to generate a plasma. The system further includes a compound mixing member configured to receive the plasma. The system also includes a processing chamber configured to receive the plasma from the compound mixing member for processing. In addition, the system includes a detection module configured to monitor the plasma in the compound mixing member.