Patents by Inventor Cheng-Wen Wu

Cheng-Wen Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210367076
    Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 25, 2021
    Inventors: Chung-Chiang Wu, Wei-Chin Lee, Shih-Hang Chiu, Chia-Ching Lee, Hsueh Wen Tsau, Cheng-Yen Tsai, Cheng-Lung Hung, Da-Yuan Lee, Ching-Hwanq Su
  • Publication number: 20210351048
    Abstract: In an embodiment, an apparatus comprising: a heater configured to heat a wafer located on a wafer staging area of the heater, the heater comprising a heater shaft extending below the wafer staging area; and a heater lift assembly comprising: a lift shaft configured to move the heater shaft in a vertical direction; a clamp that connects the heater shaft to the lift shaft; and a damper disposed on top of the clamp.
    Type: Application
    Filed: May 8, 2020
    Publication date: November 11, 2021
    Inventors: Kai-Wen WU, Chun-Ta CHEN, Chin-Shen HSIEH, Cheng-Yi HUANG
  • Patent number: 11152306
    Abstract: A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: October 19, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Yi Wu, Li-Hsuan Chu, Ching-Wen Wen, Chia-Chun Hung, Chen Liang Chang, Chin-Szu Lee, Hsiang Liu
  • Patent number: 11143272
    Abstract: A dual-shaft clutch varying speed device includes a drive unit, an input shaft, an output shaft, a housing, at least an odd-numbered clutch unit and at least an even-numbered clutch unit. The input shaft having an input gear is coupled with the drive unit. The output shaft, having an end thereof penetrate through the input shaft and the drive unit, has at least an odd-numbered output gear and at least an even-numbered output gear. The housing has a housing gear. The at least one odd-numbered clutch unit being furnished at the inner part of the housing has an odd-numbered clutch shaft and an odd-numbered clutch gear which is meshed with the odd-numbered output gear. The at least one odd-numbered clutch unit has an even-numbered clutch shaft and an even-numbered clutch gear which is meshed with the even-numbered output gear.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: October 12, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Meng-Ru Wu, Chia Tsao, Peng-Yu Chen, Jui-Tang Tseng, Cheng-Ping Yang, Po-Wen Chen
  • Publication number: 20210313510
    Abstract: A semiconductor device includes a magnetic random access memory (MRAM). The MRAM comprises a plurality of MRAM cells including a first type MRAM cell and a second type MRAM cell. Each of the plurality of MRAM cells includes a magnetic tunneling junction (MTJ) layer including a pinned magnetic layer, a tunneling barrier layer and a free magnetic layer. A size of the MTJ film stack of the first type MRAM cell is different from a size of the MTJ film stack of the second type MRAM cell. In one or more of the foregoing and following embodiments, a width of the MTJ film stack of the first type MRAM cell is different from a width of the MTJ film stack of the second type MRAM cell.
    Type: Application
    Filed: June 14, 2021
    Publication date: October 7, 2021
    Inventors: Huang-Wen TSENG, Cheng-Chou WU, Che-Jui CHANG
  • Publication number: 20210284846
    Abstract: A pigment composite particle is provided, which includes an organic pigment core, a polyelectrolyte shell wrapped around the organic pigment core, and an oxide shell wrapped around the polyelectrolyte shell. The organic pigment core is water-insoluble. The organic pigment core and the polyelectrolyte shell have a weight ratio of 1:0.25 to 1:1. The oxide shell is formed from tetraalkyl orthosilicate, tetraalkyl orthotitanate, or a combination thereof, and the organic pigment core and the tetraalkyl orthosilicate, tetraalkyl orthotitanate, or the combination thereof have a weight ratio of 1:0.7 to 1:3.
    Type: Application
    Filed: March 16, 2020
    Publication date: September 16, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Cheng En WU, Li Wen CHEN, Chih Lung CHIU, Pang-Hung LIU
  • Patent number: 11121918
    Abstract: An intelligent network management device including an analytic unit, conducting an analysis according to received packets in order to determine whether a given event is occurred; and a processing unit, generating and sending a control instruction to a SDN controller to change configurations of a SDN switch when the analytic unit determined the given event has been occurred.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: September 14, 2021
    Assignee: International Business Machines Corporation
    Inventors: Chih-Wen Chao, Cheng-Ta Lee, Wei-Shiau Suen, Ming-Hsun Wu
  • Publication number: 20210272895
    Abstract: A semiconductor device includes a first gate structure extending along a first lateral direction. The semiconductor device includes a first interconnect structure, disposed above the first gate structure, that extends along a second lateral direction perpendicular to the first lateral direction. The first interconnect structure includes a first portion and a second portion electrically isolated from each other by a first dielectric structure. The semiconductor device includes a second interconnect structure, disposed between the first gate structure and the first interconnect structure, that electrically couples the first gate structure to the first portion of the first interconnect structure. The second interconnect structure includes a recessed portion that is substantially aligned with the first gate structure and the dielectric structure along a vertical direction.
    Type: Application
    Filed: February 27, 2020
    Publication date: September 2, 2021
    Inventors: Guo-Huei Wu, Hui-Zhong Zhuang, Chih-Liang Chen, Cheng-Chi Chuang, Shang-Wen Chang, Yi-Hsun Chiu
  • Publication number: 20200268839
    Abstract: The present disclosure provides a nucleic acid fragment, a pharmaceutical composition, and a therapeutic process for treating a subject having chronic obstructive pulmonary disease (COPD). Especially, the nucleic acid fragment, the pharmaceutical composition, and the therapeutic process are therapeutic-efficient for treating pulmonary fibrosis and emphysema of the subject, as demonstrated in this disclosure.
    Type: Application
    Filed: February 24, 2020
    Publication date: August 27, 2020
    Inventors: Cheng-Wen WU, Erh-Hsuan LIN, Ching-Huei LIN
  • Publication number: 20200062738
    Abstract: A compound for inhibiting BMI-1/MCL-1 having a structure of Formula (I), wherein the various groups are as described. A pharmaceutical composition for treating cancer includes an effective amount of a compound of Formula (I).
    Type: Application
    Filed: April 30, 2018
    Publication date: February 27, 2020
    Applicants: Development Center for Biotechnology, National Yang-Ming University
    Inventors: Cheng-Wen Wu, Erh-Hsuan Jiann Lin, Chi-Ying Huang, Jia-Ming Chang, Shih-Hsien Chuang, Hui-Jan Hsu, Wei-Wei Chen
  • Patent number: 9905277
    Abstract: A memory system comprises a memory controller and a memory device having one or more memory ranks and multiple memory electrically connected to the one or more memory ranks. The memory controller includes at least one analysis module and at least one switching determination module. The analysis module analyzes states of multiple memory control commands corresponding to a particular memory rank to generate a control parameter. The switching determination module determines whether at least one switching command is sent according to the control parameter, a current operation mode of the particular memory rank, and an operation state of the particular memory rank. When the memory device receives a first switching command of the at least one command, the particular rank and at least one part of the memory internal circuits are switched from the normal voltage operation mode to the low voltage operation mode.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: February 27, 2018
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pei-Wen Luo, Hsiu-Chuan Shih, Chi-Kang Chen, Ding-Ming Kwai, Cheng-Wen Wu
  • Publication number: 20170003908
    Abstract: A memory system comprises a memory controller and a memory device having one or more memory ranks and multiple memory electrically connected to the one or more memory ranks. The memory controller includes at least one analysis module and at least one switching determination module. The analysis module analyzes states of multiple memory control commands corresponding to a particular memory rank to generate a control parameter. The switching determination module determines whether at least one switching command is sent according to the control parameter, a current operation mode of the particular memory rank, and an operation state of the particular memory rank. When the memory device receives a first switching command of the at least one command, the particular rank and at least one part of the memory internal circuits are switched from the normal voltage operation mode to the low voltage operation mode.
    Type: Application
    Filed: October 21, 2015
    Publication date: January 5, 2017
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pei-Wen LUO, Hsiu-Chuan SHIH, Chi-Kang CHEN, Ding-Ming KWAI, Cheng-Wen WU
  • Patent number: 8977942
    Abstract: The present invention discloses a data error-detection system and the method thereof. The system includes an initializing module, an encoding module, a decoding module and a restoring module. The initializing module arranges the transmitting data in a 3D matrix to produce information data. The encoding module encodes the information data to produce checking data, and outputs encoding data which includes information data and checking data. The decoding module receives encoding data and detects information data according to the checking data to correct the information data and then produces 3D matrix receiving data. The restoring module produces receiving data according to the 3D matrix receiving data. Herewith, the effect of error-detection and correction of the data can be achieved.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 10, 2015
    Assignee: National Tsing Hua University
    Inventors: Shu-Yu Wu, Cheng-Wen Wu
  • Patent number: 8937486
    Abstract: A method for testing a TSV comprises charging a through-silicon-via under test to a first predetermined voltage level charging a capacitance device to a second predetermined voltage level; performing charge-sharing between the through-silicon-via and the capacitance device; and determining that the through-silicon-via under test is not faulty if the voltage level of the through-silicon-via after the charge-sharing step is within a predetermined range.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: January 20, 2015
    Assignee: National Tsing Hua University
    Inventors: Cheng-Wen Wu, Po-Yuan Chen, Ding-Ming Kwai, Yung-Fa Chou
  • Publication number: 20140157076
    Abstract: The present invention discloses a data error-detection system and the method thereof. The system includes an initializing module, an encoding module, a decoding module and a restoring module. The initializing module arranges the transmitting data in a 3D matrix to produce information data. The encoding module encodes the information data to produce checking data, and outputs encoding data which includes information data and checking data. The decoding module receives encoding data and detects information data according to the checking data to correct the information data and then produces 3D matrix receiving data. The restoring module produces receiving data according to the 3D matrix receiving data. Herewith, the effect of error-detection and correction of the data can be achieved.
    Type: Application
    Filed: March 15, 2013
    Publication date: June 5, 2014
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: SHU-YU WU, CHENG-WEN WU
  • Patent number: 8742839
    Abstract: This invention discloses a double Through Silicon Via (TSV) structure, including a first die unit, a first signal path, a second signal path, a receiving unit and a second die unit. The first and the second signal paths respectively include a driving unit and a TSV unit. Each driving unit includes a first end, a second end and a third end. The invention divides the signal paths of the conventional double TSV into two different signal paths by two driving units and the receiving unit having OR gate or NOR gate, to avoid generating the problem of signal degradation from the TSV unit with short defect. The invention further disposes a first switch unit, a second switch unit, a first exchange unit, a second exchange unit, a first VDD keeper and a second VDD keeper, to avoid generating the problems of open defect and leakage current.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: June 3, 2014
    Assignee: National Tsing Hua University
    Inventors: Hsiu-Chuan Shih, Cheng-Wen Wu
  • Publication number: 20140062586
    Abstract: This invention discloses a double Through Silicon Via (TSV) structure, including a first die unit, a first signal path, a second signal path, a receiving unit and a second die unit. The first and the second signal paths respectively include a driving unit and a TSV unit. Each driving unit includes a first end, a second end and a third end. The invention divides the signal paths of the conventional double TSV into two different signal paths by two driving units and the receiving unit having OR gate or NOR gate, to avoid generating the problem of signal degradation from the TSV unit with short defect. The invention further disposes a first switch unit, a second switch unit, a first exchange unit, a second exchange unit, a first VDD keeper and a second VDD keeper, to avoid generating the problems of open defect and leakage current.
    Type: Application
    Filed: December 14, 2012
    Publication date: March 6, 2014
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: HSIU-CHUAN SHIH, CHENG-WEN WU
  • Publication number: 20140004072
    Abstract: A method and a composition of gene therapy for treating acute lung injury (ALI) and acute respiratory distress syndrome (ARDS) based on polyplexes formed between linear polyethyleneimine (PEI) and DNA comprising the ?2-Adrenergic Receptor (?2AR) gene are provided.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Applicant: NATIONAL YANG MING UNIVERSITY
    Inventors: Cheng-Wen Wu, Erh-Hsuan Lin, Hsiang-Yi Chang
  • Publication number: 20130293255
    Abstract: A method for testing a TSV comprises charging a through-silicon-via under test to a first predetermined voltage level charging a capacitance device to a second predetermined voltage level; performing charge-sharing between the through-silicon-via and the capacitance device; and determining that the through-silicon-via under test is not faulty if the voltage level of the through-silicon-via after the charge-sharing step is within a predetermined range.
    Type: Application
    Filed: July 11, 2013
    Publication date: November 7, 2013
    Inventors: Cheng-Wen Wu, Po-Yuan Chen, Ding-Ming Kwai, Yung- Fa Chou
  • Patent number: 8531199
    Abstract: The method and circuit for testing a TSV of the present invention exploit the electronic property of the TSV under test. The TSV under test is first reset to a first state, and is then sensed at only one end to determine whether the TSV under test follows the behavior of a normal TSV, wherein the reset and sense steps are performed at only one end of the TSV under test. If the TSV under test does not follow the behavior of a normal TSV, the TSV under test is determined faulty.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: September 10, 2013
    Assignee: National Tsing Hua University
    Inventors: Cheng Wen Wu, Po Yuan Chen, Ding Ming Kwai, Yung Fa Chou