Patents by Inventor Cheng-Yi Huang
Cheng-Yi Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12269863Abstract: A novel fusion protein to overcome the current difficulties related to application of monoclonal antibodies in disease treatment and in other fields, particularly those requiring ADCC, e.g. for depletion of tumor cells, virally-infected cells, or immune-modulating cells, etc. One example of the fusion protein is an extracellular domain of a high-affinity variant of human CD 16 A fused to an anti-CD3 antibody or its antigen-binding fragment thereof that specifically binds to an epitope on human CD3 or a fragment thereof.Type: GrantFiled: May 23, 2019Date of Patent: April 8, 2025Assignee: MANYSMART THERAPEUTICS, INC.Inventors: Hsin-Yi Huang, Cheng Hao Liao, Chun-Ming Lin
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Patent number: 12266639Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through substrate via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through substrate via.Type: GrantFiled: August 1, 2023Date of Patent: April 1, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Hsien Chiang, Hui-Chun Chiang, Tzu-Sung Huang, Ming-Hung Tseng, Kris Lipu Chuang, Chung-Ming Weng, Tsung-Yuan Yu, Tzuan-Horng Liu
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Patent number: 12237165Abstract: The present disclosure for wafer bonding, including forming an epitaxial layer on a top surface of a first wafer, forming a sacrificial layer over the epitaxial layer, trimming an edge of the first wafer, removing the sacrificial layer, forming an oxide layer over the top surface of the first wafer subsequent to removing the sacrificial layer, and bonding the top surface of the first wafer to a second wafer.Type: GrantFiled: July 30, 2021Date of Patent: February 25, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yung-Lung Lin, Hau-Yi Hsiao, Chih-Hui Huang, Kuo-Hwa Tzeng, Cheng-Hsien Chou
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Patent number: 12238893Abstract: A flow guiding device in an immersion-cooled chassis of a server comprises at least one deflector located above a chip on a mainboard in the chassis, each deflector comprises a first end for mounting to the mainboard above the chip and a second end inclined away from the mainboard. The first end is immersed in coolant, the second end is higher than the first end; the deflector further comprises a hollow part including multiple through holes for interrupting upward movement vapor bubbles generated by the hot chip, which reduces probability of the vapor bubbles escaping from the coolant liquid and the chassis. A liquid-cooled chassis having the flow guiding device is also disclosed.Type: GrantFiled: December 30, 2022Date of Patent: February 25, 2025Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.Inventors: Sung Tsang, Tsung-Lin Liu, Yu-Chia Ting, Cheng-Yi Huang, Chia-Nan Pai
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Publication number: 20250060660Abstract: A method includes: generating a designed mask overlay mark associated with an actual mask overlay mark to be formed in a mask; forming the actual mask overlay mark in the mask based on the designed mask overlay mark, the actual mask overlay mark including a plurality of overlay patterns; forming a device feature pattern adjacent to the actual mask overlay mark; forming an alignment of the mask by a mask metrology apparatus including a light source having a wavelength and a numerical aperture, wherein a pitch between adjacent two of the plurality of overlay patterns does not exceed the wavelength divided by twice the numerical aperture; and forming a pattern in a layer of a wafer by transferring the device feature pattern while the mask is under the alignment.Type: ApplicationFiled: January 3, 2024Publication date: February 20, 2025Inventors: Cheng-Yeh LEE, Ching-Fang YU, Hsueh-Wei HUANG, Yen-Cheng HO, Wei-Cheng LIN, Hsin-Yi YIN
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Patent number: 12216407Abstract: A multi-spray RRC process with dynamic control to improve final yield and further reduce resist cost is disclosed. In one embodiment, a method, includes: dispensing a first layer of solvent on a semiconductor substrate while spinning at a first speed for a first time period; dispensing the solvent on the semiconductor substrate while spinning at a second speed for a second time period so as to transform the first layer to a second layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a third speed for a third time period so as to transform the second layer to a third layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a fourth speed for a fourth time period so as to transform the third layer to a fourth layer of the solvent; and dispensing a first layer of photoresist on the fourth layer of the solvent while spinning at a fifth speed for a fifth period of time.Type: GrantFiled: February 27, 2023Date of Patent: February 4, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ming-Hsuan Chuang, Po-Sheng Lu, Shou-Wen Kuo, Cheng-Yi Huang, Chia-Hung Chu
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Patent number: 12219258Abstract: An anti-shake assembly with reduced size is disclosed which includes a circuit board, a photosensitive chip, and a magnetic component. The circuit board includes a first rigid board, a second rigid board, a plurality of connectors, and a plurality of coils. The first rigid board has a housing space. The second rigid board is movably housed in the housing space. The connectors are flexibly connected between the first rigid board and the second rigid board. The photosensitive chip and the coils are provided on the second rigid board. The magnetic component includes a base and a plurality of magnets. The base includes a central plate and a side plate. The side plate is arranged around a periphery of the central plate to form a housing space. The magnets are provided on the central plate facing the housing space. The magnets are arranged opposite to the coils.Type: GrantFiled: January 9, 2023Date of Patent: February 4, 2025Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTDInventors: Cheng-Yi Yang, Qiang Song, Yan-Qiong He, Yao-Cai Li, Biao Li, Zu-Ai Li, Mei-Hua Huang
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Patent number: 12218075Abstract: A package structure includes an encapsulant, a patterned circuit structure, at least one electronic component and a shrinkage modifier. The patterned circuit structure is disposed on the encapsulant and includes a pad. The electronic component is disposed on the patterned circuit structure, and includes a bump electrically connected to the pad. The shrinkage modifier is encapsulated in the encapsulant and configured to reduce a relative displacement between the bump and the pad along a horizontal direction in an environment of temperature variation.Type: GrantFiled: December 30, 2021Date of Patent: February 4, 2025Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Cheng-Yuan Kung, Hsu-Chiang Shih, Hung-Yi Lin, Chien-Mei Huang
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Publication number: 20250037925Abstract: An inductor device includes a first coil and a second coil. The first coil includes a first connection member and a plurality of first circles. At least two first circles of the first circles are located at a first area, and half of the first circle of the first circles is located at a second area. The second coil includes a second connection member and a plurality of second circles. At least two second circles of the second circles are located at the second area, and half of the second circle of the second circles is located at the first area. The first connection member is coupled to the at least two first circles and the half of the first circle. The second connection member is coupled to the at least two second circles and the half of the second circle.Type: ApplicationFiled: October 10, 2024Publication date: January 30, 2025Inventors: Cheng-Wei LUO, Chieh-Pin CHANG, Kai-Yi HUANG, Ta-Hsun YEH
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Patent number: 12206169Abstract: An antenna module includes two antenna units, two isolation members, and a grounding member. Each antenna unit consists of two feeding ends, two first radiators, and two second radiators. The isolating members are disposed between the first and second portions of each antenna unit. The grounding member is disposed beside the two antenna units and the two isolation members. A first slot is formed among each first radiator, the second radiator, and the grounding member. The two second radiators are connected to the third radiator. A third slot is formed between the second radiator and the second portion. The two antenna units are symmetric to the fourth slot in a mirrored manner, and the two first portions have widths gradually changing along an extending direction of the fourth position.Type: GrantFiled: October 13, 2022Date of Patent: January 21, 2025Assignee: PEGATRON CORPORATIONInventors: Chien-Yi Wu, Chao-Hsu Wu, Cheng-Hsiung Wu, Chia-Hung Chen, Shih-Keng Huang, Hau Yuen Tan, Sheng-Chin Hsu, Tse-Hsuan Wang, Hao-Hsiang Yang
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Patent number: 12198910Abstract: In an embodiment, a magnetic assembly includes: an inner permeance annulus; and an outer permeance annulus connected to the inner permeance annulus via magnets, wherein the outer permeance annulus comprises a peak region with a thickness greater than other regions of the outer permeance annulus.Type: GrantFiled: November 17, 2023Date of Patent: January 14, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Jen Yang, Yi-Zhen Chen, Chih-Pin Wang, Chao-Li Shih, Ching-Hou Su, Cheng-Yi Huang
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Publication number: 20240327985Abstract: A gas tube, a gas supply system containing the same and a semiconductor manufacturing method using the same are provided. The gas tube includes a porous material body and a resistant sheath surrounding the porous material body. The porous material body has a hollow tube structure and an empty cavity inside the hollow tube structure. The porous material body is hydrophobic and has a plurality of pores therein. The resistant sheath is disposed on the porous material body and surrounds the porous material body. The resistant sheath includes a plurality of holes penetrating through the resistant sheath.Type: ApplicationFiled: June 12, 2024Publication date: October 3, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Shiung Chen, Cheng-Yi Huang, Chih-Shen Yang, Shou-Wen Kuo, Po-Wen Chai
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Publication number: 20240304471Abstract: In an embodiment, an apparatus comprising: a heater configured to heat a wafer located on a wafer staging area of the heater, the heater comprising a heater shaft extending below the wafer staging area; and a heater lift assembly comprising: a lift shaft configured to move the heater shaft in a vertical direction; a clamp that connects the heater shaft to the lift shaft; and a damper disposed on top of the clamp.Type: ApplicationFiled: May 16, 2024Publication date: September 12, 2024Inventors: Kai-Wen WU, Chun-Ta CHEN, Chin-Shen HSIEH, Cheng-Yi HUANG
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Multi-deck non-volatile memory architecture with improved wordline bus and bitline bus configuration
Patent number: 12087350Abstract: Systems, apparatuses and methods may provide for a multi-deck non-volatile memory architecture with an improved wordline bus and bitline bus configuration. For example, wordline busses and bitline busses may be positioned so as to be located over the junctions between two tiles, e.g., between a memory tile and a termination tile and between two memory tiles. Additionally, multi-deck non-volatile memory architectures may utilize data shifting to select which one of a plurality of wordline drivers and a plurality of bitline drivers are in communication with a data circuit of each memory tile. In a configuration where wordline busses and bitline busses have been positioned so as to be located over the junctions between two tiles, such data shifting directions may be able to be implemented with a limited number of shifting direction.Type: GrantFiled: September 25, 2020Date of Patent: September 10, 2024Assignee: Intel CorporationInventors: William Waller, Cheng-Yi Huang -
Patent number: 12037687Abstract: A gas tube, a gas supply system containing the same and a semiconductor manufacturing method using the same are provided. The gas tube includes a porous material body and a resistant sheath surrounding the porous material body. The porous material body has a hollow tube structure and an empty cavity inside the hollow tube structure. The porous material body is hydrophobic and has a plurality of pores therein. The resistant sheath is disposed on the porous material body and surrounds the porous material body. The resistant sheath includes a plurality of holes penetrating through the resistant sheath.Type: GrantFiled: June 29, 2022Date of Patent: July 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Shiung Chen, Cheng-Yi Huang, Chih-Shen Yang, Shou-Wen Kuo, Po-Wen Chai
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Patent number: 12009232Abstract: In an embodiment, an apparatus comprising: a heater configured to heat a wafer located on a wafer staging area of the heater, the heater comprising a heater shaft extending below the wafer staging area; and a heater lift assembly comprising: a lift shaft configured to move the heater shaft in a vertical direction; a clamp that connects the heater shaft to the lift shaft; and a damper disposed on top of the clamp.Type: GrantFiled: June 17, 2022Date of Patent: June 11, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kai-Wen Wu, Chun-Ta Chen, Chin-Shen Hsieh, Cheng-Yi Huang
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Publication number: 20240147664Abstract: A flow guiding device in an immersion-cooled chassis of a server comprises at least one deflector located above a chip on a mainboard in the chassis, each deflector comprises a first end for mounting to the mainboard above the chip and a second end inclined away from the mainboard. The first end is immersed in coolant, the second end is higher than the first end; the deflector further comprises a hollow part including multiple through holes for interrupting upward movement vapor bubbles generated by the hot chip, which reduces probability of the vapor bubbles escaping from the coolant liquid and the chassis. A liquid-cooled chassis having the flow guiding device is also disclosed.Type: ApplicationFiled: December 30, 2022Publication date: May 2, 2024Inventors: SUNG TSANG, TSUNG-LIN LIU, YU-CHIA TING, CHENG-YI HUANG, CHIA-NAN PAI
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Publication number: 20240087861Abstract: In an embodiment, a magnetic assembly includes: an inner permeance annulus; and an outer permeance annulus connected to the inner permeance annulus via magnets, wherein the outer permeance annulus comprises a peak region with a thickness greater than other regions of the outer permeance annulus.Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Inventors: Tsung-Jen YANG, Yi-Zhen CHEN, Chih-Pin WANG, Chao-Li SHIH, Ching-Hou SU, Cheng-Yi HUANG
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Publication number: 20240087917Abstract: The disclosed techniques include a space filling device to be used with a wet bench in chemical replacement procedures. The space filling device has an overall density that is higher than the chemicals used to purge the wet bench. As such, when embedded into the wet bench, or more specifically, the chemical tank of the wet bench, the space filling device will occupy a portion of the interior volume space. As a result, less purging chemicals are used to fill and bath the wet bench.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Inventors: Yen-Ji CHEN, Chih-Shen YANG, Cheng-Yi HUANG
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Publication number: 20240065025Abstract: The application relates to a light-emitting assembly including a substrate and an effective light-emitting region. The substrate has a first surface and a second surface that are opposite to each other and has a transparent material. The light shielding layer is disposed on the first surface of the substrate, and a first edge and a second edge of the light shielding layer are spaced apart from each other, thereby forming an opening. The effective light-emitting region is defined on the second surface of the substrate, and the effective light-emitting region and the first edge of the light shielding layer are offset by a first distance in a lateral direction. The first distance is associated with a refractive index of the substrate, a refractive index of a material in the opening of the light shielding layer, and a thickness of the substrate.Type: ApplicationFiled: June 26, 2023Publication date: February 22, 2024Inventors: CHIH-CHENG YEN, KUO-CHENG HSU, CHENG-YI HUANG