Abstract: An avatar-based charting method for assisted diagnosis to improve the efficiency of medical practice. Through an anthropomorphic symptom record interface, the first page is the Genetic-Psycho-Social-Bio (GPSB) which assists in understanding the genetic, psychological, social-environmental, and biological characteristics of patients. A Subjective-Objective-Assessment-Plan (SOAP) diagnosis page aids in doctor diagnosis. A decision support diagnostic summary interface automatically generates the diagnosis summary and notifies of any unusual circumstances. Finally, a medical records module saves all information into a medical database in order to provide health care for subsequent tracking and evaluation.

Abstract: Technology is described that supports reduced program disturb of nonvolatile memory. A three/two dimensional NAND array includes a plurality of pages, which are divided into a plurality of page groups. Access is allowed to memory cells within a first page group of a plurality of page groups in an erase block of the three dimensional NAND array, while access is minimized to memory cells within a second page group of the plurality of page groups in the erase block of the three/two dimensional NAND array. Pages in the same page group are physically nonadjacent with each other in the three/two dimensional NAND array.

Abstract: A semiconductor structure includes first and second chips assembled to each other. The first chip includes N of first conductive lines, M of second conductive lines disposed on the first conductive lines, N of third conductive lines perpendicularly on the second conductive lines and parallel to the first conductive lines, N of first vias connected to the first conductive lines, M sets of second vias connected to the second conductive lines, and N sets of third vias connected to the third conductive lines. The second and first conductive lines form an overlapping area. The third conductive lines and N sets of the third vias include at least two groups respectively disposed in a first and a third regions of the overlapping area. M sets of second vias include at least two groups respectively disposed in a second region and a fourth region of the overlapping area.

Abstract: A method for operating a memory includes receiving a command to program a data value at a memory cell, and an indication of which write mode in a plurality of write modes to use. Write modes in the plurality are characterized by different sets of resistance ranges that correspond to data values stored in the memory cell. The method includes executing a program operation according to the indicated one in the plurality of write modes to program the data value in the memory cell. The plurality of write modes includes a first write mode and a second write mode corresponding to shorter data retention than the first write mode. The first and second write modes are characterized by first and second sets of resistance ranges in the different sets of resistance ranges. The method includes periodically refreshing data values in memory cells storing data in the second write mode.

Abstract: A method for managing block erase operations is provided for an array of memory cells including erasable blocks of memory cells in the array. The method comprises maintaining status data for a plurality of sub-blocks of the erasable blocks of the array. The status data indicate whether the sub-blocks are currently accessible and whether the sub-blocks are invalid. The method comprises, in response to a request to erase a selected sub-block of a particular erasable block, issuing an erase command to erase the particular block if the other sub-blocks of the particular erasable block are invalid, else updating the status data to indicate that the selected sub-block is invalid.

Abstract: Technology is described that supports reduced program disturb of nonvolatile memory. A three/two dimensional NAND array includes a plurality of pages, which are divided into a plurality of page groups. Access is allowed to memory cells within a first page group of a plurality of page groups in an erase block of the three dimensional NAND array, while access is minimized to memory cells within a second page group of the plurality of page groups in the erase block of the three/two dimensional NAND array. Pages in the same page group are physically nonadjacent with each other in the three/two dimensional NAND array.

Abstract: A method for managing utilization of a memory including a physical address space comprises mapping logical addresses of data objects to locations within the physical address space, and defining a plurality of address segments in the space as an active window. The method comprises allowing writes of data objects having logical addresses mapped to locations within the plurality of address segments in the active window. The method comprises, upon detection of a request to write a data object having a logical address mapped to a location outside the active window, updating the mapping so that the logical address maps to a selected location within the active window, and then allowing the write to the selected location. The method comprises maintaining access data indicating utilization of the plurality of address segments in the active window, and adding and removing address segments from the active window in response to the access data.

Abstract: A method is provided for managing a file system including data objects. The data objects, indirect pointers and source pointers are stored in containers that have addresses and include addressable units of a memory. The objects are mapped to addresses for corresponding containers. The indirect pointer in a particular container points to the address of a container in which the corresponding object is stored. The source pointer in the particular container points to the address of the container to which the object in the particular container is mapped. An object in a first container is moved to a second container. The source pointer in the first container is used to find a third container to which the object is mapped. The indirect pointer in the third container is updated to point to the second container. The source pointer in the second container is updated to point to the third container.

Abstract: Techniques are described herein for managing data in a block-based flash memory device which avoid the need to perform sector erase operations each time data stored in the flash memory device is updated. As a result, a large number of write operations can be performed before a sector erase operation is needed. In addition, the block-based flash memory can emulate both programming and erasing on a byte-by-byte basis, like that provided by an EEPROM.

Abstract: A method for memory management is provided for a memory including a plurality of pages. The method comprises assigning in-use pages to in-use buckets according to use counts. The in-use buckets include a low in-use bucket for a lowest range of use counts, and a high in-use bucket for a highest range of use counts. The method comprises assigning free pages to free buckets according to use counts. The free buckets include a low free bucket for a lowest range of use counts, and a high free bucket for a highest range of use counts. The method maintains use counts for in-use pages. On a triggering event for a current in-use page, the method determines whether the use count of the current in-use page exceeds a hot swap threshold, and if so moves data in the current in-use page to a lead page in the low free bucket.

Abstract: A semiconductor structure includes first and second chips assembled to each other. The first chip includes N of first conductive lines, M of second conductive lines disposed on the first conductive lines, N of third conductive lines perpendicularly on the second conductive lines and parallel to the first conductive lines, N of first vias connected to the first conductive lines, M sets of second vias connected to the second conductive lines, and N sets of third vias connected to the third conductive lines. The second and first conductive lines form an overlapping area. The third conductive lines and N sets of the third vias include at least two groups respectively disposed in a first and a third regions of the overlapping area. M sets of second vias include at least two groups respectively disposed in a second region and a fourth region of the overlapping area.

Abstract: Techniques are described herein for managing data in a block-based flash memory device which avoid the need to perform sector erase operations each time data stored in the flash memory device is updated. As a result, a large number of write operations can be performed before a sector erase operation is needed. In addition, the block-based flash memory can emulate both programming and erasing on a byte-by-byte basis, like that provided by an EEPROM.

Abstract: Techniques are used to store information in a medium such as the memory cells of an integrated circuit, and also retrieval of information from the medium. The integrated circuit includes nonvolatile memory cells (416) capable of multilevel or analog voltage level storage. The integrated circuit may store or record information in analog or digital form, or both. Information is stored in and retrieved from the integrated circuit using a user-selected sampling frequency. The user's selection of the sampling frequency is stored within the integrated circuit.

Abstract: Techniques are used to store information in a medium such as the memory cells of an integrated circuit, and also retrieval of information from the medium. The integrated circuit includes nonvolatile memory cells (416) capable of multilevel or analog voltage level storage. The integrated circuit may store or record information in analog or digital form, or both. Information is stored in and retrieved from the integrated circuit using a user-selected sampling frequency. The user's selection of the sampling frequency is stored within the integrated circuit.