Patents by Inventor Chengshao Yang

Chengshao Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210111199
    Abstract: The present disclosure provides a manufacturing method of a display substrate, a display substrate and a display device, belongs to the field of display technology, and can at least partially solve a problem of residual sand in the display substrate. The manufacturing method of the display substrate includes: providing a base; forming a passivation layer on a surface of the base; forming an amorphous oxide conductive material layer on a surface of the passivation layer facing away from the base; forming a photoresist pattern on the oxide conductive material layer, the photoresist pattern having an exposure region; etching a portion of the oxide conductive material layer in the exposure region of the photoresist pattern to form a hollow position exposing a portion of the passivation layer; and removing a certain thickness material of the portion of the passivation layer exposed through the hollow position.
    Type: Application
    Filed: August 31, 2020
    Publication date: April 15, 2021
    Inventors: Lin CHEN, Chengshao YANG, Tao MA, Dengfeng WANG, Ling HAN
  • Publication number: 20210057531
    Abstract: The present disclosure relates to the field of display technologies, and discloses a Thin Film Transistor, a method for preparing the same, an array substrate, a display panel and an apparatus. The TFT includes: a base substrate; an active layer; a source electrode; and a drain electrode; where the active layer, the source electrode, and the drain electrode are sequentially laminated on the base substrate; and a projection of the source electrode on the base substrate covers a projection of part of edges of the active layer on the base substrate.
    Type: Application
    Filed: July 24, 2020
    Publication date: February 25, 2021
    Inventors: Chuan CHEN, Pengyu Chen, Tao Ma, Chengshao Yang
  • Patent number: 10923597
    Abstract: A transistor and a method for manufacturing the same, a display substrate, and a display apparatus are provided. The transistor may include: a substrate; an active region on the substrate and including a polycrystalline silicon region; an etch stop layer at a side of the polycrystalline silicon region distal to the substrate; and a first heavily doped amorphous silicon region and a second heavily doped amorphous silicon region both at a side of the etch stop layer distal to the substrate; the polycrystalline silicon region having a first side surface corresponding to the first heavily doped amorphous silicon region and a second side surface corresponding to the second heavily doped amorphous silicon region; wherein an orthographic projection of the polycrystalline silicon region on a plane in which a lower surface of the etch stop layer lies does not go beyond the lower surface of the etch stop layer.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: February 16, 2021
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Haijiao Qian, Chengshao Yang, Yinhu Huang, Yunhai Wan
  • Patent number: 10921670
    Abstract: An array substrate and a vehicle-mounted display device. A first transistor of the array substrate includes a source electrode connected with a pixel electrode, a drain electrode and a gate electrode, a compensation gate electrode connected with the gate electrode, the sum of an overlapping region of the source electrode and the gate electrode and an overlapping region of the source electrode and the compensation gate electrode is a first overlapping region. A second transistor includes a source electrode connected with a pixel electrode, a drain electrode and a gate electrode, a compensation gate electrode connected with the gate electrode, the sum of an overlapping region of the source electrode and the gate electrode and an overlapping region of the source electrode and the compensation gate electrode is a second overlapping region. An area of the first overlapping region is equal to an area of the second overlapping region.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: February 16, 2021
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lin Chen, Chengshao Yang, Tao Ma, Dengfeng Wang, Wenhao Tang
  • Publication number: 20210036161
    Abstract: The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base substrate and thin-film transistors disposed on the base substrate, where the thin-film transistors each comprises a gate, an active layer insulated from the gate, and two ohmic contact parts in direct contact with the active layer, leaving a gap region between the two ohmic contact parts; and each of the ohmic contact parts comprises a lightly doped region and a heavily doped region, and an orthographic projection of the lightly doped region on the base substrate and an orthographic projection of the heavily doped region on the base substrate do not overlap each other.
    Type: Application
    Filed: March 20, 2020
    Publication date: February 4, 2021
    Inventors: Tao MA, Yunlong WANG, Chengshao YANG, Yu Jl, Shengli LIU
  • Patent number: 10872807
    Abstract: A manufacturing method of a via hole, a display substrate and a manufacturing method thereof are provided. The manufacturing method of a via hole includes: forming a first via hole penetrating the passivation protection layer, the first via hole being defined by a first side wall of the passivation protection layer; forming an organic insulating layer on the passivation protection layer; and forming a second via hole penetrating the organic insulating layer, the second via hole being defined by a second side wall of the organic insulating layer; wherein in a sectional view, a bottom of the second via hole is located in the first via hole and is in direct contact with the conductive layer, and the second side wall of the organic insulating layer is separated from the first side wall of the passivation protection layer.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: December 22, 2020
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yunhai Wan, Chengshao Yang, Wenlong Wang, Ke Cao
  • Publication number: 20200335523
    Abstract: An array substrate, a manufacturing method thereof, and a display panel are provided. The array substrate comprises a base substrate, a plurality of gate lines and gate electrodes on the base substrate, each gate electrode being corresponding to and separate from a respective gate line, a gate insulating layer over the gate electrode and the gate line, the gate insulating layer having a first via hole and a second via hole, the first via hole exposing the gate electrode, the second via hole exposing the gate line, a conductive connection layer and a polysilicon semiconductor layer on the gate insulating layer, the conductive connection layer filling the first via hole and the second via hole to connect the gate line with the gate electrode.
    Type: Application
    Filed: March 12, 2018
    Publication date: October 22, 2020
    Inventors: Binbin Cao, Yinhu HUANG, Chengshao YANG, Haijiao QIAN
  • Patent number: 10651205
    Abstract: An array substrate and a display device are provided.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: May 12, 2020
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Ke Cao, Chengshao Yang, Wenlong Wang
  • Publication number: 20200135931
    Abstract: A transistor and a method for manufacturing the same, a display substrate, and a display apparatus are provided. The transistor may include: a substrate; an active region on the substrate and including a polycrystalline silicon region; an etch stop layer at a side of the polycrystalline silicon region distal to the substrate; and a first heavily doped amorphous silicon region and a second heavily doped amorphous silicon region both at a side of the etch stop layer distal to the substrate; the polycrystalline silicon region having a first side surface corresponding to the first heavily doped amorphous silicon region and a second side surface corresponding to the second heavily doped amorphous silicon region; wherein an orthographic projection of the polycrystalline silicon region on a plane in which a lower surface of the etch stop layer lies does not go beyond the lower surface of the etch stop layer.
    Type: Application
    Filed: May 31, 2019
    Publication date: April 30, 2020
    Inventors: Haijiao QIAN, Chengshao YANG, Yinhu HUANG, Yunhai WAN
  • Patent number: 10613257
    Abstract: The present disclosure provides a pixel unit, a display panel, and a display device, which relates to the field of display technology. The pixel unit includes: a base substrate; a reflective layer, disposed on a side of the base substrate; a resonant layer, disposed on a side of the reflective layer away from the base substrate; a transflective layer, disposed on a side of the resonant layer away from the base substrate; and a scattering layer, disposed on a side of the transflective layer away from the base substrate.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: April 7, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Lianjie Qu, Bingqiang Gui, Yonglian Qi, Chengshao Yang
  • Patent number: 10564538
    Abstract: A mask plate, a method for manufacturing the mask plate and a usage of the mask plate in manufacturing a display substrate are provided. The mask plate includes a transparent substrate and at least two layers of electrochromic thin film patterns arranged on the transparent substrate. Each of the at least two layers of electrochromic thin film patterns is configured to be capable of being switched between a light-transmissible state and a non-light-transmissible state under an effect of an electric field. The mask plate is capable of forming at least two different mask patterns on the display substrate, which reduces the number of mask plates required for manufacturing the display substrate.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: February 18, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jun Ma, Chengshao Yang
  • Patent number: 10551709
    Abstract: A display panel, a manufacturing method thereof and a display device are provided. The display panel includes an array substrate and an opposing substrate which are disposed opposite to each other; the array substrate includes a first base substrate and a source electrode, a drain electrode and an active layer which are disposed on the first base substrate, and a passivation layer disposed on the source electrode, the drain electrode and the active layer; the opposing substrate includes a second base substrate and a gate electrode disposed on the second base substrate; the active layer includes a source electrode region, a drain electrode region and a channel region between the source electrode region and the drain electrode region, the gate electrode is disposed opposite to and spaced apart from the passivation layer at a position where the channel region is located.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: February 4, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Ke Cao, Chengshao Yang, Binbin Cao, Ling Han
  • Patent number: 10553724
    Abstract: Embodiments of the present disclosure provide an array substrate, a method for manufacturing an array substrate and a display device. The array substrate includes a base substrate and a transistor disposed on the base substrate, and the transistor includes a gate electrode and an active layer. A light absorbing layer is formed on a side of the gate electrode facing the active layer, and the light absorbing layer is configured to absorb light irradiated thereto.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: February 4, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Ke Cao, Tao Jiang, Chengshao Yang
  • Patent number: 10546882
    Abstract: The present disclosure provides an array substrate, a display panel comprising the array substrate, and a display device, as well as a manufacturing method of the array substrate. The array substrate comprises a base substrate, a metal layer arranged over the base substrate, a conductive material layer arranged on the metal layer, and a connection hole arranged over the conductive material layer to expose the conductive material layer.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: January 28, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Botao Song, Chengshao Yang, Yinhu Huang, Ning Liu, Jun Ma, Yunhai Wan
  • Patent number: 10546884
    Abstract: An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes a base substrate; a planarization layer, located on the base substrate; a first electrode layer, located on a side of the planarization layer away from the base substrate; and an insulating layer, located on a side of the planarization layer and the first electrode layer away from the base substrate, the insulating layer includes a plurality of first pores.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: January 28, 2020
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Ke Cao, Chengshao Yang, Jun Ma
  • Patent number: 10535781
    Abstract: The disclosure provides a thin film transistor and a fabricating method thereof, and an array substrate. The thin film transistor includes a gate, a first active layer, a second active layer, a first source, a first drain, a second source and a second drain which are provided above a base substrate. The first active layer is located at a side of the gate facing the base substrate, and the second active layer is located at a side of the gate facing away from the first active layer. The first source and the first drain are located at a side of the first active layer facing away from the gate and are connected with the first active layer. The second source and the second drain are located at a side of the second active layer facing away from the gate and are connected with the second active layer.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: January 14, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Lin Chen, Haijiao Qian, Chengshao Yang, Mengyu Luan
  • Patent number: 10509286
    Abstract: A manufacturing method of the invention, comprising: successively forming an insulation layer and a photoresist layer on a transparent substrate; performing an exposure and a development on the photoresist layer by a back exposure process, so as to form a trench in the photoresist layer, an open area of the trench proximal to the insulation layer is larger than that of the trench distal to the insulation layer; removing a portion of insulation material in a region of the insulation layer exposed through the trench by an etching process, so as to form a slot in the insulation layer; forming a metal layer on a side of the photoresist layer distal to the insulation layer, a portion of the metal layer is embedded in the slot; removing the photoresist layer and the metal layer thereon by a stripping process, and retaining the portion of the metal layer in the slot.
    Type: Grant
    Filed: October 9, 2016
    Date of Patent: December 17, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yunhai Wan, Chengshao Yang, Ling Han, Botao Song
  • Publication number: 20190311943
    Abstract: A manufacturing method of a via hole, a display substrate and a manufacturing method thereof are provided. The manufacturing method of a via hole includes: forming a first via hole penetrating the passivation protection layer, the first via hole being defined by a first side wall of the passivation protection layer; forming an organic insulating layer on the passivation protection layer; and forming a second via hole penetrating the organic insulating layer, the second via hole being defined by a second side wall of the organic insulating layer; wherein in a sectional view, a bottom of the second via hole is located in the first via hole and is in direct contact with the conductive layer, and the second side wall of the organic insulating layer is separated from the first side wall of the passivation protection layer.
    Type: Application
    Filed: March 22, 2018
    Publication date: October 10, 2019
    Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd ., BOE Technology Group Co., Ltd.
    Inventors: Yunhai WAN, Chengshao YANG, Wenlong WANG, Ke CAO
  • Patent number: 10431607
    Abstract: The present application discloses a method of fabricating a display substrate having an organic layer for reducing parasitic capacitance between electrodes in different layers. The method includes forming the organic layer on a base substrate; subjecting the organic layer to a surface treatment process to descum organic residues from a surface of the organic layer; and forming a passivation layer on a side of the organic layer distal to the base substrate subsequent to subjecting the organic layer to the surface treatment process.
    Type: Grant
    Filed: November 24, 2016
    Date of Patent: October 1, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhixiang Zou, Chengshao Yang, Botao Song, Yinhu Huang
  • Patent number: 10317587
    Abstract: A fabrication method of a color filter substrate, a color filter substrate and a display device are provided. The fabrication method includes forming an interlayer insulating layer and a first color filter group above the conductive pattern, wherein, the first color filter group includes color filter(s) of at least one color, the interlayer insulating layer and the first color filter group are formed by a same material; the interlayer insulating layer is configured to electrically insulate the conductive connecting portion from the conductive bridging portion.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: June 11, 2019
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Tao Ma, Chengshao Yang, Ling Han, Ronghua Jin