Abstract: Embodiments of the present disclosure provide a thin film transistor (TFT) and a method of manufacturing the same, which enables to decrease the vertical resistance from the source and the drain to the polarity inversion region, so that the current from the source and the drain to the polarity inversion region may be increased, thereby improving the performances of the TFT. An active layer of the TFT is provided with a first groove and a second groove which neither pass through the active layer. A source and a drain of the TFT are formed at least partially in the first groove and the second groove, respectively. The source and the drain contact the active layer through the first groove and the second groove, respectively.

Abstract: The invention relates to the field of display design, and discloses an array substrate, a manufacturing method thereof, a display panel and a display device. The array substrate comprises a base substrate, and a peripheral gate line, a gate insulation layer, a peripheral data line and a protection layer which are formed on the base substrate in turn, wherein surface height of the protection layer corresponding to position where the peripheral gate line is located is higher than that of the protection layer corresponding to position where the peripheral data line is located. As such, when in contact with a peripheral wiring area of the array substrate, a foreign material is first in contact with the protection layer corresponding to position where the peripheral gate line is located, thereby reducing probability of crushing or scratching the peripheral data line by the foreign material, improving the stability of product performance.

Abstract: A method for displaying a position of an alignment mark, an array substrate and a manufacturing method thereof are provided. The method for displaying the position of the alignment mark includes: forming an alignment mark on a surface of a base substrate; forming a first isolation layer covering the alignment mark; forming a via hole in the first isolation layer to expose the alignment mark; applying a first material in the via hole to form a first material pattern; and applying a second material on surfaces of the first material pattern and the first isolation layer to form a second material film, wherein the first material and the second material are configured to have different polarities, so that the second material cannot be attached to the first material pattern.

Abstract: Embodiments of the present disclosure provide a thin film transistor (TFT) and a method of manufacturing the same, which enables to decrease the vertical resistance from the source and the drain to the polarity inversion region, so that the current from the source and the drain to the polarity inversion region may be increased, thereby improving the performances of the TFT. An active layer of the TFT is provided with a first groove and a second groove which neither pass through the active layer. A source and a drain of the TFT are formed at least partially in the first groove and the second groove, respectively. The source and the drain contact the active layer through the first groove and the second groove, respectively.

Abstract: An oxide thin film transistor array substrate, a manufacturing method thereof and a display panel are provided. The oxide TFT array substrate includes a base substrate and an oxide TFT, a gate line, a data line and a pixel electrode provided on the base substrate, the drain electrode of the oxide TFT being connected with the pixel electrode, wherein a connection structure is provided between the source electrode of the oxide TFT and the data line, by which the source electrode of the oxide TFT and the data line are electrically connected, and the resistivity of the connection structure is larger than the resistivity of the source electrode.

Abstract: A method for displaying a position of an alignment mark, an array substrate and a manufacturing method thereof are provided. The method for displaying the position of the alignment mark includes: forming an alignment mark on a surface of a base substrate; forming a first isolation layer covering the alignment mark; forming a via hole in the first isolation layer to expose the alignment mark; applying a first material in the via hole to form a first material pattern; and applying a second material on surfaces of the first material pattern and the first isolation layer to form a second material film, wherein the first material and the second material are configured to have different polarities, so that the second material cannot be attached to the first material pattern.

Abstract: The present disclosure provides an array substrate, its manufacturing method and a display device. The array substrate includes a gate electrode, a gate insulation layer formed on the gate electrode, an active layer formed on the gate insulation layer, source/drain electrodes arranged at a layer identical to the active layer, and a pixel electrode arranged at a layer identical to the active layer. The active layer includes a metal oxide semiconductor, and the source/drain electrodes and the pixel electrode each include an ion-implanted metal oxide semiconductor.

Abstract: A manufacturing method comprises steps of: forming a metal pattern having a thickness d on a substrate; forming an insulating film layer on the substrate on which the metal pattern is formed, so that the insulating film layer has an overlap region with the metal pattern, an absolute value of a height difference between the overlap region of the insulating film layer and other regions of the insulating film layer being less than the thickness d; and, forming a pattern of a semiconductor layer and a source/drain metal layer on the substrate on which the insulating film layer is formed.

Abstract: An oxide thin film transistor array substrate, a manufacturing method thereof and a display panel are provided. The oxide TFT array substrate includes a base substrate and an oxide TFT, a gate line, a data line and a pixel electrode provided on the base substrate, the drain electrode of the oxide TFT being connected with the pixel electrode, wherein a connection structure is provided between the source electrode of the oxide TFT and the data line, by which the source electrode of the oxide TFT and the data line are electrically connected, and the resistivity of the connection structure is larger than the resistivity of the source electrode.

Abstract: An optical touch screen and a display device are disclosed. The optical touch screen (200) comprises an optical touch panel (210) and a first sensor (220) and a second sensor (230). The optical touch panel (210) comprises a first optical transmission channel (211) and a second optical transmission channel (212) which are intersected with each other. The first sensor (220) is disposed on at least one end of the first optical transmission channel (211) and configured to receive light emitted by the first optical transmission channel (211). The second sensor (230) is disposed on at least one end of the second optical transmission channel (212) and configured to receive light emitted by the second optical transmission channel (212). The optical touch screen and the display device can improve the positioning accuracy of the touch position.