Abstract: A microelectronic device includes an insulating layer on a microelectronic substrate wherein the insulating layer has a contact hole therein exposing a portion of the microelectronic substrate. A first capacitor electrode is provided on a surface of the insulating layer opposite the microelectronic substrate and adjacent the contact hole wherein a lower portion of the first capacitor electrode extends into the contact hole below the surface of the insulating layer. A ferroelectric layer is provided on the first capacitor electrode, and a second capacitor electrode is provided on the ferroelectric layer. Related methods and memory devices are also discussed.

Abstract: A conductive diffusion barrier layer, a semiconductor device having the same, and a method for manufacturing the semiconductor device is provided. The diffusion barrier layer contains Al, N, and a metal element selected from the group consisting of Ta, Mo, Nb, and W. The content ratio of each element is between 1 and 60 mole percent. The diffusion barrier layer further contains O having a content ratio between 1 and 50 mole percent. A capacitor using the diffusion barrier layer described above exhibits a higher capacitance because the plug formed under a storage node is prevented from being oxidized and a dielectric layer having a high dielectric constant is formed.

Abstract: Methods of forming integrated circuit capacitors include the steps of forming an electrically insulating layer on a face of a semiconductor substrate and then patterning the electrically insulating layer to define a contact hole therein. A barrier metal layer is then formed in at least a portion of the contact hole. A lower electrode metal layer is then formed on the barrier metal layer and then planarized by reflowing the lower electrode metal layer at a temperature greater than about 650.degree. C. in a nitrogen gas ambient, to define a lower capacitor electrode. A layer of material having a high dielectric constant is then formed on the lower capacitor electrode. An upper capacitor electrode is then formed on the dielectric layer, opposite the lower capacitor electrode. The dielectric layer may comprise Ba(Sr, Ti)O.sub.3, Pb(Zr, Ti)O.sub.3, Ta.sub.2 O.sub.5, SiO.sub.2, SiN.sub.3, SrTiO.sub.3, PZT, SrBi.sub.2 Ta.sub.2 O.sub.9, (Pb, La)(Zr, Ti)O.sub.3 and Bi.sub.4 Ti.sub.3 O.sub.12.

Abstract: Methods of forming floating-gate ferroelectric random-access-memory (FFRAM) devices include the steps of forming vertically integrated FFRAM unit cells having floating-gate transistors and access transistors positioned at different levels on a semiconductor substrate to increase the density at which the unit cells may be integrated. Preferred methods include the steps of forming a first transistor having opposing floating and control gate electrodes, at a surface of a semiconductor substrate, and then forming a first insulating layer having a first contact hole therein, on the first transistor. The first transistor comprises a layer of ferroelectric material between the floating and control gate electrodes, which can be polarized in respective first and second states to retain logic 1 and logic 0 data. Steps are then performed to form a first electrical interconnect (e.g., conductive plug) in the first contact hole and electrically coupled to the control gate electrode.

Abstract: An MgTiO.sub.3 film is used as a diffusion-barrier layer and/or a buffer layer for a ferroelectric film such as a PZT film. The MgTiO.sub.3 films may be used in ferroelectric capacitors which can be included in FRAM devices, and in ferroelectric floating gate transistors which can be included in FFRAM devices. Associated fabrication methods are also provided.

Abstract: A side-by-side capacitor structure in which the side-by-side capacitors are formed using a common dielectric layer, with a capacitor plate electrode shaped as an electrostatic shield for preventing stray capacitance between the side-by-side capacitors. More particularly, a substrate of semiconductive material has first and second contact areas on its top surface. First and second electrodes are located parallel to the top surface of the substrate of semiconductive material, but spaced therefrom by an electrically insulating layer that has first and second contact holes extending therethrough from the first and second contact areas to the first and second electrodes respectively. These contact holes are each filled with a respective conductive plug. The electrically insulating layer has a trench in its surface with first and second sides respectively aligned with an edge of the first electrode and with an edge of the second electrode.

Abstract: A side-by-side capacitor structure in which the side-by-side capacitors are formed using a common dielectric layer, with a capacitor plate electrode shaped as an electrostatic shield for preventing stray capacitance between the side-by-side capacitors. More particularly, a substrate of semiconductive material has first and second contact areas on its top surface. First and second electrodes are located parallel to the top surface of the substrate of semiconductive material, but spaced therefrom by an electrically insulating layer that has first and second contact holes extending therethrough from the first and second contact areas to the first and second electrodes respectively. These contact holes are each filled with a respective conductive plug. The electrically insulating layer has a trench in its surface with first and second sides respectively aligned with an edge of the first electrode and with an edge of the second electrode.

Abstract: A capacitor of a semiconductor device employing a material having a high dielectric constant or ferroelectric properties and a method for manufacturing the same are provided. The capacitor includes a plug film formed on a semiconductor substrate where a transistor having a gate electrode, a source region and a drain region is formed. An insulation film having a contact hole is formed on the plug film and a first diffusion-blocking film is formed on the plug film in the contact hole. A second diffusion-blocking film is then formed on the surface of the first diffusion-blocking film, the surface of the insulating film and on the sidewalls of the contact hole. A third diffusion-blocking film is formed on the second diffusion-blocking film and a first conductive layer is formed on the third diffusion-blocking film so as to be used for a storage electrode. A dielectric layer is formed on the first conductive layer, and a second conductive layer is formed on the dielectric layer to be used as a plate electrode.

Abstract: A capacitor in a semiconductor device and a manufacturing method for the capacitor are provided using a triple film including a Ti layer, a TiN layer, and a Ta layer. The capacitor has a first insulating film formed on the surface of a semiconductor substrate, the first insulating film having a center hole and at least one step between the center hole and the rest of the first insulating film, a spacer formed on the inner wall of the contact hole, a first conductive layer filling the contact hole, a triple film formed on the center of the first insulating film, a second conductive layer formed on the triple film, a second insulating film formed on the resultant structure, and a third conductive layer formed on the second insulating film. The Ta layer is placed in between the second conductive layer and both the Ti layer and the TiN layer to prevent the production of a metal oxide and nitrogen gas from a reaction between oxygen and the Ti and TiN layers.