Abstract: Disclosed is a method for fabricating an Al metal line. The method includes forming an insulating layer on a semiconductor substrate; forming a Ti layer, a bottom TiN layer, an Al layer and a top TiN layer in successive order on the insulating layer; plasma-treating the top TiN layer; forming a photoresist pattern on the plasma-treated top TiN layer; and etching the plasma-treated top TiN layer, the Al layer, the bottom TiN layer, and the Ti layer using the photoresist pattern as an etching mask, thereby forming the Al metal line.

Abstract: A semiconductor device and method of manufacturing same, capable of preventing the material of a barrier metal layer from penetrating into an intermetallic insulating layer are provided. In an embodiment, the device can include: a first metal interconnection formed in a lower insulating layer on a semiconductor substrate; an intermetallic insulating layer formed on the lower insulating layer including the first metal interconnection, the intermetallic insulating layer having a via hole and a trench for a second metal interconnection connecting to the first metal interconnection; a carbon implantation layer formed on inner walls of the via hole and the trench of the intermetallic insulating layer; a barrier metal layer deposited on the first metal interconnection exposed through the via hole and on the carbon implantation layer; a via formed in the via hole; and the second metal interconnection formed in the trench.

Abstract: An image sensor provides enhanced integration of transistor circuitry and photo diodes. The image sensor simultaneously improves resolution and sensitivity. An image sensor an a method for manufacturing prevents defects in a photo diode by adopting a vertical photo diode structure. An image sensor includes a substrate which may include at least one circuit element. A bottom electrode and a first conductive layer may be sequentially formed over the substrate. A strained intrinsic layer may be formed over the first conductive layer. A second conductive layer may be formed over the strained intrinsic layer. An upper electrode may be formed over the second conductive layer.

Abstract: An image sensor that includes a contact plug formed in the substrate; a lower electrode formed on the contact plug; a photo diode formed on the lower electrode, the photo diode having a carbon nanotube provided therein; and an upper electrode formed on the photo diode. The photo diode can function as a color photo diode 160 that can transfer electrons or holes using the carbon nanotube while also functioning as a color filter.

Abstract: An image sensor and a method for manufacturing the same are provided. The image sensor can include transistor circuitry on a substrate, and a photodiode arranged above the transistor circuitry. The photodiode can include carbon nanotubes and a conductive polymer layer on the carbon nanotubes. A transparent conducting electrode can be provided on the carbon nanotubes.

Abstract: Provided are an image sensor and a method for manufacturing the same. The image sensor includes a substrate, a first electrode, an intrinsic layer, a second conductive type conduction layer, and a second electrode. Circuitry including a lower interconnection is disposed on the substrate. The first electrode, the intrinsic layer, and the second conductive type conduction layer are sequentially stacked on the substrate. The second electrode is disposed on the second conductive type conduction layer and includes a non-explosive transparent electrode.

Abstract: Provided is a method of forming a trench in a semiconductor device capable of improving gap-fill performance. In one method of forming a trench in a semiconductor device, an oxide layer and a mask layer are sequentially formed on a substrate. The mask layer is selectively patterned to form a mask layer pattern. The oxide layer and the substrate are patterned using the mask layer pattern as a mask to form an oxide layer pattern and a trench having a predetermined depth from a surface of the substrate. A liner oxide layer is formed in the trench. A wet etching process is performed on the substrate to remove the liner oxide layer from the trench. A device isolation layer is formed in the trench from which the liner oxide layer has been removed. Then, the mask layer pattern and the oxide layer pattern are removed from the substrate.

Abstract: The present invention relates to a semiconductor device comprising a first wafer comprising an isolating layer formed on a silicon substrate, a barrier metal layer formed on the isolating layer, a first seed layer formed on the barrier metal layer, a first metal layer formed on the first seed layer, a surface of which is cleaned with NE14 or DHF, a barrier dielectric layer formed of SiCN on the first metal layer, a second seed layer formed on the barrier dielectric layer and a second metal layer formed on the second seed layer.

Abstract: A method for forming a semiconductor device comprising forming an inter-layer dielectric (ILD) layer on a semiconductor substrate; forming a first trench and second trench in a cell area on the ILD layer, wherein the second trench has a width which is wider than the first trench; forming a first metal layer on the substrate, such that the first metal layer fills the first trench and does not entirely fill the second trench; performing a planarization process on the first metal layer such that the surface of the first metal layer in the first trench and the surface of the substrate has a height which is different than the height of the surface of the first metal layer in the second trench; and forming a plurality of align key and overlay key areas by forming a second metal layer on the surface of the substrate and first metal layer.

Abstract: A method of forming a device isolation film for a semiconductor device comprising forming a trench on a silicon semiconductor substrate, rounding an upper corner of the trench using an in-situ plasma method, filling the trench by forming an insulating layer over the silicon semiconductor substrate, and forming a shallow trench isolation area by performing a planarization process on the insulating layer so as to expose the silicon semiconductor substrate.

Abstract: An image sensor and fabricating method thereof are provided. The image sensor can include a color filter on a semiconductor substrate, a microlens on the color filter layer, and a carbon-doped low temperature oxide layer on the microlens.

Abstract: A semiconductor device includes a low-k layer formed over a semiconductor device; a first TEOS film formed over the low-k layer; a SiCN layer formed over the first TEOS film; an undoped silicate glass film formed over the SiCN layer; a nitride film formed over the USG film; a second TEOS film formed over the nitride film; a first metal interconnect extending from the low-k layer to the undoped silicate glass film; and a second metal interconnect extending from the nitride film to the second TEOS film, wherein the first metal interconnect and the second metal interconnect are electrically connected and a wire is bonded to the second metal interconnect.

Abstract: A semiconductor device according to an embodiment includes a first metal wiring formed on a semiconductor substrate; a first dielectric barrier layer formed on the first metal wiring; an inter-layer dielectric (ILD) layer formed on the first dielectric barrier layer; a plurality of second metal wirings formed on the ILD layer; and at least one hole formed in the ILD layer in regions between second metal wirings.

Abstract: A method of fabricating semiconductor device that includes at least one of: Forming a first oxide film on and/or over a semiconductor substrate to partially fill at least one trench formed in the semiconductor substrate. Removing a portion of the first oxide film that is over the semiconductor substrate (e.g. by a CMP process). Forming a second oxide film over the first oxide film in the at least one trench to substantially completely fill the at least one trench.

Abstract: A semiconductor device includes a lower layer having an uneven region on a top surface, a dielectric barrier layer disposed on the lower layer and having an even top surface, and an interlayer dielectric layer disposed on the dielectric barrier layer and having an even top surface.

Abstract: A semiconductor device and fabricating method thereof are disclosed. An adhesive layer is provided between a metal layer and a dielectric barrier layer. A dielectric layer having a low dielectric constant is formed on the dielectric barrier layer.

Abstract: An image sensor includes a photo diode formed over a semiconductor substrate. At least one IMD layer is formed on the semiconductor substrate. A dielectric medium fills a through-hole formed in the IMD layer over the photo diode. The dielectric medium may be made with materials with a higher refractive index than the materials forming the IMD layer.

Abstract: A semiconductor device and method of manufacturing same, capable of preventing the material of a barrier metal layer from penetrating into an intermetallic insulating layer are provided. In an embodiment, the device can include: a first metal interconnection formed in a lower insulating layer on a semiconductor substrate; an intermetallic insulating layer formed on the lower insulating layer including the first metal interconnection, the intermetallic insulating layer having a via hole and a trench for a second metal interconnection connecting to the first metal interconnection; a carbon implantation layer formed on inner walls of the via hole and the trench of the intermetallic insulating layer; a barrier metal layer deposited on the first metal interconnection exposed through the via hole and on the carbon implantation layer; a via formed in the via hole; and the second metal interconnection formed in the trench.

Abstract: A method for forming a metal line of a semiconductor device uses a low dielectric constant material as an interlayer dielectric layer and treats a surface of the interlayer dielectric layer with plasma to prevent moisture and ammonia from being adsorbed in the low dielectric constant material. The method for forming a metal line of a semiconductor device includes forming a lower metal line layer on a semiconductor substrate, sequentially forming an etch stop layer and an interlayer dielectric layer on an entire surface including the lower metal line layer, forming a plasma layer by treating a surface of the interlayer dielectric layer with plasma, forming a photoresist pattern on the plasma layer, forming a via hole using the photoresist pattern as a mask to open the lower metal line layer, and forming a via contact by burying a metal material in the via hole.

Abstract: Disclosed are a chemical vapor deposition apparatus capable of improving gap-fill characteristics, an operating method thereof, and a method of manufacturing a semiconductor device. The chemical vapor deposition apparatus includes a first induction coil installed on an upper portion of a chamber to feed a first power having a first radio frequency (RF) into the chamber; an electrostatic chuck corresponding to the first induction coil so as to feed a second power having a second RF into the chamber, in which the substrate is laid on the electrostatic chuck; and a gas nozzle for feeding a reaction gas into the chamber. The second RF is in a range of from 0.1 to 100 KHz.