Patents by Inventor Chi-An Wu

Chi-An Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11888918
    Abstract: A method for expanding functions of a conference system includes providing a first circuit board and a second circuit board disposed in the receiver, receiving a first wireless packet transmitted from the first transmitter merely through a second communication module of the second circuit board, controlling the second communication module for performing an unpacking process of the first wireless packet by a second processor of the second circuit board to generate first compressed media data, generating a first command signal by the second processor of the second circuit board for controlling a first processor of the first circuit board to receive the first compressed media data through a data channel, and decompressing the first compressed media data by the first processor for acquiring first media contents of the first transmitter.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: January 30, 2024
    Assignee: BenQ Corporation
    Inventors: Chen-Chi Wu, Chia-Nan Shih, Chin-Fu Chiang, Jung-Kun Tseng, Chuang-Wei Wu
  • Publication number: 20240030319
    Abstract: A manufacturing process and device are provided in which a first opening in formed within a substrate. The first opening is reshaped into a second opening using a second etching process. The second etching process is performed with a radical etch in which neutral ions are utilized. As such, substrate push is reduced.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 25, 2024
    Inventors: Bo-Feng Young, Po-Chi Wu, Che-Cheng Chang
  • Publication number: 20240021227
    Abstract: An output control interface circuit for a static random access memory (SRAM) and an output control method for the same are provided. The output control interface circuit includes an SRAM control detector circuit and an SRAM data controller circuit. The SRAM control detector circuit receives a control signal, determines whether the control signal is stable, and outputs an indication signal correspondingly. The SRAM data controller circuit receives the indication signal and the SRAM output data signal output by the SRAM control detector circuit, and outputs an output data signal according to the indication signal. In response to determining that the control signal is not stable, the SRAM data controller circuit correspondingly outputs the output data signal with a preset value. In response to determining that the control signal is stable, the SRAM data controller circuit outputs the SRAM output data signal as the output data signal correspondingly.
    Type: Application
    Filed: July 13, 2023
    Publication date: January 18, 2024
    Inventor: KUO-CHI WU
  • Publication number: 20240021738
    Abstract: A semiconductor structure including a substrate, a first well region, a second well region, an isolation, a gate structure, and a dielectric layer is provided. The first well region is disposed in the substrate, wherein a dopant of the first well region includes arsenic. The second well region is disposed in the substrate under the first well region, wherein the second well region has a conductivity type different from that of the first doping region. The isolation is disposed in the substrate and surrounds the first well region, wherein a depth of the isolation is substantially greater than or equal to a depth of the first well region from a first surface of the substrate. The gate structure are disposed sequentially over the substrate and overlaps the first well region. A method of forming the semiconductor structure is also provided.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 18, 2024
    Inventors: ANHAO CHENG, CHING-HUNG KAO, YEN-LIANG LIN, MENG-I KANG, KAI-CHI WU, CHIEN-WEI LEE
  • Publication number: 20240009790
    Abstract: A method includes steps of: performing preparation-phase measurements on a spindle of a machine tool to generate normal-condition signals; establishing a reference model based on the normal-condition signals; generating abnormal-condition signals based on the reference model and a preset damage value; utilizing principal components analysis (PCA) to characterize the normal-condition and abnormal-condition signals to obtain normal and abnormal probabilistic models, determining normal-condition and abnormal-condition reference curves based on the normal and abnormal probabilistic models; determining an alert-triggering line based on the abnormal-condition reference curve; determining a permissible range between the alert-triggering line and the normal-condition reference curve; and generating a warning signal when it is determined that a detection value falls outside of the permissible range, wherein the detection value is obtained based on application-phase measurements performed on the spindle.
    Type: Application
    Filed: December 16, 2022
    Publication date: January 11, 2024
    Inventors: TZU-CHI CHAN, JYUN-DE LI, YI-FAN SU, XIAN-YOU SHAO, YI-HAO CHEN, SHINN-LIANG CHANG, I-HUNG WANG, SHAO-CHI WU
  • Patent number: 11854942
    Abstract: A semiconductor arrangement includes a first dielectric feature passing through a semiconductive layer and a first dielectric layer over a substrate. The semiconductor arrangement includes a conductive feature passing through the semiconductive layer and the first dielectric layer and electrically coupled to the substrate. The conductive feature is adjacent the first dielectric feature and electrically isolated from the semiconductive layer by the first dielectric feature.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Josh Lin, Chung-Jen Huang, Yun-Chi Wu, Tsung-Yu Yang
  • Patent number: 11855222
    Abstract: In a method of manufacturing a semiconductor device including a Fin FET, a fin structure extending in a first direction is formed over a substrate. An isolation insulating layer is formed over the substrate so that an upper portion of the fin structure is exposed from the isolation insulating layer. A gate structure extending in a second direction crossing the first direction is formed over a part of the fin structure. A fin mask layer is formed on sidewalls of a source/drain region of the fin structure. The source/drain region of the fin structure is recessed. An epitaxial source/drain structure is formed over the recessed fin structure. In the recessing the source/drain region of the fin structure, a plasma process combining etching and deposition processes is used to form a recess having a rounded corner shape in a cross section along the second direction.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Yen Yu, Po-Chi Wu, Yueh-Chun Lai
  • Patent number: 11855201
    Abstract: A semiconductor structure includes a semiconductor substrate, a transistor, a plurality of isolation structures, and a conductive feature. The transistor is over the semiconductor substrate. The isolation structures are over the semiconductor substrate. The isolation structures define a semiconductor ring of the semiconductor substrate surrounding the transistor. The conductive feature extends vertically in the semiconductor substrate and surrounds the transistor and semiconductor ring. The conductive feature has a rounded corner facing the semiconductor ring from a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ming Pan, Chia-Ta Hsieh, Po-Wei Liu, Yun-Chi Wu
  • Publication number: 20230411280
    Abstract: A device includes a semiconductor substrate, an active region over the semiconductor substrate extending lengthwise in a first direction, a gate structure over the active region extending lengthwise in a second direction perpendicular to the first direction, a source feature and a drain feature on the active region and interposed by the gate structure, a source contact on the source feature, a drain contact on the drain feature, and a via rail over the substrate spaced from the active region. The via rail includes a main portion extending lengthwise in the first direction having a sidewall surface facing opposite the end surface of the drain contact, and a jog via extending from the main portion along the second direction and having a sidewall surface facing the second direction, each of the main portion and the jog via contacting the source contact.
    Type: Application
    Filed: August 23, 2023
    Publication date: December 21, 2023
    Inventors: Hao Kuang, Tung-Heng Hsieh, Sheng-Hsiung Wang, Bao-Ru Young, Wang-Jung Hsueh, Pang-Chi Wu
  • Publication number: 20230412163
    Abstract: A power supply module and a power supply judgment method thereof are provided. A power supply circuit supplies power to an electronic device coupled to the power supply module. A plugging detection circuit detects the connection state of the electronic device. A judgment circuit switches the electronic device to connect to a first signal channel or a second signal channel in response to whether the electronic device provides device information of the electronic device within a preset time since the electronic device is coupled to the power supply module. The power supply judgment method of the invention automatically sets signal channel configurations corresponding to different external devices, thereby greatly improving the convenience of use.
    Type: Application
    Filed: June 1, 2023
    Publication date: December 21, 2023
    Applicant: Coretronic Corporation
    Inventors: Yu-Chi Wu, Jeng-An Liao, Wei-Tai Ko
  • Publication number: 20230406445
    Abstract: A power module of an electric assisted bicycle is disclosed and includes a pedal shaft, a gear-plate-output shaft, a reducer, a motor, a first sensor, a housing, a second sensor and a driving controller. The gear-plate-output, a reducer-output shaft and a reducer-fixed shaft of the reducer are disposed in parallel and sleeved on the pedal shaft concentrically. The motor drives the gear-plate-output shaft to rotate. The first sensor is disposed on the reducer-fixed shaft for sensing a first torque of the reducer-output shaft acting on the reducer-fixed shaft. The reducer-fixed shaft is connected to the housing. A frameset-fastening component protrudes outwardly from the housing, and is configured to fix the power module on the frameset. The second sensor is disposed on the frameset-fastening component for sensing a second torque of the power module acting on the frameset. The driving controller controls the motor in accordance with the second torque and the first torque.
    Type: Application
    Filed: August 3, 2022
    Publication date: December 21, 2023
    Inventors: Hung-Wei Lin, Yu-Xian Huang, Li-Chi Wu, Chi-Wen Chung
  • Patent number: 11848445
    Abstract: A rechargeable transition metal battery includes a negative electrode, a positive electrode and an electrolyte. The negative electrode includes a negative electrode material which is a transition metal or an alloy of the transition metal. The positive electrode is electrically connected to the negative electrode and includes a host material and a positive electrode material. The host material includes a carbon. The positive electrode material is connected to the host material, and the positive electrode material is a compound of a metal, an elemental chalcogen or an elemental halogen. The electrolyte is disposed between the positive electrode and the negative electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: December 19, 2023
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Yu-Lun Chueh, Shu-Chi Wu
  • Patent number: 11848971
    Abstract: A data sharing method includes logging in a first account through a communication interface by a first receiver for establishing a link between the first receiver and a server corresponding to the communication interface, logging in a second account through the communication interface by a second receiver for establishing a link between the second receiver and the server corresponding to the communication interface, and transmitting image data from a first transmitter to the second receiver through the first receiver and the server for sharing the image data. The first receiver is linked to a first display. The second receiver is linked to a second display. The image data is shared with the first display and the second display.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: December 19, 2023
    Assignee: BenQ Corporation
    Inventors: Chen-Chi Wu, Chin-Fu Chiang, Chia-Nan Shih, Lin-Yuan You, Jung-Kun Tseng, Chuang-Wei Wu
  • Patent number: 11849253
    Abstract: A transmitter device applied to a conference system is disclosed. The conference system further includes a receiver device. The receiver device wirelessly receives an image signal transmitted by the transmitter device, and a display coupled to the receiver device displays the image signal. The transmitter device includes a memory storing an identity information corresponding to an authority of the transmitter device. When the transmitter device is coupled to an information processing device, the transmitter device transmits the identity information to the information processing device. An application driver of the information processing device determines the authority of the transmitter device according to the identity information.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: December 19, 2023
    Assignee: BENQ CORPORATION
    Inventors: Cheng-Pu Lin, Chen-Chi Wu, Chia-Nan Shih, Chin-Fu Chiang, Jung-Kun Tseng, Chuang-Wei Wu
  • Patent number: 11849156
    Abstract: A data sharing method includes providing a receiver and at least one transmitter, changing a first hardware registration identification code of the at least one transmitter to a second hardware registration identification code of a virtual camera device corresponding to at least one communication software program by the receiver, and using the virtual camera device for converting at least one image data signal transmitted from the at least one transmitter to video stream data supported by the at least one communication software program after the receiver receives the at least one image data signal.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: December 19, 2023
    Assignee: BenQ Corporation
    Inventors: Chen-Chi Wu, Chia-Nan Shih, Chin-Fu Chiang, Chuang-Wei Wu, Jung-Kun Tseng
  • Publication number: 20230402398
    Abstract: An electronic package is provided, in which a package module and a shielding member are disposed on a carrier structure, such that the shielding member covers a top surface and side surfaces of the package module to block the radiation outward from the package module and prevent problem that other electronic components on the carrier structure cannot be transmitted signals normally due to the electromagnetic interference of the package module.
    Type: Application
    Filed: August 29, 2022
    Publication date: December 14, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Che-Chi Wu, Chien-Tang Li
  • Publication number: 20230395689
    Abstract: A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
    Type: Application
    Filed: July 25, 2023
    Publication date: December 7, 2023
    Inventors: Po-Chi Wu, Chai-Wei Chang, Jung-Jui Li, Ya-Lan Chang, Yi-Cheng Chao
  • Publication number: 20230387111
    Abstract: An integrated circuit (IC) with active and dummy device cell arrays and a method of fabricating the same are discloses. The IC includes a substrate, an active device cell, and a dummy device cell. The active device cell includes an array of source/drain (S/D) regions of a first conductivity type disposed on or within the substrate and an array of gate structures with a first gate fill material disposed on the substrate. The dummy device cell includes a first array of S/D regions of the first conductivity type disposed on or within the substrate, a second array of S/D regions of a second conductivity type disposed on or within the substrate, and an array of dual gate structures disposed on the substrate. Each of the dual gate structures includes the first gate fill material and a second gate fill material that is different from the first gate fill material.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Chi WU, Ching-Hung Kao, Meng-I Kang, Kuo-Fang Ting
  • Publication number: 20230389231
    Abstract: The present disclosure provides an immersion cooling system for a server cabinet including a plurality of server boxes, a cooling tank and a plurality of liquid connecting pipes. Each server box includes an electronic device immersed in the cooling liquid, and the electronic device generates a thermal energy so that part of the cooling liquid evaporates into a hot vapor. The cooling tank is connected to the plurality of server boxes and includes a condenser and a storage part. The condenser is connected to each server box and condenses the hot vapor to form the cooling liquid. The storage part storages the cooling liquid from the condenser. Two ends of the liquid connecting pipe is connected to the storage part and the server box respectively. The cooling liquid in the storage part and the cooling liquid of each server box are maintained in a same liquid level.
    Type: Application
    Filed: August 8, 2022
    Publication date: November 30, 2023
    Inventors: Li-Hsiu Chen, Ming-Tang Yang, Wei-Chih Lin, Peng-Yuan Chen, Sheng-Chi Wu, Ren-Chun Chang, Wen-Yin Tsai
  • Publication number: 20230387107
    Abstract: A method includes: etching a trench on a surface of a substrate; filling the trench with a dielectric material to form a first isolation region; depositing a patterned mask layer on the substrate, the patterned mask layer comprising an opening exposing the substrate; implanting oxygen into the substrate through the opening to form an implant region; generating a second isolation region from the implant region; and forming a transistor on the substrate. The transistor includes a channel laterally surrounding the second isolation region.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: YUAN-CHENG YANG, YUN-CHI WU, TSU-HSIU PERNG, SHIH-JUNG TU, CHENG-BO SHU, CHIA-CHEN CHANG