Abstract: An apparatus for probing a device-under-test (DUT) includes a fixture, a circuitry film attached to the fixture, a probing tip disposed on and electrically coupled to the circuitry film to probe a device-under-test, and a first signal connector disposed on the circuitry film and electrically coupled to the probing tip through the circuitry film. The first signal connector is oriented in a direction that is angularly offset from a lengthwise direction of the probing tip.

Abstract: An apparatus for probing a device-under-test (DUT) includes a fixture disposed over the DUT, a circuitry film disposed along a contour of the fixture, a first signal connector, and a plurality of probing tips disposed on the circuitry film and extending toward the device-under-test. The circuitry film includes a first portion attached to a top sidewall of the fixture, and the first signal connector is disposed on and electrically connected to the first portion of the circuitry film. The first signal connector is electrically coupled to the probing tips through the circuitry film. A method for probing a DUT is also provided.

Abstract: A testing device for testing an antenna is provided. The testing device includes a housing, an antenna module for holding the antenna and disposed under the housing, and a receiving module disposed on the housing. The antenna module includes a base and a flexible film disposed on the base. The receiving module includes a substrate, a coupling radiation element disposed on the substrate and a support disposed on the substrate and having an opening. The antenna is partially exposed from the opening.

Abstract: A circuit probe includes a shielding probe having a base and a conductive probe ring on the base. A shielding cage is attached to the conductive probe ring and has an interior. The shielding cage is configured to be positioned to contain in the interior of the shielding cage at least one integrated circuit formed on a wafer, and to provide electromagnetic shielding of the at least one integrated circuit during testing of the at least one integrated circuit.

Abstract: A testing device for testing an antenna is provided. The testing device includes a housing, an antenna module, and a receiving module. The antenna module is used for holding the antenna and disposed on the housing, wherein the antenna is coupled to an antenna testing apparatus. The receiving module is disposed on the housing and includes a coupling radiation element physically separated from the antenna, wherein the receiving module is configured to receive an excited signal emitted from the antenna.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and multiple first conductive lines over the semiconductor substrate. The first conductive lines are not electrically connected to each other. The semiconductor device structure also includes multiple first magnetic structures wrapped around portions of the first conductive lines and multiple second conductive lines over the semiconductor substrate. The second conductive lines are electrically connected in series. The semiconductor device structure further includes multiple second magnetic structures wrapped around portions of the second conductive lines. A size of each of the second magnetic structures and a size of each of the first magnetic structures are substantially the same.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a first magnetic element and a second magnetic element over the semiconductor substrate. The semiconductor device structure also includes a first conductive line extending exceeding an edge of the first magnetic element. The semiconductor device structure further includes a second conductive line extending exceeding an edge of the second magnetic element. The second conductive line is electrically connected to the first conductive line.

Abstract: An apparatus for probing a device-under-test (DUT) includes a fixture disposed over the DUT, a circuitry film disposed along a contour of the fixture, a first signal connector, and a plurality of probing tips disposed on the circuitry film and extending toward the device-under-test. The circuitry film includes a first portion attached to a top sidewall of the fixture, and the first signal connector is disposed on and electrically connected to the first portion of the circuitry film. The first signal connector is electrically coupled to the probing tips through the circuitry film. A method for probing a DUT is also provided.

Abstract: Processing circuitry may support a secure domain and a less secure domain, where secure information associated with a secure software process is prevented from being accessed by a less secure software process in the less secure domain. Shared resource is accessible to both secure and less secure software processes. In response to detection of an anomaly condition, allocation policy for the shared resource is switched from a shared allocation policy to a secure-biased allocation policy. The secure-biased allocation policy has a stronger bias of resource allocation to secure software processes than the shared allocation policy.

Abstract: Circuitry comprises processing circuitry to process program instructions, in which the program instructions are stored by storage circuitry and the processing circuitry comprises execute-in-place processing circuitry configured to execute the program instructions from the storage circuitry; a prefetch buffer to store program instructions for execution by the processing circuitry; prefetch circuitry to control prefetching of program instructions to the prefetch buffer and to select a next instruction for prefetching; and replacement circuitry to control deletion of instructions from the prefetch buffer to provide storage for newly prefetched program instructions; in which one or both of the prefetch circuitry and the replacement circuitry are configured so that one or both of a selection operation by the prefetch circuitry of a next program instruction for prefetching, and a deletion operation to delete an instruction from the prefetch buffer by the replacement circuitry is dependent upon previously executed p

Abstract: A testing device for testing an antenna is provided. The testing device includes a housing, an antenna module, and a receiving module. The antenna module is used for holding the antenna and disposed on the housing, wherein the antenna is coupled to an antenna testing apparatus. The receiving module is disposed on the housing and includes a coupling radiation element physically separated from the antenna, wherein the receiving module is configured to receive an excited signal emitted from the antenna.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a first magnetic element and a second magnetic element over the semiconductor substrate. The semiconductor device structure also includes a first conductive line extending exceeding an edge of the first magnetic element. The semiconductor device structure further includes a second conductive line extending exceeding an edge of the second magnetic element. The second conductive line is electrically connected to the first conductive line.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate having a testing region and multiple first conductive lines over the testing region. The first conductive lines are electrically connected in series. The semiconductor device structure also includes multiple second conductive lines over the testing region. The second conductive lines are electrically connected in series, and the second conductive lines are physically separated from the first conductive lines. The semiconductor device structure further includes multiple magnetic structures wrapping around portions of the first conductive lines and wrapping around portions of the second conductive lines. The magnetic structures are arranged in a column.

Abstract: Circuitry comprises processing circuitry to process program instructions, in which the program instructions are stored by storage circuitry and the processing circuitry comprises execute-in-place processing circuitry configured to execute the program instructions from the storage circuitry; a prefetch buffer to store program instructions for execution by the processing circuitry; prefetch circuitry to control prefetching of program instructions to the prefetch buffer and to select a next instruction for prefetching; and replacement circuitry to control deletion of instructions from the prefetch buffer to provide storage for newly prefetched program instructions; in which one or both of the prefetch circuitry and the replacement circuitry are configured so that one or both of a selection operation by the prefetch circuitry of a next program instruction for prefetching, and a deletion operation to delete an instruction from the prefetch buffer by the replacement circuitry is dependent upon previously executed p

Abstract: A circuit probe includes a shielding probe having a base and a conductive probe ring on the base. A shielding cage is attached to the conductive probe ring and has an interior. The shielding cage is configured to be positioned to contain in the interior of the shielding cage at least one integrated circuit formed on a wafer, and to provide electromagnetic shielding of the at least one integrated circuit during testing of the at least one integrated circuit.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate having a testing region and multiple first conductive lines over the testing region. The first conductive lines are electrically connected in series. The semiconductor device structure also includes multiple second conductive lines over the testing region. The second conductive lines are electrically connected in series, and the second conductive lines are physically separated from the first conductive lines. The semiconductor device structure further includes multiple magnetic structures wrapping around portions of the first conductive lines and wrapping around portions of the second conductive lines. The magnetic structures are arranged in a column.

Abstract: Processing circuitry may support a secure domain and a less secure domain, where secure information associated with a secure software process is prevented from being accessed by a less secure software process in the less secure domain. Shared resource is accessible to both secure and less secure software processes. In response to detection of an anomaly condition, allocation policy for the shared resource is switched from a shared allocation policy to a secure-biased allocation policy. The secure-biased allocation policy has a stronger bias of resource allocation to secure software processes than the shared allocation policy.

Abstract: A computer system includes a cache unit and a first processing unit. The first processing unit runs a first program thread, and performs an instruction to store information of a signal change event into the cache unit through a cache stashing operation, where the signal change event is initiated by the first program thread for alerting a second program thread.

Abstract: A secure protection method executed by a processor is provided. The secure protection method includes the following steps: Perform a security checking before or after executing an instruction according to an instruction security attribute (ISA) of the instruction and a security attribute (SA) of an operational event (OE); and ignore the OE, defer the OE, or raise a security exception when the security checking fails. The OE is generated as a side effect when the processor fetches or executes the instruction, or generated as a monitoring result on the instruction, or generated in response to an external input of the processor.

Abstract: The present invention provides a data aggregator serving between at least one data source and at least one electronic device, wherein the data aggregator is arranged to wirelessly communicate with the data source and the electronic device, and the data aggregator comprises a memory comprising a data cache, a backup memory and a FIFO buffer, and a controller for controlling a use of the memory. The controller selects at least one of the data cache, the backup memory and the FIFO buffer to store data received from the data source according to characteristics of the data provided by the data source, and forwards the data stored in the data cache, the backup memory or the FIFO buffer to the electronic device.