Patents by Inventor Chi Chang

Chi Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11635792
    Abstract: An electronic device having a detachable memory is provided with a docking connector, and includes a device body and a memory. The device body has an accommodating slot and a stopping portion provided corresponding to the accommodating slot, and the stopping portion and the accommodating slot jointly form a displacement space in between. The memory is provided with a connector and a protruding stopped portion. When the memory is accommodated in the accommodating slot, the stopped portion is moved along into the displacement space and is stopped by the stopping portion, and the connector is docked with the docking connector. Thus, the memory is provided with an anti-misplugging effect.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: April 25, 2023
    Assignee: Getac Technology Corporation
    Inventors: Jui-Lin Yang, Juei-Chi Chang
  • Patent number: 11631621
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a first magnetic element and a second magnetic element over the semiconductor substrate. The semiconductor device structure also includes a first conductive line extending exceeding an edge of the first magnetic element. The semiconductor device structure further includes a second conductive line extending exceeding an edge of the second magnetic element. The second conductive line is electrically connected to the first conductive line.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 18, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Mill-Jer Wang, Tang-Jung Chiu, Chi-Chang Lai, Chia-Heng Tsai, Mirng-Ji Lii, Weii Liao
  • Patent number: 11631709
    Abstract: A solid-state image sensor is provided. The solid-state image sensor includes a plurality of photoelectric conversion elements. The solid-state image sensor also includes a first color filter layer disposed above the photoelectric conversion elements and having a plurality of first color filter segments. The solid-state image sensor further includes a second color filter layer disposed adjacent to the first color filter layer and having a plurality of second color filter segments. The solid-state image sensor includes a first grid structure disposed between the first color filter layer and the second color filter layer. The first grid structure has a first grid height. The solid-state image sensor also includes a second grid structure disposed between the first color filter segments and between the second color filter segments. The second grid structure has a second grid height that is lower than or equal to the first grid height.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: April 18, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Ching-Hua Li, Yu-Chi Chang, Cheng-Hsuan Lin, Han-Lin Wu
  • Publication number: 20230110102
    Abstract: A solid-state image sensor is provided. The solid-state image sensor includes photoelectric conversion elements and a color filter layer disposed above the photoelectric conversion elements. The photoelectric conversion elements and the color filter layer form normal pixels and auto-focus pixels, the color filter layer that correspond to the normal pixels are divided into first color filter segments and second color filter segments, the first color filter segments are disposed on at least one side that is closer to an incident light, and the width of the first color filter segments is greater than the width of the second color filter segments.
    Type: Application
    Filed: October 7, 2021
    Publication date: April 13, 2023
    Inventors: Ching-Hua LI, Cheng-Hsuan LIN, Zong-Ru TU, Yu-Chi CHANG, Han-Lin WU
  • Publication number: 20230115906
    Abstract: An imaging optical system includes an infrared light absorbing element, an infrared light reducing film and a plate element in order along a paraxial path. The infrared light absorbing element is made of an infrared light absorbing plastic material, and the infrared light absorbing element is configured to refract a light. The infrared light reducing film is closer to an image surface of the imaging optical system than an incident surface of the infrared light absorbing element to the image surface of the imaging optical system. The plate element is disposed between the infrared light reducing film and the image surface, the plate element includes a translucent portion, a holder portion and a taper structure coating. The taper structure coating is disposed on at least one of an incident surface and an exit surface of the translucent portion.
    Type: Application
    Filed: September 21, 2022
    Publication date: April 13, 2023
    Inventors: Pei-Chi CHANG, Chien-Pang CHANG, Yu-Chen LAI, Ming-Ta CHOU, Wen-Yu TSAI, Kuo-Chiang CHU
  • Publication number: 20230116719
    Abstract: Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, to memory devices with nitride-based ferroelectric materials. Other embodiments may be disclosed or claimed.
    Type: Application
    Filed: September 24, 2021
    Publication date: April 13, 2023
    Inventors: Elijah V. KARPOV, Sou-Chi CHANG, Uygar E. AVCI, Shriram SHIVARAMAN
  • Publication number: 20230116528
    Abstract: A computer with a function expansion mechanism includes a computer host and a function expansion device. The computer host includes a base and a functional base cover covering the base. A bottom surface of the base has a first opening, and the base is provided therein with a connector exposed from the first opening. The function expansion device includes an expansion seat, a top surface of the expansion seat has a second opening, and the expansion seat is provided therein with a docking connector exposed from the second opening. The computer host is stacked and assembled by the bottom surface at the top surface of the function expansion device, such that the first opening and the second opening are in communication with each other and the connector and the docking connector are mutually docked, thereby achieving an effect of function expansion without removal of a computer.
    Type: Application
    Filed: August 9, 2022
    Publication date: April 13, 2023
    Inventors: Hsin-Chih Chou, Juei-Chi Chang, Wan-Lin Hsu, Kun-Cheng Lee
  • Patent number: 11626475
    Abstract: An improved trench capacitor structure is disclosed that allows for the formation of narrower capacitors. An example capacitor structure includes a first conductive layer on the sidewalls of an opening through a thickness of a dielectric layer, a capacitor dielectric layer on the first conductive layer, a second conductive layer on the capacitor dielectric layer, and a conductive fill material on the second conductive layer. The capacitor dielectric layer laterally extends above the opening and along a top surface of the dielectric layer, and the conductive fill material fills a remaining portion of the opening.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: April 11, 2023
    Assignee: Intel Corporation
    Inventors: Nazila Haratipour, Chia-Ching Lin, Sou-Chi Chang, Ian A. Young, Uygar E. Avci, Jack T. Kavalieros
  • Publication number: 20230104518
    Abstract: A method for pre-processing geometric model data of a 3D modeling software for deep learning includes steps of: determining a size of a virtual grid that is visualized as a cube based on a smallest value of dimension among values of dimension of objects; generating an empty tensor that is visualized as a cuboid consisting of the virtual grids; assigning an initial value to each of the virtual grids of the empty tensor; replacing the initial value of each of those of the virtual grids with a pre-determined identification attribute value that corresponds uniquely to the property of the corresponding one of the at least one geometric object, so as to generate a 3D geometric model tensor to be used as an input for deep learning; and saving the 3D geometric model tensor in a database in a predefined format.
    Type: Application
    Filed: September 27, 2022
    Publication date: April 6, 2023
    Inventors: I-Chen WU, Chi-Chang LIU, Chih-Hsiung CHANG
  • Publication number: 20230098594
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related MIM capacitors that have a multiple trench structure to increase a charge density, where a dielectric of the MIM capacitor includes a perovskite-based material. In embodiments, a first electrically conductive layer may be coupled with a top metal layer of the MIM, and/or a second conductive layer may be coupled with a bottom metal layer of the MIM to reduce RC effects. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Chia-Ching LIN, Kaan OGUZ, Sou-Chi CHANG, Arnab SEN GUPTA, I-Cheng TUNG, Ian A. YOUNG, Matthew V. METZ, Uygar E. AVCI, Sudarat LEE
  • Publication number: 20230094647
    Abstract: Provided are hard carbon beads, their preparation method, and an energy storage device comprising the same. Microwave heating is used to synthesize cross-linked phenolic formaldehyde for reducing energy consumption and controlling the crosslinking density of cured phenolic formaldehyde. The problems caused by high temperature heating and hydrothermal process for curing resin can be solved by the instant disclosure, which can increase the economic values of electrode and energy storage device comprising the hard carbon beads.
    Type: Application
    Filed: November 9, 2021
    Publication date: March 30, 2023
    Inventors: Chi-Chang HU, Chen-Wei TAI, Tien-Yu YI, An-Pang TU, Ping-Chieh WANG
  • Publication number: 20230097641
    Abstract: Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, ferroelectric three-dimensional (3D) memory architectures. Other embodiments may be disclosed or claimed.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Christopher M. NEUMANN, Nazila HARATIPOUR, Sou-Chi CHANG, Uygar E. AVCI, Shriram SHIVARAMAN
  • Publication number: 20230097184
    Abstract: Embodiments of the present disclosure are directed to advanced integrated circuit structure fabrication and, in particular, integrated circuits with high dielectric constant (HiK) interfacial layering between an electrode and a ferroelectric (FE) or anti-ferroelectric (AFE) layer. Other embodiments may be disclosed or claimed.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Sarah ATANASOV, Nazila HARATIPOUR, Sou-Chi CHANG, Shriram SHIVARAMAN, Uygar E. AVCI
  • Publication number: 20230097736
    Abstract: Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, to ferroelectric random access memory (FRAM) devices with an enhanced capacitor architecture. Other embodiments may be disclosed or claimed.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Shriram SHIVARAMAN, Sou-Chi CHANG, Nazila HARATIPOUR, Uygar E. AVCI, Jason PECK, Nafees A. KABIR, Sarah ATANASOV
  • Publication number: 20230100860
    Abstract: Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, to memory devices utilizing dead-layer-free materials to reduce disturb effects. Other embodiments may be described or claimed.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Sou-Chi CHANG, Nazila HARATIPOUR, Shriram SHIVARAMAN, Uygar E. AVCI, Sarah ATANASOV, Christopher M. NEUMANN
  • Publication number: 20230102177
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to stacked MIM capacitors with multiple metal and dielectric layers that include insulating spacers on edges of one or more of the multiple layers to prevent unintended electrical coupling between metal layers during manufacturing. The dielectric layers may include Perovskite-based materials. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Chia-Ching LIN, Sou-Chi CHANG, Kaan OGUZ, I-Cheng TUNG, Arnab SEN GUPTA, Ian A. YOUNG, Uygar E. AVCI, Matthew V. METZ
  • Publication number: 20230101111
    Abstract: Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, to three-dimensional ferroelectric random access memory (3D FRAM) devices with a sense transistor coupled to a plurality of capacitors to (among other things) help improve signal levels and scaling. Other embodiments may be disclosed or claimed.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Shriram SHIVARAMAN, Sou-Chi CHANG, Nazila HARATIPOUR, Uygar E. AVCI, Sarah ATANASOV, Jason PECK, Christopher M. NEUMANN
  • Publication number: 20230095994
    Abstract: A meta optical device is provided. The meta optical device includes an array of meta structures. Each of the meta structures includes a plurality of stacked layers at least including a first layer with a first refractive index and a second layer with a second refractive index. The first refractive index and the second refractive index are different.
    Type: Application
    Filed: September 29, 2021
    Publication date: March 30, 2023
    Inventors: Kai-Hao CHANG, Shin-Hong KUO, An-Li KUO, Chun-Yuan WANG, Yu-Chi CHANG, Chih-Ming WANG
  • Patent number: D982610
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 4, 2023
    Assignee: VIVOTEK INC.
    Inventors: Kuan-Hung Chen, Kai-Sheng Chuang, Chia-Chi Chang, Yu-Fang Huang, Kai-Ting Yu, Wen-Chun Chen, Shu-Jung Hsu, Tsao-Wei Hung
  • Patent number: D983632
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: April 18, 2023
    Inventor: Yin-Chi Chang