Abstract: A method includes following steps. A target layer is formed over a substrate. A first hard mask layer is formed over the target layer by a plasma generated using a first radio frequency generator and a second radio frequency generator. The first radio frequency generator and the second radio frequency generator have different powers. A second hard mask layer is formed over the first hard mask layer by a plasma generated using the first radio frequency generator without using the second radio frequency generator. A photoresist layer is formed over the second hard mask layer. The photoresist layer is exposed. The photoresist layer is developed. The first hard mask layer and the second hard mask layer are patterned using the photoresist layer as an etch mask. The target layer is patterned using the first hard mask layer and the second hard mask layer as an etch mask.

Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.

Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1?a?2, b?1, c?1, and b+c?5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.

Abstract: A cotton stuffing machine includes a roller conveyance device, a rotation device, an upward pushing device, and a downward pressing device. The roller conveyance device inputs cotton and presses and pulls the cotton to deliver a cotton section. The rotation device includes a plurality of rotation arms. Each rotation arm has a holding barrel on two ends thereof, and undergoes a 180-degree rotation displacement between a feeding position and an outputting position. The upward pushing device is disposed beneath the feeding position for pushing the cotton section upward into the holding barrel. The downward pressing device is disposed above the outputting position for pushing out the cotton section and inserting it into the bottle. Thus, the present invention improves the efficiency of stuffing operation for stuffing the cotton into the bottles.

Abstract: A method includes: forming a stack of nanostructures over a substrate; forming a source/drain opening adjacent the stack of nanostructures; forming a semiconductor layer in the source/drain opening; forming an amorphous semiconductor layer by performing an ion implantation on the semiconductor layer; and forming a recrystallized source/drain by annealing the amorphous semiconductor layer.

Abstract: An image adjustment method, applied to an image sensing system comprising an image sensor, comprising: (a) sensing a target image by the image sensor; (b) dividing the target image to a plurality of image regions; (c) acquiring location information of at least one first target feature in the image regions; (d) computing brightness information of each of the image regions; (e) generating adjustment curves according to the brightness information and according to required brightness values of each of the image regions; and (f) adjusting brightness values of the image regions according to the adjustment curves. The step (d) adjusts the brightness information according to the location information or the step (e) adjusts the adjustment curves according to the location information.

Abstract: An image signal amplifying circuit comprising an amplifier and a gain control circuit. The amplifier respectively amplifies a first image signal and a second image signal, which are generated by a pixel array of an image sensor, by a first analog gain and a second analog gain, wherein each one of pixel circuits of the pixel array comprises a first capacitor for generating the first image signal and a second capacitor for generating the second image signal, wherein a charge storage capacity of the first capacitor is smaller than a charge storage capacity of the second capacitor. The gain control circuit selectively adjusts the first analog gain or the second analog gain. Each one of the pixel circuits has a first conversion gain corresponding to the first capacitor and a second conversion gain corresponding to the second capacitor.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an isolation layer over the base portion and surrounding the fin portion. The semiconductor device structure includes a metal gate stack over the isolation layer and wrapping around an upper part of the fin portion. The metal gate stack includes a gate dielectric layer and a metal gate electrode layer over the gate dielectric layer, and the gate dielectric layer includes fluorine. A first part of the isolation layer is not covered by the metal gate stack, the first part includes fluorine, and a first concentration of fluorine in the first part increases toward a first top surface of the first part.

Abstract: A semiconductor device and method of manufacture are provided. In embodiments a first liner is deposited to line a recess between a first semiconductor fin and a second semiconductor fin, the first liner comprising a first material. The first liner is annealed to transform the first material to a second material. A second liner is deposited to line the recess, the second liner comprising a third material. The second liner is annealed to transform the third material to a fourth material.

Abstract: The disclosure describes embodiments of an apparatus including a first gas chromatograph including a fluid inlet, a fluid outlet, and a first temperature control. A controller is coupled to the first temperature control and includes logic to apply a first temperature profile to the first temperature control to heat, cool, or both heat and cool the first gas chromatograph. Other embodiments are disclosed and claimed.

Abstract: Disclosed is a fluid control device for de-vacuuming in a wafer grinding apparatus. The fluid control device has a linear driver which drives a positioning seat to move upward and downward, several drain tubes are respectively disposed in the positioning seat, several flexible covers are respectively attached to each of the drain tubes, a converting seat is disposed on a support frame, and several flow diverters are arranged at intervals on the support frame. Several relay channels are formed within the converting seat and each of the flexible covers corresponds with each of the relay channels individually, the other end of each relay channel communicates with several relay tubes. Each flow diverter is connected to several conveying tubes, and communicates with several conveying tubes correspondingly, whereby the flow is controlled to enter the wafer grinding apparatus between the upper grinding wheel and the wafer subjected to the grinding thereof.

Abstract: The present invention provides a wearable device and an operating method thereof. A power circuit provides an analog voltage source to a touch display driver integrated circuit through a first pin; the power circuit provides a digital voltage source to the touch display driver integrated circuit and a fingerprint on display (FOD) recognition circuit through a second pin; and the power circuit provides a first OLED voltage to an organic light-emitting diode (OLED) and the FOD recognition circuit through a third pin, wherein the FOD recognition circuit uses the first OLED voltage as an analog voltage source.

Abstract: A manufacturing method of a lithium battery negative electrode at least includes the following steps. An electroplating equipment is provided, wherein the electroplating equipment has a drying chamber, and the drying chamber includes an electroplating tank, an electroplating wheel set, and a film sticking wheel set. A copper foil is disposed in the drying chamber. The electroplating wheel set transports the copper foil to form a lithium metal layer on the copper foil, and the copper foil and the lithium metal layer form a copper-lithium composite metal layer. The film sticking wheel set transports the copper-lithium composite metal layer and attaches a protective film to the copper-lithium composite metal layer.

Abstract: A surface treatment method of a copper foil, an antioxidant copper foil, and a cathode of a lithium battery are provided. The antioxidant copper foil includes a copper foil substrate and an antioxidant layer formed thereon. The antioxidant layer contains chromium elements derived from a chromic acid compound, and contains nitrogen elements at least partially derived from an aminotetrazole compound and a nitrogen-containing heterocyclic compound. The antioxidant copper foil satisfies the following characteristics: (a) the antioxidant layer has a chromium content of between 5 and 35 ?g/m2 determined by XRF; (b) the antioxidant layer has a nitrogen content of between 0.1 and 10 wt % determined by XPS; (c) the antioxidant copper foil has a C—N signal detected by headspace GC-MS; and (d) after baking the antioxidant copper foil at 250° C. for 10 minutes, a surface color difference ?E of the antioxidant layer is not greater than 8.

Abstract: A semiconductor device structure and methods of forming the same are described. The method includes forming a fin structure from a substrate, depositing a first semiconductor material on a first semiconductor layer of the fin structure, depositing a second semiconductor material on the first semiconductor material, depositing an interlayer dielectric layer over the second semiconductor material, forming an opening in the interlayer dielectric layer to expose the second semiconductor material, and performing a dopant implantation process to form a doped region. The doped region includes a first portion of the second semiconductor material. Then, the method further includes performing an amorphization process to form an amorphous region, and the amorphous region includes a second portion of the second semiconductor material. The method further includes performing an annealing process to recrystallize the amorphous region.

Abstract: Compositions and methods are provided for the production of bio-based polymers (e.g., polymers made from glucose), including polyesters, as well as end products resulting from such production, in which one or more color stabilizing additive compounds is utilized. The additive(s) may be used in the stabilization of a monomer or prepolymer that is reacted in such production methods, prior to obtaining the polymer. Particular bio-based polymers are those having furandicarboxylate moieties or residues in their backbone structure, with poly(alkylene furan dicarboxylate) polymers, such as polyethylene furan dicarboxylate) (PEF) and poly(trimethylene furan dicarboxylate) (PTF) being representative.

Abstract: Disclosed is a display substrate including a base substrate, which includes first and second display regions, and at least one first data line. The first display region includes first and second sub-display regions located on opposite sides of the second display region along a first direction and a third sub-display region located on at least one side of the second display region along a second direction. The first data line includes a first sub-data line located in the first sub-display region and connected with a pixel circuit of the first sub-display region, a second sub-data line located in the second sub-display region and connected with a pixel circuit of the second sub-display region, and a third sub-data line which is connected with the first and second sub-data lines, located in the third sub-display region, and connected with at least one second pixel circuit of the third sub-display region.

Abstract: Disclosed in the present disclosure is a screen bracket and a vehicle-mounted rotating screen. The screen bracket includes a rotating base, a connecting shaft, and a limiting member. A first end of the connecting shaft is connected to a display screen, a second end of the connecting shaft rotatably connected to the rotating base, the second end of the connecting shaft defines a plurality of locating holes. The limiting member is fixed to the rotating base, the limiting member has a telescopic rod, and the telescopic rod is disposed towards the connecting shaft. When the connecting shaft rotates to a specified rotation angle, a corresponding locating hole is facing the telescopic rod, and the telescopic rod is configured to clamp the corresponding locating hole in an extended state and detach the corresponding locating hole in a retracted state.

Abstract: Methods for forming a semiconductor device structure are described. The method includes forming first and second fin structures over a substrate and forming a dielectric wall between the first and second fin structures. The forming the dielectric wall includes depositing a first dielectric layer between the first and second fin structures, and a seam is formed in the first dielectric layer. The forming the dielectric wall further includes performing an anisotropic etch process to remove a portion of the first dielectric layer to expose the seam, performing an isotropic etch process to enlarge an opening of the seam, and the seam has a “V” shaped cross-sectional profile. The forming the dielectric wall further includes depositing a second dielectric layer between the first and second fin structures, and the seam is filled. The method further includes forming shallow trench isolation regions adjacent the first and second fin structures.