Patents by Inventor Chi-Chou Lin
Chi-Chou Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10963546Abstract: A biometric security device for digital key storing is disclosed. The biometric security device includes a biometric information fetching module and a processing module. The processing module has a nonvolatile storage unit and a processing unit. The nonvolatile storage unit includes a secure storage unit and a general storage unit. The biometric security device with a secure electronic key designed for storing secret data utilizes both TrustZoneā¢ technology (or similar technology) and biometric authentication. Thus, it can provide the flexibility for multiple users or applications to use the biometric security device or any equipment the biometric security device mounted in without compromising the safeguard of the data stored therein.Type: GrantFiled: April 9, 2018Date of Patent: March 30, 2021Assignee: SunASIC Technologies, Inc.Inventors: Chi Chou Lin, Zheng Ping He
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Patent number: 10879081Abstract: Methods and apparatus for reducing and eliminating defects in tungsten film are disclosed herein. In the present disclosure, reducing or eliminating oxidation of a first surface of a tungsten film having a predetermined first thickness disposed upon a substrate and within a plurality of trenches is disclosed. The plurality of trenches include a predetermined depth, and a width of less than 20 nanometers. The predetermined first thickness of the tungsten film is substantially uniform throughout the plurality of trenches such that the predetermined first thickness of the tungsten film does not substantially change to a second thickness when the first surface is contacted with air or oxygen.Type: GrantFiled: November 20, 2018Date of Patent: December 29, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Guoqiang Jian, Wei Tang, Chi-Chou Lin, Paul F. Ma, Kai Wu, Vikash Banthia, Mei Chang, Jia Ye, Wenyu Zhang, Jing Zhou
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Publication number: 20200303250Abstract: The present disclosure generally relates to methods for processing of substrates, and more particularly relates to methods for forming a metal gapfill. In one implementation, the method includes forming a metal gapfill in an opening using a multi-step process. The multi-step process includes forming a first portion of the metal gapfill, performing a sputter process to form one or more layers on one or more side walls, and growing a second portion of the metal gapfill to fill the opening with the metal gapfill. The metal gapfill formed by the multi-step process is seamless, and the one or more layers formed on the one or more side walls seal any gaps or defects between the metal gapfill and the side walls. As a result, fluids utilized in subsequent processes do not diffuse through the metal gapfill.Type: ApplicationFiled: February 27, 2020Publication date: September 24, 2020Inventors: Xi CEN, Feiyue MA, Kai WU, Yu LEI, Kazuya DAITO, Yi XU, Vikash BANTHIA, Mei CHANG, He REN, Raymond Hoiman HUNG, Yakuan YAO, Avgerinos V. GELATOS, David T. OR, Jing ZHOU, Guoqiang JIAN, Chi-Chou LIN, Yiming LAI, Jia YE, Jenn-Yue WANG
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Patent number: 10665450Abstract: Methods and apparatus for forming a semiconductor structure, including depositing a doping stack having a first surface atop a high-k dielectric layer, wherein the doping stack includes at least one first metal layer having a first surface, at least one second metal layer comprising a first aluminum dopant and a first surface, wherein the second metal layer is atop the first surface of the first metal layer, and at least one third metal layer atop the first surface of the second metal layer; depositing an anneal layer atop the first surface of the doping stack; annealing the structure to diffuse at least the first aluminum dopant into the high-k dielectric layer; removing the anneal layer; and depositing at least one work function layer atop the first surface of the doping stack.Type: GrantFiled: August 17, 2018Date of Patent: May 26, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Yixiong Yang, Paul F. Ma, Wei V. Tang, Wenyu Zhang, Shih Chung Chen, Chen Han Lin, Chi-Chou Lin, Yi Xu, Yu Lei, Naomi Yoshida, Lin Dong, Siddarth Krishnan
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Patent number: 10578575Abstract: A noise-reduced capacitive sensing unit is disclosed. The noise-reduced capacitive sensing unit includes: a sensing plate; a first bias voltage source for providing a first bias voltage; a second bias voltage source for providing a second bias voltage; a switch unit, connected between two bias voltage sources and the sensing plate, for selectively providing one of the bias voltages to the sensing plate; an excitation signal source for providing a bi-level waveform; a reference capacitor, formed between the excitation signal source and the sensing plate, for injecting the excitation signal to the sensing plate; and a voltage follower for providing sensing results, wherein an input node of the voltage follower is connected to the sensing plate.Type: GrantFiled: September 13, 2017Date of Patent: March 3, 2020Assignee: SunASIC Technologies, Inc.Inventors: Chi-Chou Lin, Zheng-Ping He
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Publication number: 20190370439Abstract: A secure system on chip that prevents a software program from being tampered, rehosted, and pirated is disclosed. The secure system on chip includes: a processor; a memory unit, wherein at least a portion thereof is configured into a protected memory area by limiting the read, write, and/or execute right thereof; a memory protection unit (MPU), connected between the processor and the memory unit, for managing access of the memory unit from the processor; and a memory signature unit, connected to the processor and the memory unit, having a read-only register stored with a memory signature extracted from contents stored in a specified memory area of the memory unit by a signature extraction signal received from the processor, wherein the memory signature unit is connected to the memory unit via a Direct Memory Access (DMA) channel.Type: ApplicationFiled: May 29, 2018Publication date: December 5, 2019Inventors: Chi Chou LIN, Zheng Ping HE
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Publication number: 20190326120Abstract: The present disclosure relates to a method for forming a p-metal work function nitride film having a desired p-work function on a substrate, including: adjusting one or more of a temperature of a substrate, a duration of one or more temporally separated vapor phase pulses, a ratio of a tungsten precursor to a titanium precursor, or a pressure of a reaction to tune a work function of a p-metal work function nitride film to a desired p-work function, and contacting the substrate with temporally separated vapor phase pulses of the tungsten precursor, the titanium precursor, and a reactive gas to form a p-metal work function nitride film thereon having the desired p-work function.Type: ApplicationFiled: April 11, 2019Publication date: October 24, 2019Inventors: Guoqiang JIAN, WEI TANG, CHI-CHOU LIN, PAUL MA, YIXIONG YANG, MEI CHANG, WENYI LIU
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Patent number: 10452565Abstract: A secure electronic device is disclosed. The secure electronic device includes a first core processing unit, a secure boot Read-Only Memory, a first non-volatile memory, a first volatile memory and a first communication interface. A new framework based on the secure electronic device with built-in security is able to safeguard intellectual property for the developers and further improves the security of the secure electronic device. Thus, more developers can launch their programs or services without being stolen or tampered by an unauthorized party.Type: GrantFiled: January 12, 2018Date of Patent: October 22, 2019Assignee: SUNASIC TECHNOLOGIES, INC.Inventors: Chi Chou Lin, Hao-Jyh Liu, Zheng Ping He
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Publication number: 20190311097Abstract: A biometric security device for digital key storing is disclosed. The biometric security device includes a biometric information fetching module and a processing module. The processing module has a nonvolatile storage unit and a processing unit. The nonvolatile storage unit includes a secure storage unit and a general storage unit. The biometric security device with a secure electronic key designed for storing secret data utilizes both TrustZoneā¢ technology (or similar technology) and biometric authentication. Thus, it can provide the flexibility for multiple users or applications to use the biometric security device or any equipment the biometric security device mounted in without compromising the safeguard of the data stored therein.Type: ApplicationFiled: April 9, 2018Publication date: October 10, 2019Inventors: Chi Chou LIN, Zheng Ping HE
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Publication number: 20190220419Abstract: A secure electronic device is disclosed. The secure electronic device includes a first core processing unit, a secure boot Read-Only Memory, a first non-volatile memory, a first volatile memory and a first communication interface. A new framework based on the secure electronic device with built-in security is able to safeguard intellectual property for the developers and further improves the security of the secure electronic device. Thus, more developers can launch their programs or services without being stolen or tampered by an unauthorized party.Type: ApplicationFiled: January 12, 2018Publication date: July 18, 2019Inventors: Chi Chou LIN, Hao-Jyh LIU, Zheng Ping HE
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Patent number: 10346665Abstract: A noised-reduced capacitive image sensor and a method operating the capacitive image sensor are provided. The capacitive image sensor includes: a number of capacitive sensing units forming an array, each capacitive sensing unit for transforming a distance between a portion of a surface of an approaching finger and a top surface thereof into an output electric potential, wherein a value of the output electric potential is changed by a driving signal applied to the sensing unit; at least one sample-and-hold circuit for capturing and retaining different output electric potentials; at least one signal conditioning circuit, each comprising at least one differential amplifier for amplifying a difference between two electric potentials retained by the sample-and-hold circuit; and a driving source, for providing the driving signal to the capacitive sensing units.Type: GrantFiled: May 30, 2017Date of Patent: July 9, 2019Assignee: SUNASIC TECHNOLOGIES LIMITEDInventors: Chi Chou Lin, Zheng Ping He
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Publication number: 20190157102Abstract: Methods and apparatus for reducing and eliminating defects in tungsten film are disclosed herein. In the present disclosure, reducing or eliminating oxidation of a first surface of a tungsten film having a predetermined first thickness disposed upon a substrate and within a plurality of trenches is disclosed. The plurality of trenches include a predetermined depth, and a width of less than 20 nanometers. The predetermined first thickness of the tungsten film is substantially uniform throughout the plurality of trenches such that the predetermined first thickness of the tungsten film does not substantially change to a second thickness when the first surface is contacted with air or oxygen.Type: ApplicationFiled: November 20, 2018Publication date: May 23, 2019Inventors: GUOQIANG JIAN, WEI TANG, CHI-CHOU LIN, PAUL F. MA, KAI WU, VIKASH BANTHIA, MEI CHANG, JIA YE, WENYU ZHANG, JING ZHOU
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Patent number: 10216974Abstract: A noised-reduced capacitive image sensor and a method operating the capacitive image sensor are provided. In order to generate a noise-reduced image of a fingerprint, the capacitive image sensor has an array of capacitive sensing units which each has a protective layer; a sensing electrode; a voltage follower; a comparative capacitor; and a bias voltage supply circuit. The comparative capacitor, a portion of the bias voltage supply circuit, and the voltage follower are formed in an isolated well which is configured in such a way that current is able to be prevented from flowing across an interface in the isolated well and surrounding structures. The driving source is connected to a bulk node of the isolated well such that well potential of the isolated well equals to the output electric potential of a driving source.Type: GrantFiled: June 2, 2017Date of Patent: February 26, 2019Assignee: SUNASIC TECHNOLOGIES LIMITEDInventors: Chi Chou Lin, Zheng Ping He
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Publication number: 20190057863Abstract: Methods and apparatus for forming a semiconductor structure, including depositing a doping stack having a first surface atop a high-k dielectric layer, wherein the doping stack includes at least one first metal layer having a first surface, at least one second metal layer comprising a first aluminum dopant and a first surface, wherein the second metal layer is atop the first surface of the first metal layer, and at least one third metal layer atop the first surface of the second metal layer; depositing an anneal layer atop the first surface of the doping stack; annealing the structure to diffuse at least the first aluminum dopant into the high-k dielectric layer; removing the anneal layer; and depositing at least one work function layer atop the first surface of the doping stack.Type: ApplicationFiled: August 17, 2018Publication date: February 21, 2019Inventors: YIXIONG YANG, PAUL F. MA, WEI V. TANG, WENYU ZHANG, SHIH CHUNG CHEN, CHEN HAN LIN, CHI-CHOU LIN, YI XU, YU LEI, NAOMI YOSHIDA, LIN DONG, SIDDARTH KRISHNAN
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Patent number: 10205895Abstract: A capacitive image sensor with noise reduction feature and a method operating the capacitive image sensor are provided. The capacitive image sensor includes: a number of capacitive sensing units, arranged in a form of an array, wherein each of the number of capacitive sensing units switches between three states: sensing state, idle state, and emitting state; a driving source, for providing a driving signal to an adjacent finger overlying the number of capacitive sensing units through the number of capacitive sensing units which are in the emitting state; a number of driving switches, each connected between one of the number of capacitive sensing units and the driving source; and a control and timing logic, connected to each of the number of driving switches, for controlling the state of each of the number of capacitive sensing units.Type: GrantFiled: July 5, 2017Date of Patent: February 12, 2019Assignee: SUNASIC TECHNOLOGIES LIMITEDInventors: Chi Chou Lin, Zheng Ping He
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Patent number: 10185864Abstract: A fingerprint sensing device and a method operating the fingerprint sensing device are provided. The fingerprint sensing device includes at least one sensing core, a system unit, at least one switching unit and a charge holding unit. The switching unit is connected between the sensing core and the system unit to provide four different operation states: a normal state; an isolation state; a drive-up state; and a drive-down state. A voltage shift between the finger and the sensing core is generated by controlling the switching unit to perform different operation states in various orders.Type: GrantFiled: July 5, 2017Date of Patent: January 22, 2019Assignee: SunASIC Technologies LimitedInventors: Chi Chou Lin, Zheng Ping He
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Publication number: 20190012502Abstract: A fingerprint sensing device and a method operating the fingerprint sensing device are provided. The fingerprint sensing device includes at least one sensing core, a system unit, at least one switching unit and a charge holding unit. The switching unit is connected between the sensing core and the system unit to provide four different operation states: a normal state; an isolation state; a drive-up state; and a drive-down state. A voltage shift between the finger and the sensing core is generated by controlling the switching unit to perform different operation states in various orders.Type: ApplicationFiled: July 5, 2017Publication date: January 10, 2019Applicant: SunASIC Technologies LimitedInventors: Chi Chou LIN, Zheng Ping HE
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Publication number: 20190014274Abstract: A capacitive image sensor with noise reduction feature and a method operating the capacitive image sensor are provided. The capacitive image sensor includes: a number of capacitive sensing units, arranged in a form of an array, wherein each of the number of capacitive sensing units switches between three states: sensing state, idle state, and emitting state; a driving source, for providing a driving signal to an adjacent finger overlying the number of capacitive sensing units through the number of capacitive sensing units which are in the emitting state; a number of driving switches, each connected between one of the number of capacitive sensing units and the driving source; and a control and timing logic, connected to each of the number of driving switches, for controlling the state of each of the number of capacitive sensing units.Type: ApplicationFiled: July 5, 2017Publication date: January 10, 2019Applicant: SunASIC Technologies LimitedInventors: Chi Chou LIN, Zheng Ping HE
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Patent number: 10168450Abstract: A silicon wafer having colored top side is disclosed in the present invention. The silicon wafer includes: a wafer; a first semi-conductor layer, formed on at least a portion of a top side of the wafer, having periodical structures to form a grating pattern, and a second semi-conductor layer, formed on the first semi-conductor layer with a bottom side substantially fully contacted with the periodical structures. The first semi-conductor layer and the second semi-conductor layer form a photonic crystal layer and work to reflect a predetermined wavelength range of incident visible light beams. The present invention provides a silicon wafer which can reflect specified color(s) from the surface facing external light beams. Therefore, dies from cutting the silicon wafer with functions to interact with external environment rather than packaged can have advantages to show some specified logo or trademark.Type: GrantFiled: December 27, 2013Date of Patent: January 1, 2019Assignee: Sunasic Technologies, Inc.Inventors: Chi-Chou Lin, Zheng-Ping He
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Patent number: 10162995Abstract: A capacitive image sensor with noise reduction feature and a method operating the capacitive image sensor are provided. The capacitive image sensor includes: a number of capacitive sensing units forming an array, each capacitive sensing unit for transforming a distance between a portion of a surface of an approaching finger and a top surface thereof into an output electric potential, wherein a value of the output electric potential is changed by a driving signal coupled on the finger; at least one sample-and-hold circuit for capturing and retaining different output electric potentials; at least one signal conditioning circuit, each comprising: at least one differential amplifier for amplifying a difference between two electric potentials retained by the sample-and-hold circuit; and a driving source, for providing the driving signal to the finger.Type: GrantFiled: April 17, 2017Date of Patent: December 25, 2018Assignee: SUNASIC TECHNOLOGIES, INC.Inventors: Chi Chou Lin, Zheng Ping He