Patents by Inventor Chi-Hao Chiu

Chi-Hao Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7138900
    Abstract: The present invention relates to a resetable over-current protection device. The device is characterized in that: disconnected areas are maintained at end faces of formed cutting regions of the protection device, wherein one or two of the end faces of the formed cutting regions are partly formed with electrically conductive layers so as to increase the lifespan of the device and allows easy manufacturing of the device. The present invention also provides a method of manufacturing the resetable over-current protection device. The method is characterized in that a polymer-based sheet is divided into a plurality of components from which resetable over-current protection devices are subsequently manufactured into the resetable over-current protection devices to save the cost of material.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: November 21, 2006
    Assignee: Inpaq Technology Co., Ltd.
    Inventors: Wen-Lung Liu, Chi-Hao Chiu, Kang-Neng Hsu, Szu-Lung Sun
  • Publication number: 20060227544
    Abstract: A backlight module is suitable for use in a liquid crystal display. The backlight module includes a back plate, and a lamp, over the back plate by a distance. The back plate has a hole under the lamp. The hole can be a hole under the lamp corresponding to an electrode of a high voltage end of the lamp. The hole or a certain number of the holes can be replaced by an indentation, which can also effectively increase the separation distance between the lamp and the back plate. Actually, the hole and the indentation can be used together to form a desired pattern corresponding to the lamp. The lamp can be a plurality of lamp.
    Type: Application
    Filed: April 8, 2005
    Publication date: October 12, 2006
    Inventors: Chi-Hao Chiu, Ping-Fu Wang
  • Patent number: 7067904
    Abstract: A flip-chip type quad flat package and a leadframe. The leadframe comprises a bump-connecting area and a non-connecting area. The maximum width of the bump-connecting area is larger than the width of the non-connecting area. A bump is limited to the bump-connecting area after performing a reflow process so that the bumps are prevented from collapsing, the manufacturing cost is reduced and the process is simplified.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: June 27, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsueh-Te Wang, Meng-Jen Wang, Chi-Hao Chiu, Chien Liu
  • Patent number: 7022551
    Abstract: A quad flat flip chip packaging process and a leadframe therefor are provided. A sacrificial film is attached on the leads of the leadframe for limiting the extent of bumps when formed and saving the manufacturing cost. Besides, the sacrificial film can be removed from the leadframe after a reflow step. Thus, the delamination between the molding compound material and the leads can be prevented during the molding step.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: April 4, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Hsueh-Te Wang, Meng-Jen Wang, Chien Liu, Chi-Hao Chiu
  • Patent number: 6967403
    Abstract: A package structure with a heat spreader and manufacturing method thereof is disclosed. The package structure includes a substrate, a ground pad, a heat spreader, a non-conductive adhesive layer, and a pre-solder layer. A die is seated on the substrate, and the ground pad is disposed on the surface of the substrate. The manufacturing method of the package structure includes the following steps: (a) providing the substrate; (b) forming the pre-solder layer on the ground pad by solder paste printing; (c) forming the non-conductive adhesive layer on the substrate surface for being adjacent to the pre-solder layer by adhesive dispensing; (d) disposing the heat spreader onto the non-conductive layer and the pre-solder layer; and (e) heating the non-conductive adhesive layer for solidification and continuing to heat the pre-solder layer for solder reflow so that the heat spreader is adhered to the substrate via the non-conductive adhesive layer and coupled to the ground pad via the pre-solder layer.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: November 22, 2005
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Ta Chuang, Chih-Min Pao, Chien Liu, Chi-Hao Chiu
  • Patent number: 6929980
    Abstract: A manufacturing method of a flip chip package mainly comprises the following steps. Initially, a chip having an active surface with a plurality of bumps formed thereon is provided. Next, the active surface of the chip is faced to and disposed on an upper surface of a substrate. In such manner, the chip will be electrically connected to the substrate and a gap between the chip and the substrate will be formed. Afterwards, an underfill is filled in the gap and then a first curing process is performed to have the underfill partially hardened to have the underfill transformed into a partially hardened underfill. Finally, the combination of the chip, the substrate and the partially hardened underfill is flipped over to have the substrate located above the chip, then a second curing process is performed to have the partially hardened underfill into a fully hardened underfill, and then flipping over the combination of the chip, the substrate and the fully hardened underfill.
    Type: Grant
    Filed: June 24, 2004
    Date of Patent: August 16, 2005
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Hao Chiu, Yu-Wen Chen, Chi-Ta Chuang, Chi-Sheng Chao
  • Publication number: 20050156296
    Abstract: A quad flat flip chip package and a leadframe therefor are provided. A bump connection part is defined by bending or etching the leads of the leadframe. Thus, the bump formed after a reflow process is limited within the bump connection part, and the collapse of the bump can be prevented. Moreover, and the manufacturing costs of the package can be decreased and the process thereof can be simplified.
    Type: Application
    Filed: November 15, 2004
    Publication date: July 21, 2005
    Inventors: Hsueh-Te Wang, Meng-Jen Wang, Chien Liu, Chi-Hao Chiu
  • Publication number: 20050146050
    Abstract: The present invention provides a flip chip package structure comprising a substrate, a chip and a plurality ofbumps. A plurality of contacts is disposed on the carrying surface and the chip is disposed on the carrying surface of the substrate. The chip includes an active surface and a plurality of bonding pads. The active surface of the chip comprises a bumping region and a plurality of non-bumping regions at corners of the chip, while the bonding pads are disposed within the bumping region of the active surface of the chip. The bumps, respectively disposed on the bonding pads, electrically and mechanically connect the contacts and the bonding pads.
    Type: Application
    Filed: November 14, 2004
    Publication date: July 7, 2005
    Inventors: Yu-Wen Chen, Chi-Hao Chiu, Chung-Yao Kao, Ming-Chieh Kao
  • Publication number: 20050133896
    Abstract: A semiconductor package includes a flip chip mounted on a plurality of leads and encapsulated by a molding compound. The upper surfaces of the leads includes a plurality of bump-bonding regions at the fan-in ends of the leads, and the lower surfaces of the leads include a plurality of outer connecting regions at the fan-out ends of the leads. A plurality of indentations are formed at the upper surfaces of the leads and adjacent to the corresponding bump-bonding regions so as to avoid solder contamination on the leads. After molding, the indentations are filled with the molding compound. Preferably, the indentations have a reversed “?”-shaped profile to prevent bumps of the flip chip from excessively wetting over the other portions of the leads to firmly fix the fan-in ends of the leads.
    Type: Application
    Filed: December 17, 2004
    Publication date: June 23, 2005
    Inventors: Chien Liu, Hsueh-Te Wang, Meng-Jen Wang, Chi-Hao Chiu, Tai-Yuan Huang
  • Publication number: 20050104167
    Abstract: A flip-chip type quad flat package and a leadframe. The leadframe comprsies a bump-connecting area and a non-connecting area. The maximum width of the bump-connecting area is larger than the width of the non-connecting area. A bump is limited to the bump-connecting area after performing a reflow process so that the bumps are prevented from collapsing, the manufacturing cost is reduced and the process is simplified.
    Type: Application
    Filed: November 1, 2004
    Publication date: May 19, 2005
    Inventors: Hsueh-Te Wang, Meng-Jen Wang, Chi-Hao Chiu, Chien Liu
  • Publication number: 20050101053
    Abstract: A quad flat flip chip packaging process and a leadframe therefor are provided. A sacrificial film is attached on the leads of the leadframe for limiting the extent of bumps when formed and saving the manufacturing cost. Besides, the sacrificial film can be removed from the leadframe after a reflow step. Thus, the delamination between the molding compound material and the leads can be prevented during the molding step.
    Type: Application
    Filed: October 18, 2004
    Publication date: May 12, 2005
    Inventors: Hsueh-Te Wang, Meng-Jen Wang, Chien Liu, Chi-Hao Chiu
  • Publication number: 20040266061
    Abstract: A manufacturing method of a flip chip package mainly comprises the following steps. Initially, a chip having an active surface with a plurality of bumps formed thereon is provided. Next, the active surface of the chip is faced to and disposed on an upper surface of a substrate. In such manner, the chip will be electrically connected to the substrate and a gap between the chip and the substrate will be formed. Afterwards, an underfill is filled in the gap and then a first curing process is performed to have the underfill partially hardened to have the underfill transformed into a partially hardened underfill. Finally, the combination of the chip, the substrate and the partially hardened underfill is flipped over to have the substrate located above the chip, then a second curing process is performed to have the partially hardened undefill into a fully hardened underfill, and then flipping over the combination of the chip, the substrate and the fully hardened underfill.
    Type: Application
    Filed: June 24, 2004
    Publication date: December 30, 2004
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Hao Chiu, Yu-Wen Chen, Chi-Ta Chuang, Chi-Sheng Chao
  • Publication number: 20040256643
    Abstract: A package structure with a heat spreader and manufacturing method thereof is disclosed. The package structure includes a substrate, a ground pad, a heat spreader, a non-conductive adhesive layer, and a pre-solder layer. A die is seated on the substrate, and the ground pad is disposed on the surface of the substrate. The manufacturing method of the package structure includes the following steps: (a) providing the substrate; (b) forming the pre-solder layer on the ground pad by solder paste printing; (c) forming the non-conductive adhesive layer on the substrate surface for being adjacent to the pre-solder layer by adhesive dispensing; (d) disposing the heat spreader onto the non-conductive layer and the pre-solder layer; and (e) heating the non-conductive adhesive layer for solidification and continuing to heat the pre-solder layer for solder reflow so that the heat spreader is adhered to the substrate via the non-conductive adhesive layer and coupled to the ground pad via the pre-solder layer.
    Type: Application
    Filed: June 18, 2004
    Publication date: December 23, 2004
    Inventors: Chi-Ta Chuang, Chih-Min Pao, Chien Liu, Chi-Hao Chiu
  • Publication number: 20040252433
    Abstract: The present invention relates to a resetable over-current protection device. The device is characterized in that: disconnected areas are maintained at end faces of formed cutting regions of the protection device, wherein one or two of the end faces of the formed cutting regions are partly formed with electrically conductive layers so as to increase the lifespan of the device and allows easy manufacturing of the device. The present invention also provides a method of manufacturing the resetable over-current protection device. The method is characterized in that a polymer-based sheet is divided into a plurality of components from which resetable over-current protection devices are subsequently manufactured into the resetable over-current protection devices to save the cost of material.
    Type: Application
    Filed: May 25, 2004
    Publication date: December 16, 2004
    Applicant: INPAQ TECHNOLOGY CO., LTD.
    Inventors: Wen-Lung Liu, Chi-Hao Chiu, Kang-Neng Hsu, Szu-Lung Sun
  • Publication number: 20040229399
    Abstract: A flip chip package structure and manufacturing method thereof is provided. A chip is electrically connected to a substrate. A heat sink is attached to the backside of the chip. The heat sink has at least a through hole located at a peripheral region and laterally adjacent to the chip. A dispensing process is carried out to deliver an underfill material via the through hole such that the space between the chip and the substrate is filled. The underfill material also extends to cover a portion of the heat sink so that the heat sink and the substrate are connected together. The underfill material is cured to fix the heat sink, the substrate and the chip in position.
    Type: Application
    Filed: May 17, 2004
    Publication date: November 18, 2004
    Inventors: Yu-Wen Chen, Chih-Ming Chung, Chi-Hao Chiu
  • Publication number: 20040212069
    Abstract: A multi-chips stacked package comprises a substrate, an upper chip, a lower chip, a dam, a heat spreader, an underfill, a plurality of first electrically conductive bumps and a plurality of second electrically conductive bumps. The upper chip is flip-chip bonded to the upper surface of the substrate and the second chip is accommodated in the opening and flip-chip bonded to the upper chip. Furthermore, the dam is disposed on the substrate and supports the heat spreader so as to fix the heat spreader to the back surface of the first chip. In addition, the underfill is filled into the space which is enclosed by the dam, the upper surface of the substrate and the heat spreader. In such a manner, at least the upper chip, the lower chip, the first and second electrically conductive bumps and a portion of the substrate are covered by the underfill.
    Type: Application
    Filed: April 9, 2004
    Publication date: October 28, 2004
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Wen Chen, Meng-Jen Wang, Chi-Hao Chiu
  • Publication number: 20040212097
    Abstract: A flip chip package comprises a carrier, a chip, a dam, a heat spreader, an underfill and a plurality of electrically conductive bumps. The chip is flip-chip bonded to the upper surface of the carrier. Furthermore, the dam is disposed on the carrier and supports the heat spreader. In addition, the underfill is filled into the space that is enclosed by the dam. In such a manner, the chip, the electrically conductive bumps and a portion of the carrier are covered by the underfill. The underfill is connected to the dam, the heat spreader and the carrier simultaneously, so the reinforced structure including the heat spreader, the underfill and the dam can reduce the stress at the interconnection between the chip and carrier so as to prevent the bumps connecting the chip and the carrier from being damaged.
    Type: Application
    Filed: February 18, 2004
    Publication date: October 28, 2004
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Wen Chen, Chi-Hao Chiu, Meng-Jen Wang