Patents by Inventor Chi Hoon Jun

Chi Hoon Jun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220216429
    Abstract: The present invention relates to a multi-component host material and an organic electroluminescent device comprising the same. By comprising a specific combination of the multi-component host compounds, the organic electroluminescent device according to the present invention can provide high luminous efficiency and excellent lifespan characteristics.
    Type: Application
    Filed: March 8, 2022
    Publication date: July 7, 2022
    Inventors: Hee-Choon AHN, Young-Kwang KIM, Su-Hyun LEE, Ji-Song JUN, Seon-Woo LEE, Chi-Sik KIM, Kyoung-Jin PARK, Nam-Kyun KIM, Kyung-Hoon CHOI, Jae-Hoon SHIM, Young-Jun CHO, Kyung-Joo LEE
  • Publication number: 20220216430
    Abstract: The present invention relates to a multi-component host material and an organic electroluminescent device comprising the same. By comprising a specific combination of the multi-component host compounds, the organic electroluminescent device according to the present invention can provide high luminous efficiency and excellent lifespan characteristics.
    Type: Application
    Filed: March 8, 2022
    Publication date: July 7, 2022
    Inventors: Hee-Choon AHN, Young-Kwang KIM, Su-Hyun LEE, Ji-Song JUN, Seon-Woo LEE, Chi-Sik KIM, Kyoung-Jin PARK, Nam-Kyun KIM, Kyung-Hoon CHOI, Jae-Hoon SHIM, Young-Jun CHO, Kyung-Joo LEE
  • Patent number: 10848074
    Abstract: Provided is a high voltage bridge rectifier. The high voltage bridge rectifier includes a supporter, a substrate on the supporter, a plurality of equivalent diode circuits mounted on the substrate, interconnection lines, and terminals. The substrate may include an insulation layer, element pads disposed on a center of the insulation layer, and terminal pads disposed on an edge of the insulation layer to surround the element pads.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: November 24, 2020
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chi Hoon Jun, Sang Choon Ko, Dong Yun Jung, Jong-Moon Park, Hyun-Gyu Jang
  • Publication number: 20200119654
    Abstract: Provided is a high voltage bridge rectifier. The high voltage bridge rectifier includes a supporter, a substrate on the supporter, a plurality of equivalent diode circuits mounted on the substrate, interconnection lines, and terminals. The substrate may include an insulation layer, element pads disposed on a center of the insulation layer, and terminal pads disposed on an edge of the insulation layer to surround the element pads.
    Type: Application
    Filed: September 11, 2019
    Publication date: April 16, 2020
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Chi Hoon JUN, Sang Choon KO, Dong Yun JUNG, Jong-Moon PARK, Hyun-Gyu JANG
  • Patent number: 10020201
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: July 10, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon Jun, Sang Choon Ko, Seok-Hwan Moon, Woojin Chang, Sung-Bum Bae, Young Rak Park, Je Ho Na, Jae Kyoung Mun, Eun Soo Nam
  • Patent number: 10014401
    Abstract: A semiconductor device includes a semiconductor structure including a substrate, a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer, a first passivation pattern provided on the semiconductor structure, and first and second conductive patterns provided on the semiconductor structure and spaced from the first passivation pattern.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: July 3, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jeho Na, Hyung Seok Lee, Chi Hoon Jun, Sang Choon Ko, Myungjoon Kwack, Young Rak Park, Woojin Chang, Hyun-Gyu Jang, Dong Yun Jung
  • Patent number: 9905654
    Abstract: Provided is a bridge diode according to an embodiment of the inventive concept. The bridge diode includes a first structure including a first lower nitride film and a first upper nitride film, which are laminated on the substrate, a second structure including a second lower nitride film and a second upper nitride film, which are laminated on the substrate, a first electrode structural body disposed on the first structure, and a second electrode structural body disposed on the second structure.
    Type: Grant
    Filed: July 20, 2016
    Date of Patent: February 27, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Dong Yun Jung, Hyun Soo Lee, Sang Choon Ko, Minki Kim, Jeho Na, Eun Soo Nam, Young Rak Park, Junbo Park, Hyung Seok Lee, Hyun-Gyu Jang, Chi Hoon Jun
  • Patent number: 9800181
    Abstract: Provided is a hybrid diode device. The hybrid diode device includes a first lower nitride layer disposed on a substrate and including a first 2-dimensional electron gas (2DEG) layer, a second lower nitride layer extending from the first lower nitride layer to the outside of the substrate and including a second 2DEG layer, a first upper nitride layer disposed on the first lower nitride layer, a second upper nitride layer disposed on the second lower nitride layer, a first cap layer disposed on the first upper nitride layer, a second cap layer disposed on the second upper nitride layer, a first electrode structure connected to the first lower nitride layer and the first cap layer; and a second electrode structure connected to the second lower nitride layer and the first electrode structure. The second lower nitride layer generates electric energy through dynamic movement.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: October 24, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon Jun, Sang Choon Ko, Minki Kim, Jeho Na, Young Rak Park, Junbo Park, Hyun Soo Lee, Hyung Seok Lee, Hyun-Gyu Jang, Dong Yun Jung
  • Patent number: 9755027
    Abstract: Provided is an electronic device. The electronic device includes a first semiconductor layer and a second semiconductor layer sequentially stacked on a substrate and a source electrode, a gate electrode, and a drain electrode arranged on the second semiconductor layer. The electronic device further includes a field plate which is electrically connected to the source electrode and extends towards the drain electrode, wherein the field plate becomes farther away from the substrate as the field plate becomes closer to the drain electrode.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: September 5, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyung Seok Lee, Ki Hwan Kim, Sang Choon Ko, Zin-Sig Kim, Jeho Na, Eun Soo Nam, Young Rak Park, Junbo Park, Chi hoon Jun, Dong Yun Jung
  • Patent number: 9748941
    Abstract: Provided is a stabilizing circuit structure using a sense field effect transistor (sense-FET). A power semiconductor module includes a depletion-mode field effect transistor (D-mode FET) and the sense FET that has same structure as the D-mode FET and varies in area. Also the power semiconductor module includes not only an enhancement-mode field effect transistor (E-mode FET), but also the stabilizing circuit including circuit elements such as a resistor, a capacitor, an inductor, or a diode.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: August 29, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Minki Kim, Hyun-Gyu Jang, Dong Yun Jung, Sang Choon Ko, Hyun Soo Lee, Chi Hoon Jun
  • Publication number: 20170213904
    Abstract: A semiconductor device includes a semiconductor structure including a substrate, a first semiconductor layer on the substrate, and a second semiconductor layer on the first semiconductor layer, a first passivation pattern provided on the semiconductor structure, and first and second conductive patterns provided on the semiconductor structure and spaced from the first passivation pattern.
    Type: Application
    Filed: January 24, 2017
    Publication date: July 27, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jeho NA, Hyung Seok LEE, Chi Hoon JUN, Sang Choon KO, Myungjoon KWACK, Young Rak PARK, Woojin CHANG, Hyun-Gyu JANG, Dong Yun JUNG
  • Publication number: 20170141704
    Abstract: Provided is a hybrid diode device. The hybrid diode device includes a first lower nitride layer disposed on a substrate and including a first 2-dimensional electron gas (2DEG) layer, a second lower nitride layer extending from the first lower nitride layer to the outside of the substrate and including a second 2DEG layer, a first upper nitride layer disposed on the first lower nitride layer, a second upper nitride layer disposed on the second lower nitride layer, a first cap layer disposed on the first upper nitride layer, a second cap layer disposed on the second upper nitride layer, a first electrode structure connected to the first lower nitride layer and the first cap layer; and a second electrode structure connected to the second lower nitride layer and the first electrode structure. The second lower nitride layer generates electric energy through dynamic movement.
    Type: Application
    Filed: October 21, 2016
    Publication date: May 18, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon JUN, Sang Choon KO, Minki KIM, Jeho NA, Young Rak PARK, Junbo PARK, Hyun Soo LEE, Hyung Seok LEE, Hyun-Gyu JANG, Dong Yun JUNG
  • Publication number: 20170117889
    Abstract: Provided is a stabilizing circuit structure using a sense field effect transistor (sense-FET). A power semiconductor module includes a depletion-mode field effect transistor (D-mode FET) and the sense FET that has same structure as the D-mode FET and varies in area. Also the power semiconductor module includes not only an enhancement-mode field effect transistor (E-mode FET), but also the stabilizing circuit including circuit elements such as a resistor, a capacitor, an inductor, or a diode.
    Type: Application
    Filed: July 29, 2016
    Publication date: April 27, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Minki KIM, Hyun-Gyu JANG, Dong Yun JUNG, Sang Choon KO, Hyun Soo LEE, Chi Hoon JUN
  • Patent number: 9613884
    Abstract: Provided is a semiconductor device. The semiconductor device includes a substrate including a cantilever configured to generate a flow of cooling media through dynamic movement, an active area on the substrate which an electronic device is provided on, an insulation layer disposed to be spaced apart from the active area on the substrate, a lower electrode on the insulation layer, a piezoelectric film on the lower electrode, and an upper electrode on the piezoelectric film.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: April 4, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon Jun, Jeho Na, Dong Yun Jung, Sang Choon Ko, Eun Soo Nam, Hyung Seok Lee
  • Publication number: 20170077282
    Abstract: Provided is an electronic device. The electronic device includes a first semiconductor layer and a second semiconductor layer sequentially stacked on a substrate and a source electrode, a gate electrode, and a drain electrode arranged on the second semiconductor layer. The electronic device further includes a field plate which is electrically connected to the source electrode and extends towards the drain electrode, wherein the field plate becomes farther away from the substrate as the field plate becomes closer to the drain electrode.
    Type: Application
    Filed: September 14, 2016
    Publication date: March 16, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyung Seok LEE, Ki Hwan KIM, Sang Choon KO, Zin-Sig KIM, Jeho NA, EUN SOO NAM, Young Rak PARK, Junbo PARK, Chi Hoon JUN, Dong Yun JUNG
  • Publication number: 20170062385
    Abstract: Disclosed is a power converting device including: a first laminate having a plurality of non-magnetic substrates which are laminated; electronic devices disposed on at least one of the non-magnetic substrates; first conductive patterns disposed on the non-magnetic substrate on which the electronic devices are disposed, the first conductive patterns being connected to the electronic devices; at least one via electrode connecting the respective first conductive patterns to each other; a second laminate disposed on one side of the first laminate and having a plurality of magnetic sheets which are laminated; second conductive patterns disposed on at least two magnetic sheets among the plurality of magnetic sheets; and at least one via electrode connecting the respective second conductive patterns to each other, wherein the first and second via electrodes are connected to each other.
    Type: Application
    Filed: July 27, 2016
    Publication date: March 2, 2017
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Dong Yun JUNG, Sang Choon KO, Chi Hoon JUN, Minki KIM, Jeho NA, EUN SOO NAM, Young Rak PARK, Junbo PARK, Hyun Soo LEE, Hyung Seok LEE, Hyun-Gyu JANG
  • Publication number: 20170025550
    Abstract: Provided is a bridge diode according to an embodiment of the inventive concept. The bridge diode includes a first structure including a first lower nitride film and a first upper nitride film, which are laminated on the substrate, a second structure including a second lower nitride film and a second upper nitride film, which are laminated on the substrate, a first electrode structural body disposed on the first structure, and a second electrode structural body disposed on the second structure.
    Type: Application
    Filed: July 20, 2016
    Publication date: January 26, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Dong Yun JUNG, Hyun Soo LEE, Sang Choon KO, Minki KIM, Jeho NA, EUN SOO NAM, Young Rak PARK, Junbo PARK, Hyung Seok LEE, Hyun-Gyu JANG, Chi Hoon JUN
  • Publication number: 20160380119
    Abstract: A first nitride semiconductor layer of a semiconductor device is provided on a substrate, a second nitride semiconductor layer is provided on the first nitride semiconductor layer, a first ohmic metal and a second ohmic metal are provided on the second nitride semiconductor layer, a recess region is provided in the second nitride semiconductor layer between the first ohmic metal and the second ohmic metal, a passivation layer covers side of the first ohmic metal and a bottom surface and sides of the recess region, and a Schottky electrode is provided on the first ohmic metal and extends into the recess region.
    Type: Application
    Filed: March 30, 2016
    Publication date: December 29, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Dong Yun JUNG, Hyun Soo LEE, Sang Choon KO, Jeong-Jin KIM, Zin-Sig KIM, Jeho NA, Eun Soo NAM, Jae Kyoung MUN, Young Rak PARK, Sung-Bum BAE, Hyung Seok LEE, Woojin CHANG, Hyungyu JANG, Chi Hoon JUN
  • Publication number: 20160260653
    Abstract: Provided is a semiconductor device. The semiconductor device includes a substrate including a cantilever configured to generate a flow of cooling media through dynamic movement, an active area on the substrate which an electronic device is provided on, an insulation layer disposed to be spaced apart from the active area on the substrate, a lower electrode on the insulation layer, a piezoelectric film on the lower electrode, and an upper electrode on the piezoelectric film.
    Type: Application
    Filed: October 1, 2015
    Publication date: September 8, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon JUN, Jeho NA, Dong Yun JUNG, Sang Choon KO, Eun Soo NAM, Hyung Seok LEE
  • Publication number: 20160225631
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes: an active region provided on a substrate; an inlet channel formed as a single cavity buried in one side of the substrate; an outlet channel formed as a single cavity buried in the other side of the substrate; a micro channel array comprising a plurality of micro channels, wherein the plurality of micro channels are formed as a plurality of cavities buried in the substrate, and one end of the micro channel array is connected to a side of the inlet channel and the other end of the micro channel array is connected to a side of the outlet channel; and a micro heat sink array separating the micro channels from one another.
    Type: Application
    Filed: April 8, 2016
    Publication date: August 4, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Chi Hoon JUN, Sang Choon KO, Seok-Hwan MOON, Woojin CHANG, Sung-Bum BAE, Young Rak PARK, Je Ho NA, Jae Kyoung MUN, Eun Soo NAM