Patents by Inventor Chi Li

Chi Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10461014
    Abstract: In an embodiment, a device includes: a die stack over and electrically connected to an interposer, the die stack including a topmost integrated circuit die including: a substrate having a front side and a back side opposite the front side, the front side of the substrate including an active surface; a dummy through substrate via (TSV) extending from the back side of the substrate at least partially into the substrate, the dummy TSV electrically isolated from the active surface; a thermal interface material over the topmost integrated circuit die; and a dummy connector in the thermal interface material, the thermal interface material surrounding the dummy connector, the dummy connector electrically isolated from the active surface of the topmost integrated circuit die.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: October 29, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Shu Lin, Wensen Hung, Hung-Chi Li, Tsung-Yu Chen
  • Publication number: 20190315677
    Abstract: Disclosed are cyclopentene compounds for use as inhibitors of gamma-aminobutyric acid (GABA) aminotransferase (AT) and/or ornithine aminotransferase (OAT). The disclosed cyclopentene compounds include 3-carbon substituted 4-aminocyclopent-1-ene-carboxylic acid compounds which may be formulated in pharmaceutical composition for treating diseases and disorders associated with GABA-AT and/or OAT activity, including epilepsy, addiction, and hepatocellular carcinoma (HCC).
    Type: Application
    Filed: April 4, 2019
    Publication date: October 17, 2019
    Applicant: Northwestern University
    Inventors: Richard B. Silverman, Chi-Li Ni, Jose Juncosa
  • Publication number: 20190277917
    Abstract: A method for estimating a state of charge of a battery includes obtaining a discharge voltage and discharge capacity curve of a battery under a preset discharge current, in responding to an order for estimating the state of charge of the battery; matching the discharge voltage and discharge capacity curve with a plurality of standard curves in a database, thereby obtaining an optimal matching curve with respect to the discharge voltage and discharge capacity curve; and calculating the state of charge of the battery according to the optimal matching curve, under a preset discharge stage. The present method can accurately calculate the state of charge of the battery with simple calculation manners.
    Type: Application
    Filed: May 24, 2019
    Publication date: September 12, 2019
    Inventors: Ka Chung Chan, Lung Fai Moses Ng, Chi Li Wu, Yu Hang Christopher Chao
  • Publication number: 20190270116
    Abstract: A phosphor device of an illumination system emitting a first waveband light includes a substrate and a phosphor layer formed on the substrate. The phosphor layer includes a first phosphor agent and a second phosphor agent. The first waveband light is converted into a first color light by the first phosphor agent. The second phosphor agent is distributed over the first phosphor agent and mixed with the first phosphor agent, and the first waveband light is converted into a second color light by the second phosphor agent. The first color light and the second color light are integrated into the second waveband light. The difference between the first wavelength peak of the first color light and the second wavelength peak of the second color light is 50 to 100 nanometers. Therefore, the advantages of increasing the purity, the luminance and the luminous intensity of specific color light are achieved.
    Type: Application
    Filed: April 22, 2019
    Publication date: September 5, 2019
    Inventors: Keh-Su Chang, Jih-Chi Li, Li-Cheng Yang
  • Publication number: 20190256462
    Abstract: The invention relates to crystalline forms of the bis-HCI salt of a compound represented by Structural Formula 1, and pharmaceutical compositions comprising crystalline forms of the bis-HCL salt of a compound represented by Structural Formula 1 described herein. The crystalline forms of the bis-HCl salt of a compound of Structural Formula 1 and compositions comprising the crystalline forms of the compound of Structural Formula 1 provided herein, in particular, crystalline Form I, crystalline Form J, crystalline Form A, and crystalline Form B, or mixtures thereof, can be incorporated into pharmaceutical compositions, which can be used to treat various disorders. Also described herein are methods for preparing the crystalline forms (e.g., Forms I, J, B and A) of the bis-HCI salt of a compound represented by Structural Formula 1.
    Type: Application
    Filed: October 19, 2017
    Publication date: August 22, 2019
    Inventors: Danny LaFrance, Philip C. Hogan, Yansheng Liu, Minsheng He, Chi-Li Chen, John Niu
  • Patent number: 10381303
    Abstract: Semiconductor device structures are provided. The semiconductor device structures include a semiconductor substrate. The semiconductor device structures also include an inner metal layer disposed on the semiconductor substrate and a top metal layer disposed on the inner metal layer, wherein the top metal layer has a first portion and a second portion, and wherein the first portion completely covers the inner metal layer, the second portion surrounds the first portion, and the first portion is separated from the second portion. The semiconductor device structures further include a passivation layer disposed on the top metal layer, wherein the passivation layer has a hollowed pattern to expose the top metal layer.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: August 13, 2019
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Ting-You Lin, Chi-Li Tu
  • Publication number: 20190199989
    Abstract: Methods and systems for chroma reshaping are applied to images or video frames. The method comprises receiving at least one image or video frame. The color space of the at least one image or video frame is partitioned in M1×M2×M3 non-overlapping bins. For each bin it is determined whether it is a valid bin, for which the at least one image or video frame has at least one pixel with a color value falling within said bin. For each chroma channel, a required number of codewords is calculated for representing two color values in said valid bin that have consecutive codewords for the respective chroma channel without a noticeable difference. At least one content-aware chroma forward reshaping function is generated based on the calculated required numbers of codewords and applied to the at least one image or video frame.
    Type: Application
    Filed: August 28, 2017
    Publication date: June 27, 2019
    Applicant: Dolby Laboratories Licensing Corporation
    Inventors: Cheng-Chi LI, Guan-Ming SU
  • Patent number: 10331974
    Abstract: An action recognition system and method are provided. The action recognition system includes an image capture device configured to capture an actual image depicting an object. The action recognition system includes a processor configured to render, based on a set of 3D CAD models, synthetic images with corresponding intermediate shape concept labels. The processor is configured to form a multi-layer CNN which jointly models multiple intermediate shape concepts, based on the rendered synthetic images. The processor is configured to perform an intra-class appearance variation-aware and occlusion-aware 3D object parsing on the actual image by applying the CNN thereto to generate an image pair including a 2D and 3D geometric structure of the object. The processor is configured to control a device to perform a response action in response to an identification of an action performed by the object, wherein the identification of the action is based on the image pair.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: June 25, 2019
    Assignee: NEC Corporation
    Inventors: Muhammad Zeeshan Zia, Quoc-Huy Tran, Xiang Yu, Manmohan Chandraker, Chi Li
  • Publication number: 20190148261
    Abstract: The present disclosure provides a semiconductor structure including a substrate, a first die over the substrate, a second die over the first die, a heat spreader having a sidewall facing toward and proximal to a sidewall of the first die, and a thermal interface material (TIM) between the sidewall of the first die and the sidewall of the heat spreader. A thermal conductivity of the heat spreader is higher than a thermal conductivity of the TIM.
    Type: Application
    Filed: January 24, 2018
    Publication date: May 16, 2019
    Inventors: CHI-HSI WU, WENSEN HUNG, TSUNG-SHU LIN, SHIH-CHANG KU, TSUNG-YU CHEN, HUNG-CHI LI
  • Publication number: 20190148161
    Abstract: A method of fabricating a semiconductor structure including the following steps is provided. A mask layer is formed on a semiconductor substrate. The semiconductor substrate revealed by the mask layer is anisotropically etched until a cavity is formed in the semiconductor substrate, wherein anisotropically etching the semiconductor substrate revealed by the mask layer comprises performing a plurality of first cycles and performing a plurality of second cycles after performing the first cycles, each cycle among the first and second cycles respectively includes performing a passivating step and performing an etching step after performing the passivating step. During the first cycles, a first duration ratio of the etching step to the passivating step is variable and ramps up step by step. During the second cycles, a second duration ratio of the etching step to the passivating step is constant, and the first duration ratio is less than the second duration ratio.
    Type: Application
    Filed: October 30, 2018
    Publication date: May 16, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Han Meng, Chih-Hsien Hsu, Jr-Sheng Chen, An-Chi Li, Lin-Ching Huang, Yu-Pei Chiang
  • Patent number: 10289935
    Abstract: A system and method are provided for driving assistance. The system includes an image capture device configured to capture an actual image relative to an outward view from a motor vehicle and depicting an object. The system further includes a processor configured to render, based on a set of 3D CAD models, synthetic images with corresponding intermediate shape concept labels. The processor is further configured to form a multi-layer CNN which jointly models multiple intermediate shape concepts, based on the rendered synthetic images. The processor is also configured to perform an intra-class appearance variation-aware and occlusion-aware 3D object parsing on the actual image by applying the CNN to the actual image to output an image pair including a 2D and 3D geometric structure of the object. The processor is additionally configured to perform an action to mitigate a likelihood of harm involving the motor vehicle, based on the image pair.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: May 14, 2019
    Assignee: NEC Corporation
    Inventors: Muhammad Zeeshan Zia, Quoc-Huy Tran, Xiang Yu, Manmohan Chandraker, Chi Li
  • Patent number: 10289936
    Abstract: A surveillance system and method are provided. The surveillance system includes an image capture device configured to capture an actual image of a target area depicting an object. The surveillance system further includes a processor. The processor is configured to render, based on a set of 3D Computer Aided Design (CAD) models, synthetic images with intermediate shape corresponding concept labels. The processor is further configured to form a multi-layer Convolutional Neural Network (CNN) which jointly models multiple intermediate shape concepts, based on the rendered synthetic images. The processor is also configured to perform an intra-class appearance variation-aware and occlusion-aware 3D object parsing on the actual image by applying the CNN to the actual image to generate an image pair including a 2D and 3D geometric structure of the object depicted in the actual image. The surveillance system further includes a display device configured to display the image pair.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: May 14, 2019
    Assignee: NEC Corporation
    Inventors: Muhammad Zeeshan Zia, Quoc-Huy Tran, Xiang Yu, Manmohan Chandraker, Chi Li
  • Patent number: 10290066
    Abstract: A method and device for modeling a long-time-scale photovoltaic output time sequence are provided. The method includes that: historical data of a photovoltaic power station is acquired, and a photovoltaic output with a time length of one year and a time resolution of 15 mins is selected (101); weather types of days corresponding to the photovoltaic output are acquired from a weather station (102), and probabilities of transfer between each type of weather are calculated respectively (103); and a simulated time sequence of the photovoltaic output within a preset time scale is generated (104), and its validity is verified (105). By the method, annual and monthly photovoltaic output simulated time sequences consistent with a random fluctuation rule of a photovoltaic time sequence may be acquired according to different requirements to provide a favorable condition and a data support for analog simulation of time sequence production including massive new energy.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: May 14, 2019
    Assignees: China Electric Power Research Institute Company Li, State Grid Corporation of China, CLP Puri Zhangbei Wind Power Research & Testing Co
    Inventors: Weisheng Wang, Chun Liu, Chi Li, Yuehui Huang, Yuefeng Wang, Cun Dong, Nan Zhang, Xiaofei Li, Yunfeng Gao, Xiaoyan Xu, Yanping Xu, Xiaofeng Pan
  • Patent number: 10289934
    Abstract: A system and method are provided. The system includes an image capture device configured to capture an actual image depicting an object. The system also includes a processor. The processor is configured to render, based on a set of 3D Computer Aided Design (CAD) models, a set of synthetic images with corresponding intermediate shape concept labels. The processor is also configured to form a multi-layer Convolutional Neural Network (CNN) which jointly models multiple intermediate shape concepts, based on the rendered synthetic images. The processor is further configured to perform an intra-class appearance variation-aware and occlusion-aware 3D object parsing on the actual image by applying the CNN to the actual image to output an image pair including a 2D geometric structure and a 3D geometric structure of the object depicted in the actual image.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: May 14, 2019
    Assignee: NEC Corporation
    Inventors: Muhammad Zeeshan Zia, Quoc-Huy Tran, Xiang Yu, Manmohan Chandraker, Chi Li
  • Publication number: 20190141337
    Abstract: A method to improve the efficiency of coding high-dynamic range (HDR) signals in a dual-layer system is presented. A piece-wise linear, two-segment, inter-layer predictor is designed where base-layer codewords larger than a highlights threshold (Sh) are all mapped to a constant value. Given a target bit rate for the enhancement layer, which can be expressed as a percentage (?) of the bit rate of the base layer, an optimal highlights threshold is derived by computing estimated bit rates for the base and enhancement layers based on pixel complexity measures of pixels in the input HDR signal and the threshold value, and by minimizing an optimization criterion.
    Type: Application
    Filed: April 18, 2017
    Publication date: May 9, 2019
    Applicant: Dolby Laboratories Licensing Corporation
    Inventors: Cheng-Chi LI, Guan-Ming SU
  • Publication number: 20190121931
    Abstract: A layout of an integrated circuit includes: a first layout device; a second layout device abutting the first layout device at a boundary between the first layout device and the second layout device, wherein the second layout device is a redundant circuit in the integrated circuit; a conductive path disposed across the boundary of the first layout device and the second layout device; and a cut layer disposed on the conductive path and nearby the boundary for disconnecting the first layout device from the second layout device by cutting the conductive path into a first conductive portion and a second conductive portion according to a position of the cut layer; wherein the first layout device is a first layout pattern and the second layout device is a second layout pattern different from the first layout pattern.
    Type: Application
    Filed: December 20, 2018
    Publication date: April 25, 2019
    Inventors: CHEOK-KEI LEI, YU-CHI LI, CHIA-WEI TSENG, ZHE-WEI JIANG, CHI-LIN LIU, JERRY CHANG-JUI KAO, JUNG-CHAN YANG, CHI-YU LU, HUI-ZHONG ZHUANG
  • Patent number: 10267346
    Abstract: An expandable fixing device contains: a first screw and a second screw. The first screw includes a first head portion and a first extension extending downwardly from the first head portion, the first extension has first threads formed on the first head portion, the first screw further includes a screwing orifice defined in the first head portion and multiple slots formed on the first extension, and the first extension has multiple expansion portions formed on a distal end thereof and intersecting with the multiple slots. The second screw includes a second head portion and a second extension extending downwardly from the second head portion, and the second extension has second threads formed on an outer wall thereof, wherein the second extension has a strike stem and inserting into the screwing orifice via the first screw and pushes the multiple expansion portions to expand outwardly.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: April 23, 2019
    Inventor: Chi Li
  • Patent number: 10256201
    Abstract: A method for fabricating a bonding pad structure includes forming a dielectric layer on a substrate; forming a first metal pattern layer in the dielectric layer. The first metal pattern layer includes a first body portion having a plurality of first openings in a central region of the first body portion and a plurality of second openings arranged along a peripheral region of the first body portion and surrounding the plurality of first openings; and a plurality of first island portions correspondingly disposed in the plurality of second openings and spaced apart from the first body portion. The method further includes forming a plurality of first interconnect structures in the dielectric layer and corresponding to the plurality of first island portions; and forming a bonding pad on the dielectric layer and directly above the first metal pattern layer.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 9, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chi-Li Tu, Hung-Wei Chen, Shi-Hsiang Lu, Ching-Wen Wang
  • Patent number: 10243014
    Abstract: A method of image sensor package fabrication includes forming a cavity in a ceramic substrate, and placing an image sensor in the cavity in the ceramic substrate. An image sensor processor is also placed in the cavity in the ceramic substrate, and the image sensor and the image sensor processor are wire bonded to electrical contacts. Glue is deposited on the ceramic substrate, and a glass layer is placed on the glue to adhere the glass layer to the ceramic substrate. The image sensor processor and the image sensor are disposed in the cavity between the glass layer and the ceramic substrate.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: March 26, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Wei-Feng Lin, Chi-Chih Huang, En-Chi Li
  • Patent number: 10241496
    Abstract: A multi-axis motor synchronization control system is provided, which may include a plurality of driving axes and the driving axes are coupled to one another; each of the driving axes may include a position loop controller, a velocity loop controller, a motor and a synchronization calibration device. The position loop controller may generate a velocity signal according to a position command. The velocity loop controller may generate a velocity command according to the velocity signal. The motor may operate according to the velocity command. The synchronization calibration device may calculate the average value of the position signal of the motor and the position signals of the motors of the adjacent driving axes, and then feedback the average value to the position loop controller so as to perform the synchronization calibration.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: March 26, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Huan Chou, Wen-Chuan Chen, Feng-Chi Li