Abstract: The present disclosure discloses a context-based multi-turn dialogue method.

Abstract: A device includes a first channel layer, a second channel layer, a gate structure, a source/drain epitaxial structure, and a source/drain contact. The first channel layer and the second channel layer are arranged above the first channel layer in a spaced apart manner over a substrate. The gate structure surrounds the first and second channel layers. The source/drain epitaxial structure is connected to the first and second channel layers. The source/drain contact is connected to the source/drain epitaxial structure. The second channel layer is closer to the source/drain contact than the first channel layer is to the source/drain contact, and the first channel layer is thicker than the second channel layer.

Abstract: A memory control system includes a front-end circuitry, a back-end circuitry, and a traffic scheduling circuitry. The front-end circuitry is configured to receive a plurality of access requests from a plurality of devices, and adjust an order of the plurality of devices to access a memory according to a plurality of control signals. The traffic scheduling circuitry is configured to generate a plurality of traffic data based on the plurality of access requests and analyze the plurality of traffic data based on a neural network model and a predetermined rule, in order to determine the plurality of control signals. The back-end circuitry is configured to adjust a task schedule of the memory according to the plurality of control signals.

Abstract: A method for data transmission control of inter field programmable gate array (FPGA) and an associated apparatus are provided. The method includes: utilizing a first register device to latch a set of data from a first FPGA according to a first clock, wherein the set of data is arranged and divided into multiple sets of partial data according to attributes of payloads and pointers; utilizing a time-division multiplexing (TDM) interface to transmit the multiple sets of partial data from the first register device to a second register device according to a TDM clock at multiple time points, respectively; and utilizing the second register device to sequentially receive the multiple sets of partial data, in order to output the set of data to a second FPGA, wherein the second FPGA operates according to a second clock different from the first clock.

Abstract: A dynamic gesture recognition method includes: performing detection on each frame of image of a video stream using a preset static gesture detection model to obtain a static gesture in each frame of image of the video stream; in response to detection of a change of the static gesture from a preset first gesture to a second gesture, suspending the static gesture detection model and activating a preset dynamic gesture detection model; and performing detection on multiple frames of images that are pre-stored in a storage medium using the dynamic gesture detection model to obtain a dynamic gesture recognition result.

Abstract: A method for data transmission control of inter field programmable gate array (FPGA) and an associated apparatus are provided. The method includes: utilizing a first register device to latch a set of data from a first FPGA according to a first clock, wherein the set of data is arranged and divided into multiple sets of partial data according to attributes of payloads and pointers; utilizing a time-division multiplexing (TDM) interface to transmit the multiple sets of partial data from the first register device to a second register device according to a TDM clock at multiple time points, respectively; and utilizing the second register device to sequentially receive the multiple sets of partial data, in order to output the set of data to a second FPGA, wherein the second FPGA operates according to a second clock different from the first clock.

Abstract: A method and a system for controlling data response with the aid of at least one attribute of a transaction identifier (ID) are provided. The method includes: transmitting the at least one attribute in conjunction with the transaction ID from any master device within one or more master devices to a slave device; and according to the at least one attribute, determining whether to utilize a specific data path among multiple data paths for sending response data corresponding to the transaction ID from a memory device within the slave device to the aforementioned master device. More particularly, the specific data path is a data path having maximum transmission efficiency among the multiple data paths.

Abstract: A dynamic gesture recognition method includes: performing detection on each frame of image of a video stream using a preset static gesture detection model to obtain a static gesture in each frame of image of the video stream; in response to detection of a change of the static gesture from a preset first gesture to a second gesture, suspending the static gesture detection model and activating a preset dynamic gesture detection model; and performing detection on multiple frames of images that are pre-stored in a storage medium using the dynamic gesture detection model to obtain a dynamic gesture recognition result.

Abstract: The present disclosure discloses a hybrid five-level bidirectional DC/DC converter and a voltage match modulation method thereof. The converter includes a first input filter capacitor Cinp and a second input filter capacitor Cinn, an output filter capacitor Co, a DC voltage source, a primary-side hybrid five-level unit, a primary-side two-level half bridge, a secondary-side single-phase full bridge H2, a high-frequency isolation transformer M1, a high-frequency inductor Ls, and a controller. A positive pole of a DC bus of the primary-side hybrid five-level unit is coupled to a positive pole of the corresponding DC voltage source and to a positive pole of the input filter capacitor Cinp respectively. A negative pole of the DC bus of the primary-side hybrid five-level unit is coupled to a negative pole of the corresponding DC voltage source and to a negative pole of the input filter capacitor Cinn respectively.

Abstract: A method and a system for controlling data response with the aid of at least one attribute of a transaction identifier (ID) are provided. The method includes: transmitting the at least one attribute in conjunction with the transaction ID from any master device within one or more master devices to a slave device; and according to the at least one attribute, determining whether to utilize a specific data path among multiple data paths for sending response data corresponding to the transaction ID from a memory device within the slave device to the aforementioned master device. More particularly, the specific data path is a data path having maximum transmission efficiency among the multiple data paths.

Abstract: The present disclosure discloses a context-based multi-turn dialogue method.

Abstract: The present disclosure discloses a hybrid five-level bidirectional DC/DC converter and a voltage match modulation method thereof. The converter includes a first input filter capacitor Cinp and a second input filter capacitor Cinn, an output filter capacitor Co, a DC voltage source, a primary-side hybrid five-level unit, a primary-side two-level half bridge, a secondary-side single-phase full bridge H2, a high-frequency isolation transformer M1, a high-frequency inductor Ls, and a controller. A positive pole of a DC bus of the primary-side hybrid five-level unit is coupled to a positive pole of the corresponding DC voltage source and to a positive pole of the input filter capacitor Cinp respectively. A negative pole of the DC bus of the primary-side hybrid five-level unit is coupled to a negative pole of the corresponding DC voltage source and to a negative pole of the input filter capacitor Cinn respectively.

Abstract: A processor includes a plurality of storage modules and an arbiter, where the storage modules are arranged for storing a plurality of read/write commands, respectively, and the read/write commands are arranged to read/write a memory external to the processor; and the arbiter is coupled to the storage modules, and is arranged to receive the read/write commands from the storage modules, and arrange a sequence of the read/write commands for transmitting to a memory controller.

Abstract: A deflection device and an electronic device are disclosed. The deflection device is located in the electronic device for guiding airflow generated by a fan device to at least one electronic component. The deflection device includes a first fixed part and a plurality of strip structures. The first fixed part is used for fixing the deflection device in a suitable position. One end of each of the strip structures is connected to the first fixed part and able to undergo compression deformation independently such that forms a first shape when not compressed or a second shape when compressed. When the deflection device is fixed in a suitable position of the electronic device and close to the electronic component, the shape of the at least one strip structure is changed from a first shape to a second shape for guiding the airflow to the electronic component.

Abstract: A dustproof device includes a first component, a second component and an engaging mechanism. The first component includes a first plug body which is pluggable into the first standard connection port. The second component includes a second plug body which is pluggable into the second standard connection port. The engaging mechanism includes a first engaging part which is disposed on the first component, and a second engaging part which is disposed on the second component and which is removably engageable with the first engaging part. The first component is removably connected to the second component by virtue of removable engagement between the first engaging part and the second engaging part.

Abstract: A processor includes a plurality of storage modules and an arbiter, where the storage modules are arranged for storing a plurality of read/write commands, respectively, and the read/write commands are arranged to read/write a memory external to the processor; and the arbiter is coupled to the storage modules, and is arranged to receive the read/write commands from the storage modules, and arrange a sequence of the read/write commands for transmitting to a memory controller.

Abstract: A dustproof device includes a first component, a second component and an engaging mechanism. The first component includes a first plug body which is pluggable into the first standard connection port. The second component includes a second plug body which is pluggable into the second standard connection port. The engaging mechanism includes a first engaging part which is disposed on the first component, and a second engaging part which is disposed on the second component and which is removably engageable with the first engaging part. The first component is removably connected to the second component by virtue of removable engagement between the first engaging part and the second engaging part.

Abstract: A piezoelectric vacuum gauge includes an actuator with a flexible portion, an actuating unit, a sensor unit, a signal input terminal and a signal output terminal, and a fixture unit having a base portion and a cover portion. An external signal is generated by a signal generator. Receive and transmit an external signal to an actuating unit by the signal input terminal so that the actuating unit has a vibration. Prompt a flexible portion by the actuating unit to produce a first resonant motion when the actuating unit having the vibration. The first resonant motion converts into a second resonant motion because the flexible portion is subject to a damping force of ambient air. Prompt a sensor unit by the second resonant motion to cause a shape transformation of the sensor unit to generate a detecting signal. Output the detecting signal to an external instrument by a signal output terminal of sensor unit to calculate a vacuum pressure value.

Abstract: A deflection device and an electronic device are disclosed. The deflection device is located in the electronic device for guiding airflow generated by a fan device to at least one electronic component. The deflection device includes a first fixed part and a plurality of strip structures. The first fixed part is used for fixing the deflection device in a suitable position. One end of each of the strip structures is connected to the first fixed part and able to undergo compression deformation independently such that forms a first shape when not compressed or a second shape when compressed. When the deflection device is fixed in a suitable position of the electronic device and close to the electronic component, the shape of the at least one strip structure is changed from a first shape to a second shape for guiding the airflow to the electronic component.

Abstract: A network system with QoS management and an associated management method are provided. The network system comprises a switch network, a target device, and at least a source device for issuing a packet to the target device via the switch network. The switch network comprises a flow control unit, a switch unit and a scheduling unit. The flow control unit determines whether to output a high priority packet according to a target priority level and a high priority bandwidth quota of the source device, and directly outputs a low priority packet. The switch unit determines a packet forwarding sequence according to a packet arbitration policy. The scheduling unit determines the sequence for packets to enter the target device. The scheduling unit updates the target priority level as the priority level of a packet entering the target device, and informs the flow control unit of the updated target priority level.