Patents by Inventor Chi-Sun Hwang

Chi-Sun Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010017419
    Abstract: The present invention discloses a method for forming a bit line of a semiconductor device which can easily perform a contact process of the semiconductor device, by forming parallel rows of I-shaped active regions, a plug poly and a ladder-type bit line. The spacing between adjacent active regions is maintained at the minimum line width. Two word lines of minimum line width and separated by the minimum line width are formed on the active region. The word lines are perpendicular to the active regions. A plug poly is formed on the active region between the word lines. A bit line contact plug is formed over the plug poly and a device isolation region. A bit line of minimum line width contacts the bit line contact plug and aligned generally parallel to the word lines is formed in a ladder-type configuration. That is, one side the lower portion of the contact plug contacts the plug poly, and the upper portion of the other side of the contact plug contacts the bit line.
    Type: Application
    Filed: January 2, 2001
    Publication date: August 30, 2001
    Inventors: Jung Hoon Lee, Chi Sun Hwang
  • Patent number: 6071799
    Abstract: The present invention relates to a method of forming a contact of a semiconductor device, and more particularly, to a method of forming a contact of a semiconductor device that can improve the process yield of the device and reliability by simplifying the process of forming the contact hole of the top conductive layer without removing the etching barrier layer of the portion on which the contact hole of the top conductive layer is to be formed when a storage electrode contact is formed, where the contact hole of the top conductive layer is formed on the top of the bottom conductive layer, which refers to a process of forming the self-alignment contact.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: June 6, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Cheol Soo Park, Chi Sun Hwang, Chang Hun Han