Patents by Inventor Chi-Wei Lin

Chi-Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955397
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 9, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
  • Publication number: 20240114758
    Abstract: A metal mask has a first surface, a second surface opposite to the first surface, first and second openings provided on the first and second surfaces respectively, and first and second through holes communicating with the first and second openings respectively. The juncture of the first and second through holes further has an annular protrusion. The mask satisfies the in equations: 1 ? ?m 2 < 1 2 × W × H < 15 ? ?m 2 ? and ? 30 ? ° < ? < 65 ? ° , wherein W is the horizontal distance between an edge of the first opening and an imaginary connecting line passing through an edge of the second opening and an end edge of the annular protrusion, H is the vertical distance between the end edge of the annular protrusion and the first surface, and ? is the included angle between the imaginary connecting line and an imaginary extending plane of the first surface. The metal mask is effective in reducing shadow effect, thereby improving evaporation quality.
    Type: Application
    Filed: November 15, 2022
    Publication date: April 4, 2024
    Inventors: Yun-Pei YANG, Chi-Wei LIN
  • Publication number: 20240113061
    Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Mei-Ju LU, Chi-Han CHEN, Chang-Yu LIN, Jr-Wei LIN, Chih-Pin HUNG
  • Patent number: 11950424
    Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Ting Tsai, Ching-Tzer Weng, Tsung-Hua Yang, Kao-Chao Lin, Chi-Wei Ho, Chia-Ta Hsieh
  • Patent number: 11935804
    Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
  • Publication number: 20240087934
    Abstract: A method for operating a conveying system is provided. An overhead hoist transport (OHT) vehicle is provided, wherein the OHT vehicle includes a gripping member configured to grip and hold a carrier, and a receiver configured to receive a signal. The signal is transmitted to the receiver of the OHT vehicle. The OHT vehicle is moved toward the carrier, and the carrier is gripped by the gripping member of the OHT vehicle. A lifting force is determined based on a weight of a carrier, a number of workpieces in the carrier, or a vertical distance between the OHT vehicle and the carrier, and the lifting force is applied to the carrier.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 14, 2024
    Inventors: YONG-JYU LIN, FU-HSIEN LI, CHEN-WEI LU, CHI-FENG TUNG, HSIANG YIN SHEN
  • Publication number: 20240086272
    Abstract: The present disclosure relates to a system, a method and a computer-readable medium for anomaly detection. The method includes obtaining latency data of a first endpoint, obtaining latency data of a second endpoint, generating, by a representation learning model, reconstruction error distribution data of the latency data of the first endpoint according to the latency data of the first endpoint and the latency data of the second endpoint, obtaining new latency data of the first endpoint, obtaining new latency data of the second endpoint, generating, by the representation learning model, a reconstruction error of the new latency data of the first endpoint according to the new latency data of the first endpoint and the new latency data of the second endpoint, and generating an anomaly score for the first endpoint according to a dispersion characteristic of the reconstruction error distribution data and the reconstruction error.
    Type: Application
    Filed: June 21, 2023
    Publication date: March 14, 2024
    Inventors: Chi-Wei LIN, Chin-Wei LIU
  • Patent number: 11929722
    Abstract: The present invention provides an audio control circuit comprising an USB interface and a processing circuit is disclosed. The USB interface is used to connect to a host device, and the processing circuit is configured to perform enumeration with the host device via the USB interface, and the processing circuit is further configured to determine if the host device operates in a BIOS stage or an operating system stage to generate a control signal according to packets of the enumeration. When the processing circuit determines that the host device operates in the BIOS stage, the processing circuit generates the control signal to enable a de-pop circuit; and when the processing circuit determines that the host device operates in the operating system stage, the processing circuit generates the control signal to disable the de-pop circuit.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 12, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ko-Wei Chen, Lun-Cheng Tsao, Chi-Yih Lin
  • Publication number: 20240071799
    Abstract: A system for a semiconductor fabrication facility comprises a transporting tool configured to move a carrier, a first manufacturing tool configured to accept the carrier facing in a first direction, a second manufacturing tool configured to accept the carrier facing in the second direction, and an orientation tool. The carrier is moved to the orientation tool by the transporting tool prior to being moved to the first manufacturing tool or the second manufacturing tool by the transporting tool. The orientation tool rotates the carrier so that the carrier is accepted by the first manufacturing tool or the second manufacturing tool. The transporting tool, the first manufacturing tool, the second manufacturing tool and the orientation tool are physically separated from each other.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: CHUAN WEI LIN, FU-HSIEN LI, YONG-JYU LIN, RONG-SHEN CHEN, CHI-FENG TUNG, HSIANG YIN SHEN
  • Publication number: 20240071767
    Abstract: A method includes removing a dummy gate stack to form a trench between gate spacers, depositing a gate dielectric extending into the trench, and performing a first treatment process on the gate dielectric. The first treatment process is performed using a fluorine-containing gas. A first drive-in process is then performed to drive fluorine in the fluorine-containing gas into the gate dielectric. The method further includes performing a second treatment process on the gate dielectric, wherein the second treatment process is performed using the fluorine-containing gas, and performing a second drive-in process to drive fluorine in the fluorine-containing gas into the gate dielectric. After the second drive-in process, conductive layers are formed to fill the trench.
    Type: Application
    Filed: January 6, 2023
    Publication date: February 29, 2024
    Inventors: Hsueh-Ju Chen, Chi On Chui, Tsung-Da Lin, Pei Ying Lai, Chia-Wei Hsu
  • Patent number: 11792335
    Abstract: A projection system, including a projection target, a projection device, an image capturing device, and a processor circuit, is provided. The projection target includes a reflective surface and an anti-reflective film disposed on the reflective surface. The anti-reflective film defines a projection range. The image capturing device captures a first captured image containing the projection target. The first captured image includes an image of the anti-reflective film. The processor circuit determines a position and a shape of the anti-reflective film in the first captured image according to the first captured image. The projection device projects a projection image on the projection target. The projection device adjusts the projection image according to the position and the shape of the anti-reflective film, and correspondingly adjusts the projection image to the projection range. In addition, an image projection method is also provided.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: October 17, 2023
    Assignee: Coretronic Corporation
    Inventors: Chien-Chun Peng, Hsun-Cheng Tu, Chi-Wei Lin, Chun-Lin Chien
  • Patent number: 11758099
    Abstract: The disclosure provides an image blending method. The method includes projecting a plurality of images onto a projection surface, respectively, wherein an image of the first portion of the first image and an image of the first portion of the second image projected onto the projection surface overlap each other in the first overlapping area on the projection surface; the image parameters of all pixels of the first non-overlapping area and the second non-overlapping area are adjusted according to the position of the first non-overlapping area and the position of the second non-overlapping area, such that the black-level brightness of the first non-overlapping image in the first non-overlapping area of the first image and the black-level brightness of the second non-overlapping image in the second non-overlapping area of the second image are close to the black-level brightness of the first overlapping image in the first overlapping area.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: September 12, 2023
    Assignee: Coretronic Corporation
    Inventors: Jyun-Lin Cian, Chi-Wei Lin, Yung-Chiao Liu, Chien-Chun Peng
  • Publication number: 20230185121
    Abstract: A cholesteric liquid crystal display device and a control method for reducing inrush current when clearing the screen. The cholesteric liquid crystal display device includes a cholesteric liquid crystal display panel and a liquid crystal drive unit. The cholesteric liquid crystal display panel has a plurality of pixel matrix. After the liquid crystal drive unit receives a data latch enable signal, it applies a reset voltage to the plurality of pixel matrix to clear the screen displayed on the cholesteric liquid crystal display panel. The input time of the data latch enable signal received by the liquid crystal driving unit is different, and the corresponding signal time portion is shifted with each other.
    Type: Application
    Filed: December 8, 2022
    Publication date: June 15, 2023
    Inventors: CHI-WEI LIN, WU-CHANG YANG, CHI-CHANG LIAO
  • Publication number: 20230167535
    Abstract: A fine metal mask includes a plate including a first and a second surfaces. The first surface has a first inner edge defining a first opening. The second surface has a second inner edge defining a second opening communicated with the first opening. The plate includes a first and a second curved surfaces respectively connecting the first surface inside the first opening and the second surface inside the second opening. The first and the second curved surfaces connect with a third inner edge defining a third opening smaller than the first and the second openings. The third inner edge includes a first straight edge, a second straight edge and a circular edge. The first and the second straight edges form an included angle. The circular edge has a radius smaller than or equal to 15 microns and connects between the first and the second straight edges.
    Type: Application
    Filed: February 11, 2022
    Publication date: June 1, 2023
    Inventors: Kuan-Chieh FANG, Chi-Wei LIN
  • Patent number: 11546564
    Abstract: A projection system and a self-adaptive adjustment method are provided. The projection system includes a projection device, an image capturing device, and a processing device. The projection device sequentially projects sub-pattern arrays of a pattern array to a projection region of a projection surface. The image capturing device sequentially captures the sub-pattern arrays projected on the projection surface to output pattern images. The processing device analyzes the pattern images to obtain pattern coordinates and a pattern order of projected patterns in each pattern image. The processing device determines at least a part of the projected patterns to be effective patterns according to the pattern coordinates and the pattern order, and adjusts the projection device according to the effective patterns. The projection system and the self-adaptive adjustment method provide good projection quality.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: January 3, 2023
    Assignee: Coretronic Corporation
    Inventors: Hsun-Cheng Tu, Chien-Chun Peng, Chi-Wei Lin
  • Publication number: 20220404695
    Abstract: A method of preparing a metal mask substrate includes providing a metal substrate. Next, a gloss is measured and obtained from the surface of the metal substrate. Next, the gloss is determined whether to be within a predetermined range. When the gloss is determined within the predetermined range, a photolithography process is performed to the metal substrate, where the predetermined range is between 90 GU and 400 GU.
    Type: Application
    Filed: November 11, 2021
    Publication date: December 22, 2022
    Inventors: Chi-Wei LIN, Wen-Yi LIN
  • Patent number: 11523094
    Abstract: A display system for displaying a panoramic image and an operation method thereof are provided. The display system for displaying a panoramic image includes N projectors and a controller. The N projectors project N sub-images according to N image data and form a panoramic image. Each sub-image has a sub-image overlapping area, so that two adjacent sub-images of the N sub-images partially overlap, and that a first sub-image and an Nth sub-image of the N sub-images partially overlap. The controller copies a first edge image corresponding to a first edge of an original image and connects the first edge image to a second edge of the original image that is opposite to the first edge, so as to generate an extended image corresponding to the sub-image overlapping area. The controller slices an adjusted image containing the original image and the extended image to generate the N image data.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: December 6, 2022
    Assignee: Coretronic Corporation
    Inventors: Hsun-Cheng Tu, Chien-Chun Peng, Chi-Wei Lin, Chung-Cheng Hsu
  • Publication number: 20220301466
    Abstract: A projection system is provided, which includes multiple projection devices. The projection devices are configured to generate multiple projection images. Each of the projection images partially overlaps with at least one of the adjacent projection images. In a viewing direction, aspect ratios of the projection images are all greater than 1 or less than 1. A projection direction of one of the projection devices is not parallel to a projection direction of another one of the projection devices. A stitching method of the projection images is further provided. The projection system and the stitching method of the projection images provided by the disclosure have a better effect of the projection images.
    Type: Application
    Filed: February 15, 2022
    Publication date: September 22, 2022
    Applicant: Coretronic Corporation
    Inventors: Hsun-Cheng Tu, Chun-Lin Chien, Chi-Wei Lin, Chien-Chun Peng
  • Publication number: 20220303407
    Abstract: A projection system, including a projection target, a projection device, an image capturing device, and a processor circuit, is provided. The projection target includes a reflective surface and an anti-reflective film disposed on the reflective surface. The anti-reflective film defines a projection range. The image capturing device captures a first captured image containing the projection target. The first captured image includes an image of the anti-reflective film. The processor circuit determines a position and a shape of the anti-reflective film in the first captured image according to the first captured image. The projection device projects a projection image on the projection target. The projection device adjusts the projection image according to the position and the shape of the anti-reflective film, and correspondingly adjusts the projection image to the projection range. In addition, an image projection method is also provided.
    Type: Application
    Filed: March 14, 2022
    Publication date: September 22, 2022
    Applicant: Coretronic Corporation
    Inventors: Chien-Chun Peng, Hsun-Cheng Tu, Chi-Wei Lin, Chun-Lin Chien
  • Publication number: 20220239875
    Abstract: A display system for displaying a panoramic image and an operation method thereof are provided. The display system for displaying a panoramic image includes N projectors and a controller. The N projectors project N sub-images according to N image data and form a panoramic image. Each sub-image has a sub-image overlapping area, so that two adjacent sub-images of the N sub-images partially overlap, and that a first sub-image and an Nth sub-image of the N sub-images partially overlap. The controller copies a first edge image corresponding to a first edge of an original image and connects the first edge image to a second edge of the original image that is opposite to the first edge, so as to generate an extended image corresponding to the sub-image overlapping area. The controller slices an adjusted image containing the original image and the extended image to generate the N image data.
    Type: Application
    Filed: January 18, 2022
    Publication date: July 28, 2022
    Applicant: Coretronic Corporation
    Inventors: Hsun-Cheng Tu, Chien-Chun Peng, Chi-Wei Lin, Chung-Cheng Hsu