Abstract: The electronic device monitoring method, provided by the present invention, comprises the following steps: obtaining a coordinate information and an additional information of each electronic device by the master electronic device; generating a display position table by the master electronic device according to the coordinate information and the additional information of each electronic device; generating a barcode pattern, indicating a monitoring website and a plurality of display parameters, by the master electronic device according to the display position table in real time; reading the barcode pattern by a mobile device to connect to a browsing interface related to the monitoring website associated with a monitoring website address; displaying a device pattern corresponding to each electronic device by the browsing interface according to a plurality of display parameters; wherein the barcode pattern indicates the monitoring website address and the plurality of display parameters.

Abstract: A power transceiver device includes a housing, a circuit module and an electrical connector. The circuit module is located within the housing. The electrical connector includes a terminal base and two conductive terminals. The terminal base is fixed on one side surface of the housing. Each of the conductive terminals includes a sheet, an extending portion and an opening. One end of the sheet extends through a front face of the terminal base, another end thereof is electrically connected to the circuit module. The extending portion extends transversely from the end of the sheet, the opening is firmed on the extending portion, and a virtual axis of the opening passes through the front lateral face of the terminal base. The conductive terminals are switchably electrically connected to each other.

Abstract: A wafer level LED package structure includes a light-emitting unit, a reflecting unit, a first conductive unit and a second conductive unit. The light-emitting unit has a substrate body, a light-emitting body disposed on the substrate body, a positive and a negative conductive layers formed on the light-emitting body, and a light-emitting area formed in the light-emitting body. The reflecting unit has a reflecting layer formed between the positive and the negative conductive layers and on the substrate body for covering external sides of the light-emitting body. The first conductive unit has a first positive conductive layer formed on the positive conductive layer and a first negative conductive layer formed on the negative conductive layer. The second conductive unit has a second positive conductive structure formed on the first positive conductive layer and a second negative conductive structure formed on the first negative conductive layer.

Abstract: A wafer level LED package structure includes a light-emitting unit, a reflecting unit, a first conductive unit and a second conductive unit. The light-emitting unit has a substrate body, a light-emitting body disposed on the substrate body, a positive and a negative conductive layers formed on the light-emitting body, and a light-emitting area formed in the light-emitting body. The reflecting unit has a reflecting layer formed between the positive and the negative conductive layers and on the substrate body for covering external sides of the light-emitting body. The first conductive unit has a first positive conductive layer formed on the positive conductive layer and a first negative conductive layer formed on the negative conductive layer. The second conductive unit has a second positive conductive structure formed on the first positive conductive layer and a second negative conductive structure formed on the first negative conductive layer.

Abstract: A wafer-level electro-optical semiconductor fabrication mechanism and method for the same which improves upon traditional electro-optical semiconductor grain packaging methods. The present invention electrically connects semiconductor grains to the grains on a top surface of a wafer, this is done by either screen-printing or steel board-printing solder or silver paste onto the wafer. After that, the wafer is processed using the following steps: processing the devices, bonding with wire, packaging the wafer and finally cutting the wafer. Using this method raises the production yield while production times and costs are reduced. The wafer-level electro-optical semiconductor fabrication mechanism comprises: a wafer, an electro-optical semiconductor grain and conductive materials.

Abstract: An LED package structure for increasing light-emitting efficiency includes: a substrate unit, and a plurality of fluorescence colloid units, LED units, conductive units and opaque units. The substrate unit has a main body and a plurality of through holes passing through the main body. Each fluorescence colloid unit is received in the corresponding through hole and having an installed surface. Each LED unit has a light-emitting surface disposed on the corresponding fluorescence colloid unit and facing the installed surface of the corresponding fluorescence colloid units. Each conductive unit is electrically connected between each two electrode areas that have the same pole and are respectively arranged on each LED unit and the main body. Each opaque unit is disposed on two corresponding lateral faces of the main body for covering the installed surface of the corresponding fluorescence colloid unit, the corresponding LED unit, and the corresponding conductive units.

Abstract: An LED package structure for increasing light-emitting efficiency includes: a substrate unit, and a plurality of fluorescence colloid units, LED units, conductive units and opaque units. The substrate unit has a main body and a plurality of through holes passing through the main body. Each fluorescence colloid unit is received in the corresponding through hole and having an installed surface. Each LED unit has a light-emitting surface disposed on the corresponding fluorescence colloid unit and facing the installed surface of the corresponding fluorescence colloid units. Each conductive unit is electrically connected between each two electrode areas that have the same pole and are respectively arranged on each LED unit and the main body. Each opaque unit is disposed on two corresponding lateral faces of the main body for covering the installed surface of the corresponding fluorescence colloid unit, the corresponding LED unit, and the corresponding conductive units.

Abstract: A package structure for a semiconductor is described. The advantages thereof are that it has a great structural strength and when being penetrated by light, it will not be influenced by external light and can condense the light. Therefore, it is not easily be deformed so that the yield and quality of package can be increased, and when packaging an LED chip, it easily meets the package requirements of an electronic chip. In addition, the substrate structure is cheaper than the prior art, because a double-layered substrate is employed to improve the strength, and the package structure is also preferred because an external frame device is additionally used for preventing interference by external light. The package structure for the semiconductor has a substrate, an external frame device and a polymer filler.

Abstract: A wafer-level electro-optical semiconductor fabrication mechanism and method for the same which improves upon traditional electro-optical semiconductor grain packaging methods. The present invention electrically connects semiconductor grains to the grains on a top surface of a wafer. this is done by either screen-printing or steel board-printing solder or silver paste onto the wafer. After that, the wafer is processed using the following steps: processing the devices, bonding with wire, packaging the wafer and finally cutting the wafer. Using this method raises the production yield while production times and costs are reduced. The wafer-level electro-optical semiconductor fabrication mechanism comprises: a wafer, an electro-optical semiconductor grain and conductive materials.

Abstract: A wafer-level electro-optical semiconductor manufacture fabrication method improves upon traditional electro-optical semiconductor grain packaging methods. The present invention electrically connects semiconductor grains to the grains on a top surface of a wafer. This is done by either screen-printing or steel board-printing solder or silver paste onto the wafer. After that, the wafer is processed using the following steps: processing the devices, bonding with wire, packaging the wafer and finally cutting the wafer. Using this method raises the production yield while production times and costs are reduced. The wafer-level electro-optical semiconductor fabrication mechanism comprises: a wafer, an electro-optical semiconductor grain and conductive materials.

Abstract: A wafer-level electro-optical semiconductor fabrication mechanism and method for the same which improves upon traditional electro-optical semiconductor grain packaging methods. The present invention electrically connects semiconductor grains to the grains on a top surface of a wafer. this is done by either screen-printing or steel board-printing solder or silver paste onto the wafer. After that, the wafer is processed using the following steps: processing the devices, bonding with wire, packaging the wafer and finally cutting the wafer. Using this method raises the production yield while production times and costs are reduced. The wafer-level electro-optical semiconductor fabrication mechanism comprises: a wafer, an electro-optical semiconductor grain and conductive materials.

Abstract: A package structure for a semiconductor is described. The advantages thereof are that it has a great structural strength and when being penetrated by light, it will not be influenced by external light and can condense the light. Therefore, it is not easily be deformed so that the yield and quality of package can be increased, and when packaging an LED chip, it easily meets the package requirements of an electronic chip. In addition, the substrate structure is cheaper than the prior art, because a double-layered substrate is employed to improve the strength, and the package structure is also preferred because an external frame device is additionally used for preventing interference by external light. The package structure for the semiconductor has a substrate, an external frame device and a polymer filler.

Abstract: A light source structure for a light emitting diode (LED) has a high modulating flexibility and a low manufacturing cost. The LED light source is a white light source for an electrical device. The LED light source structure is used to meet the illumination requirement of the electrical device and the benefit from the light source structure of LED is more modulating ability with a small volume. The Led light source structure has an electrical circuit substrate, a red light LED chip, a green light LED chip, a blue light LED chip, a controlling integral circuit chip and a certain shape of packaging material.

Abstract: Stacked metal sections serve as two leads of an IC package. In one embodiment, an IC chip is mounted on one section serving as the terminal for the bottom electrode of the chip, and the top electrode of the chip is wire-bonded to the other section serving as another terminal for the chip. The thin sheet metal permits narrower etched separation between the two metal sections. Stacking of two pre-etched thin sheet metals strengthens the substrate. The package is covered with glue to hold the two sections together. The stacked pre-etched metal sheets can serve as a common substrate for a matrix of IC packages, which can later be cut in two orthogonal directions to yield individual packages.

Abstract: Stacked metal sections serve as two leads of an IC package. In one embodiment, an IC chip is mounted on one section serving as the terminal for the bottom electrode of the chip, and the top electrode of the chip is wire-bonded to the other section serving as another terminal for the chip. The thin sheet metal permits narrower etched separation between the two metal sections. Stacking of two pre-etched thin sheet metals strengthens the substrate. The package is covered with glue to hold the two sections together. The stacked pre-etched metal sheets can serve as a common substrate for a matrix of IC packages, which can later be cut in two orthogonal directions to yield individual packages.

Abstract: A method of making a hydrotreating catalyst wherein the catalyst is prepared by mixing a peptized alumina support containing soluble Group IVB and Group VIII metal compounds with a solution containing a soluble Group VIB metal compound and a basic compound. The catalyst is used for hydrodenitrogenation and Ramsbottom Carbon Residue reduction of a hydrocarbon feedstock.

Abstract: A process for removing calcium from a hydrocarbon feed having at least 1 ppm oil-soluble calcium. The process employs a catalyst system, comprising catalyst particles, wherein a high volume percent of the catalyst particles are in the form of mesopores (less than 1000 Angstrom in diameter), low surface area, low hydrogenation activity, and th inclusion of Group VIII metals, in particular nickel, on a silica catalyst base.

Abstract: A catalyst system is disclosed which is capable of removing calcium from a hydrocarbon feed having at least 1 ppm oil-soluble calcium. The catalyst system comprises catalyst particles, wherein such catalyst particles are in the form of mesopores (less than 1000 Angstrom in diameter), low surface area, and low hydrogenation activity, and the inclusion of Group VIII metals, in particular nickel, on a silica catalyst base.

Abstract: A catalyst system is disclosed which is capable of removing calcium from a hydrocarbon feed having at least 1 ppm oil-soluble calcium. It comprises a catalyst layer characterized as a fixed bed of catalyst particles, such fixed bed of catalyst particles may be graded, a high volume percent of their pore volume in the form of macropores above 1000 Angstrom in diameter, or an average meso pore diameter of 100-800 .ANG., low surface area, and low hydrogenation activity, and the inclusion of Group I metals, in particular potassium, on the catalyst base.